xref: /linux/arch/powerpc/include/asm/exception-64s.h (revision 762f99f4f3cb41a775b5157dd761217beba65873)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 #ifndef _ASM_POWERPC_EXCEPTION_H
3 #define _ASM_POWERPC_EXCEPTION_H
4 /*
5  * Extracted from head_64.S
6  *
7  *  PowerPC version
8  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9  *
10  *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
11  *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
12  *  Adapted for Power Macintosh by Paul Mackerras.
13  *  Low-level exception handlers and MMU support
14  *  rewritten by Paul Mackerras.
15  *    Copyright (C) 1996 Paul Mackerras.
16  *
17  *  Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
18  *    Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
19  *
20  *  This file contains the low-level support and setup for the
21  *  PowerPC-64 platform, including trap and interrupt dispatch.
22  */
23 /*
24  * The following macros define the code that appears as
25  * the prologue to each of the exception handlers.  They
26  * are split into two parts to allow a single kernel binary
27  * to be used for pSeries and iSeries.
28  *
29  * We make as much of the exception code common between native
30  * exception handlers (including pSeries LPAR) and iSeries LPAR
31  * implementations as possible.
32  */
33 #include <asm/feature-fixups.h>
34 
35 /* PACA save area size in u64 units (exgen, exmc, etc) */
36 #define EX_SIZE		10
37 
38 /* PACA save area offsets */
39 #define EX_R9		0
40 #define EX_R10		8
41 #define EX_R11		16
42 #define EX_R12		24
43 #define EX_R13		32
44 #define EX_DAR		40
45 #define EX_DSISR	48
46 #define EX_CCR		52
47 #define EX_CFAR		56
48 #define EX_PPR		64
49 #define EX_CTR		72
50 
51 /*
52  * maximum recursive depth of MCE exceptions
53  */
54 #define MAX_MCE_DEPTH	4
55 
56 #ifdef __ASSEMBLY__
57 
58 #define STF_ENTRY_BARRIER_SLOT						\
59 	STF_ENTRY_BARRIER_FIXUP_SECTION;				\
60 	nop;								\
61 	nop;								\
62 	nop
63 
64 #define STF_EXIT_BARRIER_SLOT						\
65 	STF_EXIT_BARRIER_FIXUP_SECTION;					\
66 	nop;								\
67 	nop;								\
68 	nop;								\
69 	nop;								\
70 	nop;								\
71 	nop
72 
73 #define ENTRY_FLUSH_SLOT						\
74 	ENTRY_FLUSH_FIXUP_SECTION;					\
75 	nop;								\
76 	nop;								\
77 	nop;
78 
79 #define SCV_ENTRY_FLUSH_SLOT						\
80 	SCV_ENTRY_FLUSH_FIXUP_SECTION;					\
81 	nop;								\
82 	nop;								\
83 	nop;
84 
85 /*
86  * r10 must be free to use, r13 must be paca
87  */
88 #define INTERRUPT_TO_KERNEL						\
89 	STF_ENTRY_BARRIER_SLOT;						\
90 	ENTRY_FLUSH_SLOT
91 
92 /*
93  * r10, ctr must be free to use, r13 must be paca
94  */
95 #define SCV_INTERRUPT_TO_KERNEL						\
96 	STF_ENTRY_BARRIER_SLOT;						\
97 	SCV_ENTRY_FLUSH_SLOT
98 
99 /*
100  * Macros for annotating the expected destination of (h)rfid
101  *
102  * The nop instructions allow us to insert one or more instructions to flush the
103  * L1-D cache when returning to userspace or a guest.
104  *
105  * powerpc relies on return from interrupt/syscall being context synchronising
106  * (which hrfid, rfid, and rfscv are) to support ARCH_HAS_MEMBARRIER_SYNC_CORE
107  * without additional synchronisation instructions.
108  *
109  * soft-masked interrupt replay does not include a context-synchronising rfid,
110  * but those always return to kernel, the sync is only required when returning
111  * to user.
112  */
113 #define RFI_FLUSH_SLOT							\
114 	RFI_FLUSH_FIXUP_SECTION;					\
115 	nop;								\
116 	nop;								\
117 	nop
118 
119 #define RFI_TO_KERNEL							\
120 	rfid
121 
122 #define RFI_TO_USER							\
123 	STF_EXIT_BARRIER_SLOT;						\
124 	RFI_FLUSH_SLOT;							\
125 	rfid;								\
126 	b	rfi_flush_fallback
127 
128 #define RFI_TO_USER_OR_KERNEL						\
129 	STF_EXIT_BARRIER_SLOT;						\
130 	RFI_FLUSH_SLOT;							\
131 	rfid;								\
132 	b	rfi_flush_fallback
133 
134 #define RFI_TO_GUEST							\
135 	STF_EXIT_BARRIER_SLOT;						\
136 	RFI_FLUSH_SLOT;							\
137 	rfid;								\
138 	b	rfi_flush_fallback
139 
140 #define HRFI_TO_KERNEL							\
141 	hrfid
142 
143 #define HRFI_TO_USER							\
144 	STF_EXIT_BARRIER_SLOT;						\
145 	RFI_FLUSH_SLOT;							\
146 	hrfid;								\
147 	b	hrfi_flush_fallback
148 
149 #define HRFI_TO_USER_OR_KERNEL						\
150 	STF_EXIT_BARRIER_SLOT;						\
151 	RFI_FLUSH_SLOT;							\
152 	hrfid;								\
153 	b	hrfi_flush_fallback
154 
155 #define HRFI_TO_GUEST							\
156 	STF_EXIT_BARRIER_SLOT;						\
157 	RFI_FLUSH_SLOT;							\
158 	hrfid;								\
159 	b	hrfi_flush_fallback
160 
161 #define HRFI_TO_UNKNOWN							\
162 	STF_EXIT_BARRIER_SLOT;						\
163 	RFI_FLUSH_SLOT;							\
164 	hrfid;								\
165 	b	hrfi_flush_fallback
166 
167 #define RFSCV_TO_USER							\
168 	STF_EXIT_BARRIER_SLOT;						\
169 	RFI_FLUSH_SLOT;							\
170 	RFSCV;								\
171 	b	rfscv_flush_fallback
172 
173 #else /* __ASSEMBLY__ */
174 /* Prototype for function defined in exceptions-64s.S */
175 void do_uaccess_flush(void);
176 #endif /* __ASSEMBLY__ */
177 
178 #endif	/* _ASM_POWERPC_EXCEPTION_H */
179