1menu "Platform options" 2 3comment "Memory settings" 4 5config NIOS2_MEM_BASE 6 hex "Memory base address" 7 default "0x00000000" 8 help 9 This is the physical address of the memory that the kernel will run 10 from. This address is used to link the kernel and setup initial memory 11 management. You should take the raw memory address without any MMU 12 or cache bits set. 13 Please not that this address is used directly so you have to manually 14 do address translation if it's connected to a bridge. 15 16comment "Device tree" 17 18config NIOS2_DTB_AT_PHYS_ADDR 19 bool "DTB at physical address" 20 help 21 When enabled you can select a physical address to load the dtb from. 22 Normally this address is passed by a bootloader such as u-boot but 23 using this you can use a devicetree without a bootloader. 24 This way you can store a devicetree in NOR flash or an onchip rom. 25 Please note that this address is used directly so you have to manually 26 do address translation if it's connected to a bridge. Also take into 27 account that when using an MMU you'd have to ad 0xC0000000 to your 28 address 29 30config NIOS2_DTB_PHYS_ADDR 31 hex "DTB Address" 32 depends on NIOS2_DTB_AT_PHYS_ADDR 33 default "0xC0000000" 34 help 35 Physical address of a dtb blob. 36 37config NIOS2_DTB_SOURCE_BOOL 38 bool "Compile and link device tree into kernel image" 39 help 40 This allows you to specify a dts (device tree source) file 41 which will be compiled and linked into the kernel image. 42 43config NIOS2_DTB_SOURCE 44 string "Device tree source file" 45 depends on NIOS2_DTB_SOURCE_BOOL 46 default "" 47 help 48 Absolute path to the device tree source (dts) file describing your 49 system. 50 51comment "Nios II instructions" 52 53config NIOS2_ARCH_REVISION 54 int "Select Nios II architecture revision" 55 range 1 2 56 default 1 57 help 58 Select between Nios II R1 and Nios II R2 . The architectures 59 are binary incompatible. Default is R1 . 60 61config NIOS2_HW_MUL_SUPPORT 62 bool "Enable MUL instruction" 63 help 64 Set to true if you configured the Nios II to include the MUL 65 instruction. This will enable the -mhw-mul compiler flag. 66 67config NIOS2_HW_MULX_SUPPORT 68 bool "Enable MULX instruction" 69 help 70 Set to true if you configured the Nios II to include the MULX 71 instruction. Enables the -mhw-mulx compiler flag. 72 73config NIOS2_HW_DIV_SUPPORT 74 bool "Enable DIV instruction" 75 help 76 Set to true if you configured the Nios II to include the DIV 77 instruction. Enables the -mhw-div compiler flag. 78 79config NIOS2_BMX_SUPPORT 80 bool "Enable BMX instructions" 81 depends on NIOS2_ARCH_REVISION = 2 82 help 83 Set to true if you configured the Nios II R2 to include 84 the BMX Bit Manipulation Extension instructions. Enables 85 the -mbmx compiler flag. 86 87config NIOS2_CDX_SUPPORT 88 bool "Enable CDX instructions" 89 depends on NIOS2_ARCH_REVISION = 2 90 help 91 Set to true if you configured the Nios II R2 to include 92 the CDX Bit Manipulation Extension instructions. Enables 93 the -mcdx compiler flag. 94 95config NIOS2_FPU_SUPPORT 96 bool "Custom floating point instr support" 97 help 98 Enables the -mcustom-fpu-cfg=60-1 compiler flag. 99 100config NIOS2_CI_SWAB_SUPPORT 101 bool "Byteswap custom instruction" 102 help 103 Use the byteswap (endian converter) Nios II custom instruction provided 104 by Altera and which can be enabled in QSYS builder. This accelerates 105 endian conversions in the kernel (e.g. ntohs). 106 107config NIOS2_CI_SWAB_NO 108 int "Byteswap custom instruction number" if NIOS2_CI_SWAB_SUPPORT 109 default 0 110 help 111 Number of the instruction as configured in QSYS Builder. 112 113comment "Cache settings" 114 115config CUSTOM_CACHE_SETTINGS 116 bool "Custom cache settings" 117 help 118 This option allows you to tweak the cache settings used during early 119 boot (where the information from device tree is not yet available). 120 There should be no reason to change these values. Linux will work 121 perfectly fine, even if the Nios II is configured with smaller caches. 122 123 Say N here unless you know what you are doing. 124 125config NIOS2_DCACHE_SIZE 126 hex "D-Cache size" if CUSTOM_CACHE_SETTINGS 127 range 0x200 0x10000 128 default "0x800" 129 help 130 Maximum possible data cache size. 131 132config NIOS2_DCACHE_LINE_SIZE 133 hex "D-Cache line size" if CUSTOM_CACHE_SETTINGS 134 range 0x10 0x20 135 default "0x20" 136 help 137 Minimum possible data cache line size. 138 139config NIOS2_ICACHE_SIZE 140 hex "I-Cache size" if CUSTOM_CACHE_SETTINGS 141 range 0x200 0x10000 142 default "0x1000" 143 help 144 Maximum possible instruction cache size. 145 146endmenu 147