1# SPDX-License-Identifier: GPL-2.0-only 2menu "Platform options" 3 4comment "Memory settings" 5 6config NIOS2_MEM_BASE 7 hex "Memory base address" 8 default "0x00000000" 9 help 10 This is the physical address of the memory that the kernel will run 11 from. This address is used to link the kernel and setup initial memory 12 management. You should take the raw memory address without any MMU 13 or cache bits set. 14 Please not that this address is used directly so you have to manually 15 do address translation if it's connected to a bridge. 16 17comment "Device tree" 18 19config NIOS2_DTB_AT_PHYS_ADDR 20 bool "DTB at physical address" 21 help 22 When enabled you can select a physical address to load the dtb from. 23 Normally this address is passed by a bootloader such as u-boot but 24 using this you can use a devicetree without a bootloader. 25 This way you can store a devicetree in NOR flash or an onchip rom. 26 Please note that this address is used directly so you have to manually 27 do address translation if it's connected to a bridge. Also take into 28 account that when using an MMU you'd have to ad 0xC0000000 to your 29 address 30 31config NIOS2_DTB_PHYS_ADDR 32 hex "DTB Address" 33 depends on NIOS2_DTB_AT_PHYS_ADDR 34 default "0xC0000000" 35 help 36 Physical address of a dtb blob. 37 38config BUILTIN_DTB 39 bool "Compile and link device tree into kernel image" 40 depends on !COMPILE_TEST 41 select GENERIC_BUILTIN_DTB 42 help 43 This allows you to specify a dts (device tree source) file 44 which will be compiled and linked into the kernel image. 45 46config BUILTIN_DTB_NAME 47 string "Built-in device tree name" 48 depends on BUILTIN_DTB 49 default "" 50 help 51 Relative path to the device tree without suffix describing your 52 system. 53 54comment "Nios II instructions" 55 56config NIOS2_ARCH_REVISION 57 int "Select Nios II architecture revision" 58 range 1 2 59 default 1 60 help 61 Select between Nios II R1 and Nios II R2 . The architectures 62 are binary incompatible. Default is R1 . 63 64config NIOS2_HW_MUL_SUPPORT 65 bool "Enable MUL instruction" 66 help 67 Set to true if you configured the Nios II to include the MUL 68 instruction. This will enable the -mhw-mul compiler flag. 69 70config NIOS2_HW_MULX_SUPPORT 71 bool "Enable MULX instruction" 72 help 73 Set to true if you configured the Nios II to include the MULX 74 instruction. Enables the -mhw-mulx compiler flag. 75 76config NIOS2_HW_DIV_SUPPORT 77 bool "Enable DIV instruction" 78 help 79 Set to true if you configured the Nios II to include the DIV 80 instruction. Enables the -mhw-div compiler flag. 81 82config NIOS2_BMX_SUPPORT 83 bool "Enable BMX instructions" 84 depends on NIOS2_ARCH_REVISION = 2 85 help 86 Set to true if you configured the Nios II R2 to include 87 the BMX Bit Manipulation Extension instructions. Enables 88 the -mbmx compiler flag. 89 90config NIOS2_CDX_SUPPORT 91 bool "Enable CDX instructions" 92 depends on NIOS2_ARCH_REVISION = 2 93 help 94 Set to true if you configured the Nios II R2 to include 95 the CDX Bit Manipulation Extension instructions. Enables 96 the -mcdx compiler flag. 97 98config NIOS2_FPU_SUPPORT 99 bool "Custom floating point instr support" 100 help 101 Enables the -mcustom-fpu-cfg=60-1 compiler flag. 102 103config NIOS2_CI_SWAB_SUPPORT 104 bool "Byteswap custom instruction" 105 help 106 Use the byteswap (endian converter) Nios II custom instruction provided 107 by Altera and which can be enabled in QSYS builder. This accelerates 108 endian conversions in the kernel (e.g. ntohs). 109 110config NIOS2_CI_SWAB_NO 111 int "Byteswap custom instruction number" if NIOS2_CI_SWAB_SUPPORT 112 default 0 113 help 114 Number of the instruction as configured in QSYS Builder. 115 116comment "Cache settings" 117 118config CUSTOM_CACHE_SETTINGS 119 bool "Custom cache settings" 120 help 121 This option allows you to tweak the cache settings used during early 122 boot (where the information from device tree is not yet available). 123 There should be no reason to change these values. Linux will work 124 perfectly fine, even if the Nios II is configured with smaller caches. 125 126 Say N here unless you know what you are doing. 127 128config NIOS2_DCACHE_SIZE 129 hex "D-Cache size" if CUSTOM_CACHE_SETTINGS 130 range 0x200 0x10000 131 default "0x800" 132 help 133 Maximum possible data cache size. 134 135config NIOS2_DCACHE_LINE_SIZE 136 hex "D-Cache line size" if CUSTOM_CACHE_SETTINGS 137 range 0x10 0x20 138 default "0x20" 139 help 140 Minimum possible data cache line size. 141 142config NIOS2_ICACHE_SIZE 143 hex "I-Cache size" if CUSTOM_CACHE_SETTINGS 144 range 0x200 0x10000 145 default "0x1000" 146 help 147 Maximum possible instruction cache size. 148 149endmenu 150