xref: /linux/arch/nios2/platform/Kconfig.platform (revision 4f9786035f9e519db41375818e1d0b5f20da2f10)
1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only
22fc8483fSLey Foon Tanmenu "Platform options"
32fc8483fSLey Foon Tan
42fc8483fSLey Foon Tancomment "Memory settings"
52fc8483fSLey Foon Tan
62fc8483fSLey Foon Tanconfig NIOS2_MEM_BASE
72fc8483fSLey Foon Tan	hex "Memory base address"
82fc8483fSLey Foon Tan	default "0x00000000"
92fc8483fSLey Foon Tan	help
102fc8483fSLey Foon Tan	  This is the physical address of the memory that the kernel will run
112fc8483fSLey Foon Tan	  from. This address is used to link the kernel and setup initial memory
122fc8483fSLey Foon Tan	  management. You should take the raw memory address without any MMU
132fc8483fSLey Foon Tan	  or cache bits set.
142fc8483fSLey Foon Tan	  Please not that this address is used directly so you have to manually
152fc8483fSLey Foon Tan	  do address translation if it's connected to a bridge.
162fc8483fSLey Foon Tan
172fc8483fSLey Foon Tancomment "Device tree"
182fc8483fSLey Foon Tan
192fc8483fSLey Foon Tanconfig NIOS2_DTB_AT_PHYS_ADDR
202fc8483fSLey Foon Tan	bool "DTB at physical address"
212fc8483fSLey Foon Tan	help
222fc8483fSLey Foon Tan	  When enabled you can select a physical address to load the dtb from.
232fc8483fSLey Foon Tan	  Normally this address is passed by a bootloader such as u-boot but
242fc8483fSLey Foon Tan	  using this you can use a devicetree without a bootloader.
252fc8483fSLey Foon Tan	  This way you can store a devicetree in NOR flash or an onchip rom.
262fc8483fSLey Foon Tan	  Please note that this address is used directly so you have to manually
272fc8483fSLey Foon Tan	  do address translation if it's connected to a bridge. Also take into
282fc8483fSLey Foon Tan	  account that when using an MMU you'd have to ad 0xC0000000 to your
292fc8483fSLey Foon Tan	  address
302fc8483fSLey Foon Tan
312fc8483fSLey Foon Tanconfig NIOS2_DTB_PHYS_ADDR
322fc8483fSLey Foon Tan	hex "DTB Address"
332fc8483fSLey Foon Tan	depends on NIOS2_DTB_AT_PHYS_ADDR
342fc8483fSLey Foon Tan	default "0xC0000000"
352fc8483fSLey Foon Tan	help
362fc8483fSLey Foon Tan	  Physical address of a dtb blob.
372fc8483fSLey Foon Tan
38*3b8241f6SMasahiro Yamadaconfig BUILTIN_DTB
392fc8483fSLey Foon Tan	bool "Compile and link device tree into kernel image"
404a089e95SGuenter Roeck	depends on !COMPILE_TEST
41*3b8241f6SMasahiro Yamada	select GENERIC_BUILTIN_DTB
422fc8483fSLey Foon Tan	help
432fc8483fSLey Foon Tan	  This allows you to specify a dts (device tree source) file
442fc8483fSLey Foon Tan	  which will be compiled and linked into the kernel image.
452fc8483fSLey Foon Tan
46*3b8241f6SMasahiro Yamadaconfig BUILTIN_DTB_NAME
47*3b8241f6SMasahiro Yamada	string "Built-in device tree name"
48*3b8241f6SMasahiro Yamada	depends on BUILTIN_DTB
492fc8483fSLey Foon Tan	default ""
502fc8483fSLey Foon Tan	help
51*3b8241f6SMasahiro Yamada	  Relative path to the device tree without suffix describing your
522fc8483fSLey Foon Tan	  system.
532fc8483fSLey Foon Tan
542fc8483fSLey Foon Tancomment "Nios II instructions"
552fc8483fSLey Foon Tan
56a89988a6SMarek Vasutconfig NIOS2_ARCH_REVISION
57a89988a6SMarek Vasut	int "Select Nios II architecture revision"
58a89988a6SMarek Vasut	range 1 2
59a89988a6SMarek Vasut	default 1
60a89988a6SMarek Vasut	help
61a89988a6SMarek Vasut	  Select between Nios II R1 and Nios II R2 . The architectures
62a89988a6SMarek Vasut	  are binary incompatible. Default is R1 .
63a89988a6SMarek Vasut
642fc8483fSLey Foon Tanconfig NIOS2_HW_MUL_SUPPORT
652fc8483fSLey Foon Tan	bool "Enable MUL instruction"
662fc8483fSLey Foon Tan	help
672fc8483fSLey Foon Tan	  Set to true if you configured the Nios II to include the MUL
682fc8483fSLey Foon Tan	  instruction.  This will enable the -mhw-mul compiler flag.
692fc8483fSLey Foon Tan
702fc8483fSLey Foon Tanconfig NIOS2_HW_MULX_SUPPORT
712fc8483fSLey Foon Tan	bool "Enable MULX instruction"
722fc8483fSLey Foon Tan	help
732fc8483fSLey Foon Tan	  Set to true if you configured the Nios II to include the MULX
742fc8483fSLey Foon Tan	  instruction.  Enables the -mhw-mulx compiler flag.
752fc8483fSLey Foon Tan
762fc8483fSLey Foon Tanconfig NIOS2_HW_DIV_SUPPORT
772fc8483fSLey Foon Tan	bool "Enable DIV instruction"
782fc8483fSLey Foon Tan	help
792fc8483fSLey Foon Tan	  Set to true if you configured the Nios II to include the DIV
802fc8483fSLey Foon Tan	  instruction.  Enables the -mhw-div compiler flag.
812fc8483fSLey Foon Tan
8223460839SMarek Vasutconfig NIOS2_BMX_SUPPORT
8323460839SMarek Vasut	bool "Enable BMX instructions"
8423460839SMarek Vasut	depends on NIOS2_ARCH_REVISION = 2
8523460839SMarek Vasut	help
8623460839SMarek Vasut	  Set to true if you configured the Nios II R2 to include
8723460839SMarek Vasut	  the BMX Bit Manipulation Extension instructions. Enables
8823460839SMarek Vasut	  the -mbmx compiler flag.
8923460839SMarek Vasut
90edebea98SMarek Vasutconfig NIOS2_CDX_SUPPORT
91edebea98SMarek Vasut	bool "Enable CDX instructions"
92edebea98SMarek Vasut	depends on NIOS2_ARCH_REVISION = 2
93edebea98SMarek Vasut	help
94edebea98SMarek Vasut	  Set to true if you configured the Nios II R2 to include
95edebea98SMarek Vasut	  the CDX Bit Manipulation Extension instructions. Enables
96edebea98SMarek Vasut	  the -mcdx compiler flag.
97edebea98SMarek Vasut
982fc8483fSLey Foon Tanconfig NIOS2_FPU_SUPPORT
992fc8483fSLey Foon Tan	bool "Custom floating point instr support"
1002fc8483fSLey Foon Tan	help
1012fc8483fSLey Foon Tan	  Enables the -mcustom-fpu-cfg=60-1 compiler flag.
1022fc8483fSLey Foon Tan
1032fc8483fSLey Foon Tanconfig NIOS2_CI_SWAB_SUPPORT
1042fc8483fSLey Foon Tan	bool "Byteswap custom instruction"
1052fc8483fSLey Foon Tan	help
1062fc8483fSLey Foon Tan	  Use the byteswap (endian converter) Nios II custom instruction provided
1072fc8483fSLey Foon Tan	  by Altera and which can be enabled in QSYS builder. This accelerates
1082fc8483fSLey Foon Tan	  endian conversions in the kernel (e.g. ntohs).
1092fc8483fSLey Foon Tan
1102fc8483fSLey Foon Tanconfig NIOS2_CI_SWAB_NO
1112fc8483fSLey Foon Tan	int "Byteswap custom instruction number" if NIOS2_CI_SWAB_SUPPORT
1122fc8483fSLey Foon Tan	default 0
1132fc8483fSLey Foon Tan	help
1142fc8483fSLey Foon Tan	  Number of the instruction as configured in QSYS Builder.
1152fc8483fSLey Foon Tan
1162fc8483fSLey Foon Tancomment "Cache settings"
1172fc8483fSLey Foon Tan
1182fc8483fSLey Foon Tanconfig CUSTOM_CACHE_SETTINGS
1192fc8483fSLey Foon Tan	bool "Custom cache settings"
1202fc8483fSLey Foon Tan	help
1212fc8483fSLey Foon Tan	  This option allows you to tweak the cache settings used during early
1222fc8483fSLey Foon Tan	  boot (where the information from device tree is not yet available).
1232fc8483fSLey Foon Tan	  There should be no reason to change these values. Linux will work
1242fc8483fSLey Foon Tan	  perfectly fine, even if the Nios II is configured with smaller caches.
1252fc8483fSLey Foon Tan
1262fc8483fSLey Foon Tan	  Say N here unless you know what you are doing.
1272fc8483fSLey Foon Tan
1282fc8483fSLey Foon Tanconfig NIOS2_DCACHE_SIZE
1292fc8483fSLey Foon Tan	hex "D-Cache size" if CUSTOM_CACHE_SETTINGS
1302fc8483fSLey Foon Tan	range 0x200 0x10000
1312fc8483fSLey Foon Tan	default "0x800"
1322fc8483fSLey Foon Tan	help
1332fc8483fSLey Foon Tan	  Maximum possible data cache size.
1342fc8483fSLey Foon Tan
1352fc8483fSLey Foon Tanconfig NIOS2_DCACHE_LINE_SIZE
1362fc8483fSLey Foon Tan	hex "D-Cache line size" if CUSTOM_CACHE_SETTINGS
1372fc8483fSLey Foon Tan	range 0x10 0x20
1382fc8483fSLey Foon Tan	default "0x20"
1392fc8483fSLey Foon Tan	help
1402fc8483fSLey Foon Tan	  Minimum possible data cache line size.
1412fc8483fSLey Foon Tan
1422fc8483fSLey Foon Tanconfig NIOS2_ICACHE_SIZE
1432fc8483fSLey Foon Tan	hex "I-Cache size" if CUSTOM_CACHE_SETTINGS
1442fc8483fSLey Foon Tan	range 0x200 0x10000
1452fc8483fSLey Foon Tan	default "0x1000"
1462fc8483fSLey Foon Tan	help
1472fc8483fSLey Foon Tan	  Maximum possible instruction cache size.
1482fc8483fSLey Foon Tan
1492fc8483fSLey Foon Tanendmenu
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