1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Variscite Symphony carrier board for VAR-SOM-AM62 4 * 5 * Link: https://www.variscite.it/product/single-board-computers/symphony-board/ 6 * 7 * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/ 8 * Copyright (C) 2026 Stefano Radaelli <stefano.r@variscite.com> 9 * 10 */ 11 12/dts-v1/; 13 14#include "k3-am625-var-som.dtsi" 15 16/ { 17 model = "Variscite VAR-SOM-AM62 on Symphony-Board"; 18 compatible = "variscite,var-som-am62-symphony", "variscite,var-som-am62", "ti,am625"; 19 20 aliases { 21 ethernet0 = &cpsw_port1; 22 ethernet1 = &cpsw_port2; 23 mmc0 = &sdhci0; 24 mmc1 = &sdhci1; 25 mmc2 = &sdhci2; 26 serial0 = &main_uart0; 27 serial2 = &main_uart2; 28 serial5 = &main_uart5; 29 serial6 = &main_uart6; 30 spi5 = &main_spi2; 31 usb0 = &usb0; 32 usb1 = &usb1; 33 }; 34 35 chosen { 36 stdout-path = "serial0:115200n8"; 37 }; 38 39 clk_ov5640_fixed: clock-24000000 { 40 #clock-cells = <0>; 41 compatible = "fixed-clock"; 42 clock-frequency = <24000000>; 43 }; 44 45 gpio-keys { 46 compatible = "gpio-keys"; 47 48 button-back { 49 label = "Back"; 50 linux,code = <KEY_BACK>; 51 gpios = <&pca9534 1 GPIO_ACTIVE_LOW>; 52 }; 53 54 button-home { 55 label = "Home"; 56 linux,code = <KEY_HOME>; 57 gpios = <&pca9534 2 GPIO_ACTIVE_LOW>; 58 }; 59 60 button-menu { 61 label = "Menu"; 62 linux,code = <KEY_MENU>; 63 gpios = <&pca9534 3 GPIO_ACTIVE_LOW>; 64 }; 65 }; 66 67 gpio-leds { 68 compatible = "gpio-leds"; 69 70 led-heartbeat { 71 label = "Heartbeat"; 72 linux,default-trigger = "heartbeat"; 73 gpios = <&pca9534 0 GPIO_ACTIVE_LOW>; 74 }; 75 }; 76 77 reg_2p8v: regulator-2p8v { 78 compatible = "regulator-fixed"; 79 regulator-name = "2P8V"; 80 regulator-min-microvolt = <2800000>; 81 regulator-max-microvolt = <2800000>; 82 vin-supply = <®_3v3>; 83 regulator-always-on; 84 }; 85 86 reg_1p8v: regulator-1p8v { 87 compatible = "regulator-fixed"; 88 regulator-name = "1P8V"; 89 regulator-min-microvolt = <1800000>; 90 regulator-max-microvolt = <1800000>; 91 vin-supply = <®_3v3>; 92 regulator-always-on; 93 }; 94 95 reg_1p5v: regulator-1p5v { 96 compatible = "regulator-fixed"; 97 regulator-name = "1P5V"; 98 regulator-min-microvolt = <1500000>; 99 regulator-max-microvolt = <1500000>; 100 vin-supply = <®_3v3>; 101 regulator-always-on; 102 }; 103 104 reg_sdhc1_vmmc: regulator-sdhc1 { 105 compatible = "regulator-fixed"; 106 regulator-name = "+V3.3_SD"; 107 pinctrl-names = "default"; 108 pinctrl-0 = <&pinctrl_sd1_vmmc>; 109 regulator-min-microvolt = <3300000>; 110 regulator-max-microvolt = <3300000>; 111 regulator-boot-on; 112 enable-active-high; 113 gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>; 114 bootph-all; 115 }; 116 117 reg_sdhc1_vqmmc: regulator-sdhci1-vqmmc { 118 compatible = "regulator-gpio"; 119 regulator-name = "+V3.3_SD_VQMMC"; 120 pinctrl-names = "default"; 121 pinctrl-0 = <&pinctrl_sd1_vqmmc>; 122 regulator-min-microvolt = <1800000>; 123 regulator-max-microvolt = <3300000>; 124 regulator-boot-on; 125 gpios = <&main_gpio0 56 GPIO_ACTIVE_HIGH>; 126 states = <1800000 0x0>, 127 <3300000 0x1>; 128 bootph-all; 129 }; 130 131 reg_ov5640_buf_en: regulator-camera-buf-en { 132 compatible = "regulator-fixed"; 133 regulator-name = "ov5640_buf_en"; 134 pinctrl-names = "default"; 135 pinctrl-0 = <&pinctrl_ov5640_buf>; 136 gpios = <&main_gpio0 21 GPIO_ACTIVE_HIGH>; 137 regulator-always-on; 138 regulator-boot-on; 139 }; 140 141 transceiver1: can-phy { 142 compatible = "ti,tcan1042"; 143 #phy-cells = <0>; 144 max-bitrate = <5000000>; 145 }; 146 147 connector { 148 compatible = "gpio-usb-b-connector", "usb-b-connector"; 149 pinctrl-names = "default"; 150 pinctrl-0 = <&pinctrl_extcon>; 151 label = "USB-C"; 152 id-gpios = <&main_gpio1 12 GPIO_ACTIVE_HIGH>; 153 status = "okay"; 154 155 port { 156 usb_con_hs: endpoint { 157 remote-endpoint = <&typec_hs>; 158 }; 159 }; 160 }; 161}; 162 163&cdns_csi2rx0 { 164 ports { 165 #address-cells = <1>; 166 #size-cells = <0>; 167 168 csi0_port0: port@0 { 169 reg = <0>; 170 status = "okay"; 171 172 csi2rx0_in_sensor: endpoint { 173 remote-endpoint = <&csi2_cam0>; 174 bus-type = <4>; /* CSI2 DPHY. */ 175 clock-lanes = <0>; 176 data-lanes = <1 2>; 177 }; 178 }; 179 }; 180}; 181 182&cpsw3g { 183 pinctrl-names = "default"; 184 pinctrl-0 = <&pinctrl_rgmii1>, 185 <&pinctrl_rgmii2>; 186 status = "okay"; 187 188 cpts@3d000 { 189 /* MAP HW3_TS_PUSH to GENF1 */ 190 ti,pps = <2 1>; 191 }; 192}; 193 194&cpsw3g_mdio { 195 pinctrl-names = "default"; 196 pinctrl-0 = <&pinctrl_mdio1>; 197 status = "okay"; 198 199 cpsw3g_phy1: ethernet-phy@5 { 200 compatible = "ethernet-phy-id0283.bc30"; 201 reg = <5>; 202 reset-gpios = <&pca9534 5 GPIO_ACTIVE_LOW>; 203 reset-assert-us = <10000>; 204 reset-deassert-us = <100000>; 205 }; 206}; 207 208&cpsw_port2 { 209 /* 210 * The required RGMII TX and RX 2ns delays are implemented directly 211 * in hardware via passive delay elements on the Symphony PCB. 212 * No delay configuration is needed in software via PHY driver. 213 */ 214 phy-mode = "rgmii"; 215 phy-handle = <&cpsw3g_phy1>; 216 status = "okay"; 217}; 218 219&dphy0 { 220 status = "okay"; 221}; 222 223&epwm1 { 224 status = "okay"; 225 pinctrl-names = "default"; 226 pinctrl-0 = <&pinctrl_epwm1>; 227}; 228 229&main_i2c0 { 230 pinctrl-names = "default"; 231 pinctrl-0 = <&pinctrl_i2c0>; 232 clock-frequency = <400000>; 233 status = "okay"; 234 235 /* GPIO expander */ 236 pca9534: gpio@20 { 237 compatible = "nxp,pca9534"; 238 reg = <0x20>; 239 pinctrl-names = "default"; 240 pinctrl-0 = <&pinctrl_pca9534>; 241 #gpio-cells = <2>; 242 gpio-controller; 243 interrupt-controller; 244 #interrupt-cells = <2>; 245 interrupt-parent = <&main_gpio1>; 246 interrupts = <30 IRQ_TYPE_LEVEL_LOW>; 247 248 usb3-sel-hog { 249 gpio-hog; 250 gpios = <4 0>; 251 output-low; 252 line-name = "usb3_sel"; 253 }; 254 255 eth-som-vselect-hog { 256 gpio-hog; 257 gpios = <6 0>; 258 output-low; 259 line-name = "eth-vselect"; 260 }; 261 262 eth-mdio-enable-hog { 263 gpio-hog; 264 gpios = <7 0>; 265 output-high; 266 line-name = "eth-mdio-enable"; 267 }; 268 }; 269 270 ov5640: camera@3c { 271 compatible = "ovti,ov5640"; 272 reg = <0x3c>; 273 clocks = <&clk_ov5640_fixed>; 274 clock-names = "xclk"; 275 AVDD-supply = <®_2p8v>; 276 DOVDD-supply = <®_1p8v>; 277 DVDD-supply = <®_1p5v>; 278 powerdown-gpios = <&main_gpio0 10 GPIO_ACTIVE_HIGH>; 279 reset-gpios = <&main_gpio0 22 GPIO_ACTIVE_LOW>; 280 pinctrl-names = "default"; 281 pinctrl-0 = <&pinctrl_ov5640>; 282 283 port { 284 csi2_cam0: endpoint { 285 remote-endpoint = <&csi2rx0_in_sensor>; 286 clock-lanes = <0>; 287 data-lanes = <1 2>; 288 }; 289 }; 290 }; 291}; 292 293&main_i2c1 { 294 pinctrl-names = "default"; 295 pinctrl-0 = <&pinctrl_i2c1>; 296 clock-frequency = <400000>; 297 status = "okay"; 298 299 pcal6408: gpio@21 { 300 compatible = "nxp,pcal6408"; 301 reg = <0x21>; 302 gpio-controller; 303 #gpio-cells = <2>; 304 305 /* RGB_SEL */ 306 lvds-brg-enable-hog { 307 gpio-hog; 308 gpios = <7 GPIO_ACTIVE_HIGH>; 309 output-low; 310 line-name = "lvds_brg_en"; 311 }; 312 }; 313 314 st33ktpm2xi2c: tpm@2e { 315 compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c"; 316 label = "tpm"; 317 reg = <0x2e>; 318 reset-gpios = <&pcal6408 4 GPIO_ACTIVE_LOW>; 319 }; 320 321 /* Capacitive touch controller */ 322 ft5x06_ts: touchscreen@38 { 323 compatible = "edt,edt-ft5206"; 324 reg = <0x38>; 325 pinctrl-names = "default"; 326 pinctrl-0 = <&pinctrl_captouch_pins>; 327 interrupt-parent = <&main_gpio1>; 328 interrupts = <16 IRQ_TYPE_EDGE_FALLING>; 329 touchscreen-size-x = <800>; 330 touchscreen-size-y = <480>; 331 touchscreen-inverted-x; 332 touchscreen-inverted-y; 333 wakeup-source; 334 }; 335 336 rtc@68 { 337 compatible = "dallas,ds1337"; 338 reg = <0x68>; 339 }; 340}; 341 342&main_mcan0 { 343 pinctrl-names = "default"; 344 pinctrl-0 = <&pinctrl_mcan0>; 345 phys = <&transceiver1>; 346 status = "okay"; 347}; 348 349&main_pmx0 { 350 pinctrl_captouch_pins: main-captouch-default-pins { 351 pinctrl-single,pins = < 352 AM62X_IOPAD(0x01b8, PIN_INPUT, 7) /* (C13) SPI0_CS1.GPIO1_16 */ 353 >; 354 }; 355 356 pinctrl_epwm1: main-epwm1-default-pins { 357 pinctrl-single,pins = < 358 AM62X_IOPAD(0x019c, PIN_OUTPUT, 6) /* (B18) MCASP0_AXR1.EHRPWM1_A */ 359 >; 360 }; 361 362 pinctrl_extcon: main-extcon-default-pins { 363 pinctrl-single,pins = < 364 AM62X_IOPAD(0x01a8, PIN_INPUT, 7) /* (D20) MCASP0_AFSX.GPIO1_12 */ 365 >; 366 }; 367 368 pinctrl_i2c0: main-i2c0-default-pins { 369 pinctrl-single,pins = < 370 AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */ 371 AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */ 372 >; 373 }; 374 375 pinctrl_i2c1: main-i2c1-default-pins { 376 bootph-all; 377 pinctrl-single,pins = < 378 AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */ 379 AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */ 380 >; 381 }; 382 383 pinctrl_mcan0: main-mcan0-default-pins { 384 pinctrl-single,pins = < 385 AM62X_IOPAD(0x1dc, PIN_INPUT, 0) /* (E15) MCAN0_RX */ 386 AM62X_IOPAD(0x1d8, PIN_OUTPUT, 0) /* (C15) MCAN0_TX */ 387 >; 388 }; 389 390 pinctrl_mmc1: main-mmc1-default-pins { 391 bootph-all; 392 pinctrl-single,pins = < 393 AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ 394 AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ 395 AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ 396 AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ 397 AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ 398 AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ 399 AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */ 400 >; 401 }; 402 403 pinctrl_ov5640: main-ov5640-default-pins { 404 pinctrl-single,pins = < 405 AM62X_IOPAD(0x0028, PIN_OUTPUT, 7) /* (J22) OSPI0_D7.GPIO0_10 */ 406 AM62X_IOPAD(0x0058, PIN_OUTPUT, 7) /* (R23) GPMC0_AD7.GPIO0_22 */ 407 >; 408 }; 409 410 pinctrl_ov5640_buf: main-ov5640-buf-default-pins { 411 pinctrl-single,pins = < 412 AM62X_IOPAD(0x0054, PIN_OUTPUT, 7) /* (P21) GPMC0_AD6.GPIO0_21 */ 413 >; 414 }; 415 416 pinctrl_pca9534: main-pca9534-default-pins { 417 pinctrl-single,pins = < 418 AM62X_IOPAD(0x01f0, PIN_INPUT, 7) /* (A18) EXT_REFCLK1.GPIO1_30 */ 419 >; 420 }; 421 422 pinctrl_rgmii2: main-rgmii2-default-pins { 423 bootph-all; 424 pinctrl-single,pins = < 425 AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */ 426 AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */ 427 AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */ 428 AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */ 429 AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */ 430 AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */ 431 AM62X_IOPAD(0x16c, PIN_INPUT, 0) /* (Y18) RGMII2_TD0 */ 432 AM62X_IOPAD(0x170, PIN_INPUT, 0) /* (AA18) RGMII2_TD1 */ 433 AM62X_IOPAD(0x174, PIN_INPUT, 0) /* (AD21) RGMII2_TD2 */ 434 AM62X_IOPAD(0x178, PIN_INPUT, 0) /* (AC20) RGMII2_TD3 */ 435 AM62X_IOPAD(0x168, PIN_INPUT_PULLDOWN, 0) /* (AE21) RGMII2_TXC */ 436 AM62X_IOPAD(0x164, PIN_INPUT, 0) /* (AA19) RGMII2_TX_CTL */ 437 >; 438 }; 439 440 pinctrl_sd1_vmmc: main-sd1-vmmc-default-pins { 441 pinctrl-single,pins = < 442 AM62X_IOPAD(0x0078, PIN_OUTPUT, 7) /* (U24) GPMC0_AD15.GPIO0_30 */ 443 >; 444 }; 445 446 pinctrl_sd1_vqmmc: main-sd1-vqmmc-default-pins { 447 pinctrl-single,pins = < 448 AM62X_IOPAD(0x00e4, PIN_OUTPUT, 7) /* (AA23) VOUT0_DATA11.GPIO0_56 */ 449 >; 450 }; 451 452 pinctrl_spi2: main-spi2-default-pins { 453 pinctrl-single,pins = < 454 AM62X_IOPAD(0x01b0, PIN_INPUT, 1) /* (A20) MCASP0_ACLKR.SPI2_CLK */ 455 AM62X_IOPAD(0x0194, PIN_OUTPUT, 1) /* (B19) MCASP0_AXR3.SPI2_D0 */ 456 AM62X_IOPAD(0x0198, PIN_INPUT, 1) /* (A19) MCASP0_AXR2.SPI2_D1 */ 457 AM62X_IOPAD(0x01ac, PIN_OUTPUT, 7) /* (E19) MCASP0_AFSR.GPIO1_13 */ 458 >; 459 }; 460 461 pinctrl_uart0: main-uart0-default-pins { 462 bootph-all; 463 pinctrl-single,pins = < 464 AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD, change muxmode from 0 to 7 to deactivate Debug UART RXD */ 465 AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */ 466 >; 467 }; 468 469 pinctrl_uart2: main-uart2-default-pins { 470 pinctrl-single,pins = < 471 AM62X_IOPAD(0x005c, PIN_INPUT_PULLUP, 2) /* (R24) GPMC0_AD8.UART2_RXD */ 472 AM62X_IOPAD(0x0060, PIN_OUTPUT, 2) /* (R25) GPMC0_AD9.UART2_TXD */ 473 >; 474 }; 475 476 pinctrl_uart6: main-uart6-default-pins { 477 pinctrl-single,pins = < 478 AM62X_IOPAD(0x009c, PIN_INPUT, 3) /* (V25) GPMC0_WAIT1.UART6_RXD */ 479 AM62X_IOPAD(0x0244, PIN_OUTPUT, 1) /* (C17) MMC1_SDWP.UART6_TXD */ 480 >; 481 }; 482 483 pinctrl_usb1: main-usb1-default-pins { 484 pinctrl-single,pins = < 485 AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */ 486 >; 487 }; 488}; 489 490&main_spi2 { 491 pinctrl-names = "default"; 492 pinctrl-0 = <&pinctrl_spi2>; 493 ti,pindir-d0-out-d1-in; 494 cs-gpios = <&main_gpio1 13 GPIO_ACTIVE_HIGH>; 495 status = "okay"; 496}; 497 498&main_uart0 { 499 pinctrl-names = "default"; 500 pinctrl-0 = <&pinctrl_uart0>; 501 status = "okay"; 502}; 503 504&main_uart2 { 505 pinctrl-names = "default"; 506 pinctrl-0 = <&pinctrl_uart2>; 507 status = "okay"; 508}; 509 510&main_uart6 { 511 pinctrl-names = "default"; 512 pinctrl-0 = <&pinctrl_uart6>; 513 status = "okay"; 514}; 515 516&sdhci1 { 517 /* SD Card */ 518 vmmc-supply = <®_sdhc1_vmmc>; 519 vqmmc-supply = <®_sdhc1_vqmmc>; 520 pinctrl-names = "default"; 521 pinctrl-0 = <&pinctrl_mmc1>; 522 disable-wp; 523 bootph-all; 524 status = "okay"; 525}; 526 527&ti_csi2rx0 { 528 status = "okay"; 529}; 530 531&usb0 { 532 usb-role-switch; 533 status = "okay"; 534 535 port { 536 typec_hs: endpoint { 537 remote-endpoint = <&usb_con_hs>; 538 }; 539 }; 540}; 541 542&usb1 { 543 dr_mode = "host"; 544 pinctrl-names = "default"; 545 pinctrl-0 = <&pinctrl_usb1>; 546 status = "okay"; 547}; 548 549&usbss0 { 550 status = "okay"; 551}; 552 553&usbss1 { 554 status = "okay"; 555}; 556