1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * Common dtsi for AM625 SK and derivatives 4 * 5 * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ 6 */ 7 8#include "k3-am62x-sk-common.dtsi" 9 10/ { 11 opp-table { 12 /* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */ 13 opp-1400000000 { 14 opp-hz = /bits/ 64 <1400000000>; 15 opp-supported-hw = <0x01 0x0004>; 16 clock-latency-ns = <6000000>; 17 }; 18 }; 19 20 vmain_pd: regulator-0 { 21 /* TPS65988 PD CONTROLLER OUTPUT */ 22 compatible = "regulator-fixed"; 23 regulator-name = "vmain_pd"; 24 regulator-min-microvolt = <5000000>; 25 regulator-max-microvolt = <5000000>; 26 regulator-always-on; 27 regulator-boot-on; 28 bootph-all; 29 }; 30 31 vcc_5v0: regulator-1 { 32 /* Output of LM34936 */ 33 compatible = "regulator-fixed"; 34 regulator-name = "vcc_5v0"; 35 regulator-min-microvolt = <5000000>; 36 regulator-max-microvolt = <5000000>; 37 vin-supply = <&vmain_pd>; 38 regulator-always-on; 39 regulator-boot-on; 40 bootph-all; 41 }; 42 43 vcc_3v3_sys: regulator-2 { 44 /* output of LM61460-Q1 */ 45 compatible = "regulator-fixed"; 46 regulator-name = "vcc_3v3_sys"; 47 regulator-min-microvolt = <3300000>; 48 regulator-max-microvolt = <3300000>; 49 vin-supply = <&vmain_pd>; 50 regulator-always-on; 51 regulator-boot-on; 52 bootph-all; 53 }; 54 55 vdd_mmc1: regulator-3 { 56 /* TPS22918DBVR */ 57 compatible = "regulator-fixed"; 58 regulator-name = "vdd_mmc1"; 59 regulator-min-microvolt = <3300000>; 60 regulator-max-microvolt = <3300000>; 61 regulator-boot-on; 62 enable-active-high; 63 vin-supply = <&vcc_3v3_sys>; 64 gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; 65 bootph-all; 66 }; 67 68 vdd_sd_dv: regulator-4 { 69 /* Output of TLV71033 */ 70 compatible = "regulator-gpio"; 71 regulator-name = "tlv71033"; 72 pinctrl-names = "default"; 73 pinctrl-0 = <&vdd_sd_dv_pins_default>; 74 regulator-min-microvolt = <1800000>; 75 regulator-max-microvolt = <3300000>; 76 regulator-boot-on; 77 vin-supply = <&vcc_5v0>; 78 gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; 79 states = <1800000 0x0>, 80 <3300000 0x1>; 81 bootph-all; 82 }; 83 84 vcc_1v8: regulator-5 { 85 /* output of TPS6282518DMQ */ 86 compatible = "regulator-fixed"; 87 regulator-name = "vcc_1v8"; 88 regulator-min-microvolt = <1800000>; 89 regulator-max-microvolt = <1800000>; 90 vin-supply = <&vcc_3v3_sys>; 91 regulator-always-on; 92 regulator-boot-on; 93 }; 94}; 95 96&main_pmx0 { 97 main_mmc0_pins_default: main-mmc0-default-pins { 98 bootph-all; 99 pinctrl-single,pins = < 100 AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ 101 AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ 102 AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ 103 AM62X_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */ 104 AM62X_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */ 105 AM62X_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */ 106 AM62X_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */ 107 AM62X_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */ 108 AM62X_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */ 109 AM62X_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */ 110 >; 111 }; 112 113 main_rgmii2_pins_default: main-rgmii2-default-pins { 114 bootph-all; 115 pinctrl-single,pins = < 116 AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */ 117 AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */ 118 AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */ 119 AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */ 120 AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */ 121 AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */ 122 AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */ 123 AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */ 124 AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */ 125 AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */ 126 AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */ 127 AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */ 128 >; 129 }; 130 131 ospi0_pins_default: ospi0-default-pins { 132 bootph-all; 133 pinctrl-single,pins = < 134 AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */ 135 AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */ 136 AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */ 137 AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */ 138 AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */ 139 AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */ 140 AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */ 141 AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */ 142 AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */ 143 AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */ 144 AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */ 145 >; 146 }; 147 148 vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { 149 pinctrl-single,pins = < 150 AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */ 151 >; 152 bootph-all; 153 }; 154 155 main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { 156 pinctrl-single,pins = < 157 AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */ 158 >; 159 bootph-all; 160 }; 161}; 162 163&main_gpio0 { 164 bootph-all; 165}; 166 167&main_gpio1 { 168 bootph-all; 169}; 170 171&main_i2c1 { 172 exp1: gpio@22 { 173 compatible = "ti,tca6424"; 174 reg = <0x22>; 175 pinctrl-names = "default"; 176 pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>; 177 interrupt-parent = <&main_gpio1>; 178 interrupts = <23 IRQ_TYPE_EDGE_FALLING>; 179 interrupt-controller; 180 #interrupt-cells = <2>; 181 gpio-controller; 182 #gpio-cells = <2>; 183 gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", 184 "PRU_DETECT", "MMC1_SD_EN", 185 "VPP_LDO_EN", "EXP_PS_3V3_En", 186 "EXP_PS_5V0_En", "EXP_HAT_DETECT", 187 "GPIO_AUD_RSTn", "GPIO_eMMC_RSTn", 188 "UART1_FET_BUF_EN", "WL_LT_EN", 189 "GPIO_HDMI_RSTn", "CSI_GPIO1", 190 "CSI_GPIO2", "PRU_3V3_EN", 191 "HDMI_INTn", "PD_I2C_IRQ", 192 "MCASP1_FET_EN", "MCASP1_BUF_BT_EN", 193 "MCASP1_FET_SEL", "UART1_FET_SEL", 194 "TSINT#", "IO_EXP_TEST_LED"; 195 bootph-all; 196 }; 197}; 198 199&sdhci0 { 200 bootph-all; 201 status = "okay"; 202 pinctrl-names = "default"; 203 pinctrl-0 = <&main_mmc0_pins_default>; 204 disable-wp; 205}; 206 207&sdhci1 { 208 vmmc-supply = <&vdd_mmc1>; 209 vqmmc-supply = <&vdd_sd_dv>; 210}; 211 212&cpsw3g { 213 pinctrl-names = "default"; 214 pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>; 215}; 216 217&cpsw_port2 { 218 /* PCB provides an internal delay of 2ns */ 219 phy-mode = "rgmii-rxid"; 220 phy-handle = <&cpsw3g_phy1>; 221}; 222 223&cpsw3g_mdio { 224 cpsw3g_phy1: ethernet-phy@1 { 225 reg = <1>; 226 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 227 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 228 ti,min-output-impedance; 229 }; 230}; 231 232&fss { 233 bootph-all; 234}; 235 236&ospi0 { 237 status = "okay"; 238 pinctrl-names = "default"; 239 pinctrl-0 = <&ospi0_pins_default>; 240 241 flash@0 { 242 compatible = "jedec,spi-nor"; 243 reg = <0x0>; 244 spi-tx-bus-width = <8>; 245 spi-rx-bus-width = <8>; 246 spi-max-frequency = <25000000>; 247 cdns,tshsl-ns = <60>; 248 cdns,tsd2d-ns = <60>; 249 cdns,tchsh-ns = <60>; 250 cdns,tslch-ns = <60>; 251 cdns,read-delay = <4>; 252 253 partitions { 254 compatible = "fixed-partitions"; 255 #address-cells = <1>; 256 #size-cells = <1>; 257 bootph-all; 258 259 partition@0 { 260 label = "ospi.tiboot3"; 261 reg = <0x0 0x80000>; 262 }; 263 264 partition@80000 { 265 label = "ospi.tispl"; 266 reg = <0x80000 0x200000>; 267 }; 268 269 partition@280000 { 270 label = "ospi.u-boot"; 271 reg = <0x280000 0x400000>; 272 }; 273 274 partition@680000 { 275 label = "ospi.env"; 276 reg = <0x680000 0x40000>; 277 }; 278 279 partition@6c0000 { 280 label = "ospi.env.backup"; 281 reg = <0x6c0000 0x40000>; 282 }; 283 284 partition@800000 { 285 label = "ospi.rootfs"; 286 reg = <0x800000 0x37c0000>; 287 }; 288 289 partition@3fc0000 { 290 bootph-pre-ram; 291 label = "ospi.phypattern"; 292 reg = <0x3fc0000 0x40000>; 293 }; 294 }; 295 }; 296}; 297