1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Device tree for EmbedFire LubanCat-4 SBC. 4 * 5 * Copyright (c) 2026 Pufan Jin <2254650260@qq.com> 6 */ 7 8/dts-v1/; 9 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/leds/common.h> 12#include <dt-bindings/pinctrl/rockchip.h> 13#include <dt-bindings/soc/rockchip,vop2.h> 14#include "rk3588s.dtsi" 15 16/ { 17 model = "EmbedFire LubanCat-4"; 18 compatible = "embedfire,lubancat-4", "rockchip,rk3588s"; 19 20 aliases { 21 ethernet0 = &gmac1; 22 mmc0 = &sdhci; 23 mmc1 = &sdmmc; 24 }; 25 26 chosen { 27 stdout-path = "serial2:1500000n8"; 28 }; 29 30 hdmi0-con { 31 compatible = "hdmi-connector"; 32 type = "a"; 33 34 port { 35 hdmi0_con_in: endpoint { 36 remote-endpoint = <&hdmi0_out_con>; 37 }; 38 }; 39 }; 40 41 leds { 42 compatible = "gpio-leds"; 43 pinctrl-names = "default"; 44 pinctrl-0 = <&sys_status_led_pin>; 45 46 sys-led { 47 color = <LED_COLOR_ID_BLUE>; 48 function = LED_FUNCTION_HEARTBEAT; 49 gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>; 50 linux,default-trigger = "heartbeat"; 51 }; 52 }; 53 54 vcc5v0_dcin: regulator-vcc5v0-dcin { 55 compatible = "regulator-fixed"; 56 regulator-name = "vcc5v0_dcin"; 57 regulator-always-on; 58 regulator-boot-on; 59 regulator-min-microvolt = <5000000>; 60 regulator-max-microvolt = <5000000>; 61 }; 62 63 vcc5v0_sys: regulator-vcc5v0-sys { 64 compatible = "regulator-fixed"; 65 regulator-name = "vcc5v0_sys"; 66 regulator-always-on; 67 regulator-boot-on; 68 regulator-min-microvolt = <5000000>; 69 regulator-max-microvolt = <5000000>; 70 vin-supply = <&vcc5v0_dcin>; 71 }; 72 73 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 74 compatible = "regulator-fixed"; 75 regulator-name = "vcc_1v1_nldo_s3"; 76 regulator-always-on; 77 regulator-boot-on; 78 regulator-min-microvolt = <1100000>; 79 regulator-max-microvolt = <1100000>; 80 vin-supply = <&vcc5v0_sys>; 81 }; 82 83 vcc3v3_pcie20: regulator-vcc3v3-pcie20 { 84 compatible = "regulator-fixed"; 85 regulator-name = "vcc3v3_pcie20"; 86 regulator-always-on; 87 regulator-min-microvolt = <3300000>; 88 regulator-max-microvolt = <3300000>; 89 enable-active-high; 90 gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; 91 startup-delay-us = <5000>; 92 vin-supply = <&vcc5v0_sys>; 93 }; 94 95 vcc5v0_usb20_host: regulator-vcc5v0-usb20-host { 96 compatible = "regulator-fixed"; 97 regulator-name = "vcc5v0_usb20_host"; 98 regulator-min-microvolt = <5000000>; 99 regulator-max-microvolt = <5000000>; 100 enable-active-high; 101 gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; 102 pinctrl-names = "default"; 103 pinctrl-0 = <&usb20_host_pwr_en>; 104 vin-supply = <&vcc5v0_sys>; 105 }; 106 107 vcc5v0_usb30_host: regulator-vcc5v0-usb30-host { 108 compatible = "regulator-fixed"; 109 regulator-name = "vcc5v0_usb30_host"; 110 regulator-min-microvolt = <5000000>; 111 regulator-max-microvolt = <5000000>; 112 enable-active-high; 113 gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; 114 pinctrl-names = "default"; 115 pinctrl-0 = <&usb30_host_pwr_en>; 116 vin-supply = <&vcc5v0_sys>; 117 }; 118 119 fan: pwm-fan { 120 compatible = "pwm-fan"; 121 cooling-levels = <0 100 150 200 255>; 122 pwms = <&pwm0 0 5000 0>; 123 #cooling-cells = <2>; 124 }; 125}; 126 127&combphy0_ps { 128 status = "okay"; 129}; 130 131&combphy2_psu { 132 status = "okay"; 133}; 134 135&cpu_b0 { 136 cpu-supply = <&vdd_cpu_big0_s0>; 137}; 138 139&cpu_b1 { 140 cpu-supply = <&vdd_cpu_big0_s0>; 141}; 142 143&cpu_b2 { 144 cpu-supply = <&vdd_cpu_big1_s0>; 145}; 146 147&cpu_b3 { 148 cpu-supply = <&vdd_cpu_big1_s0>; 149}; 150 151&cpu_l0 { 152 cpu-supply = <&vdd_cpu_lit_s0>; 153}; 154 155&cpu_l1 { 156 cpu-supply = <&vdd_cpu_lit_s0>; 157}; 158 159&cpu_l2 { 160 cpu-supply = <&vdd_cpu_lit_s0>; 161}; 162 163&cpu_l3 { 164 cpu-supply = <&vdd_cpu_lit_s0>; 165}; 166 167&gmac1 { 168 clock_in_out = "output"; 169 phy-handle = <&rgmii_phy1>; 170 /* 171 * The PCB adds ~2ns of trace delay on both TXC and RXC, so the 172 * required RGMII clock skew is provided by the board itself. 173 * Neither the MAC nor the PHY should add any internal delay, 174 * hence "rgmii" (not "rgmii-id") is correct here. 175 */ 176 phy-mode = "rgmii"; 177 pinctrl-0 = <&gmac1_miim 178 &gmac1_tx_bus2 179 &gmac1_rx_bus2 180 &gmac1_rgmii_clk 181 &gmac1_rgmii_bus>; 182 pinctrl-names = "default"; 183 status = "okay"; 184}; 185 186&gpu { 187 mali-supply = <&vdd_gpu_s0>; 188 status = "okay"; 189}; 190 191&hdmi0 { 192 pinctrl-0 = <&hdmim0_tx0_cec 193 &hdmim0_tx0_hpd 194 &hdmim0_tx0_scl 195 &hdmim0_tx0_sda>; 196 pinctrl-names = "default"; 197 status = "okay"; 198}; 199 200&hdmi0_in { 201 hdmi0_in_vp0: endpoint { 202 remote-endpoint = <&vp0_out_hdmi0>; 203 }; 204}; 205 206&hdmi0_out { 207 hdmi0_out_con: endpoint { 208 remote-endpoint = <&hdmi0_con_in>; 209 }; 210}; 211 212&hdptxphy0 { 213 status = "okay"; 214}; 215 216&i2c0 { 217 pinctrl-names = "default"; 218 pinctrl-0 = <&i2c0m2_xfer>; 219 status = "okay"; 220 221 vdd_cpu_big0_s0: regulator@42 { 222 compatible = "rockchip,rk8602"; 223 reg = <0x42>; 224 fcs,suspend-voltage-selector = <1>; 225 regulator-name = "vdd_cpu_big0_s0"; 226 regulator-always-on; 227 regulator-boot-on; 228 regulator-min-microvolt = <550000>; 229 regulator-max-microvolt = <1050000>; 230 regulator-ramp-delay = <2300>; 231 vin-supply = <&vcc5v0_sys>; 232 233 regulator-state-mem { 234 regulator-off-in-suspend; 235 }; 236 }; 237 238 vdd_cpu_big1_s0: regulator@43 { 239 compatible = "rockchip,rk8603", "rockchip,rk8602"; 240 reg = <0x43>; 241 fcs,suspend-voltage-selector = <1>; 242 regulator-name = "vdd_cpu_big1_s0"; 243 regulator-always-on; 244 regulator-boot-on; 245 regulator-min-microvolt = <550000>; 246 regulator-max-microvolt = <1050000>; 247 regulator-ramp-delay = <2300>; 248 vin-supply = <&vcc5v0_sys>; 249 250 regulator-state-mem { 251 regulator-off-in-suspend; 252 }; 253 }; 254 255 hym8563: rtc@51 { 256 compatible = "haoyu,hym8563"; 257 reg = <0x51>; 258 #clock-cells = <0>; 259 clock-output-names = "hym8563"; 260 interrupt-parent = <&gpio0>; 261 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 262 pinctrl-names = "default"; 263 pinctrl-0 = <&hym8563_int>; 264 wakeup-source; 265 }; 266}; 267 268&i2c1 { 269 pinctrl-names = "default"; 270 pinctrl-0 = <&i2c1m2_xfer>; 271 status = "okay"; 272 273 vdd_npu_s0: regulator@42 { 274 compatible = "rockchip,rk8602"; 275 reg = <0x42>; 276 fcs,suspend-voltage-selector = <1>; 277 regulator-name = "vdd_npu_s0"; 278 regulator-always-on; 279 regulator-boot-on; 280 regulator-min-microvolt = <550000>; 281 regulator-max-microvolt = <950000>; 282 regulator-ramp-delay = <2300>; 283 vin-supply = <&vcc5v0_sys>; 284 285 regulator-state-mem { 286 regulator-off-in-suspend; 287 }; 288 }; 289}; 290 291&mdio1 { 292 rgmii_phy1: ethernet-phy@1 { 293 compatible = "ethernet-phy-ieee802.3-c22"; 294 reg = <0x1>; 295 pinctrl-names = "default"; 296 pinctrl-0 = <&gmac1_phy_rst>; 297 reset-assert-us = <20000>; 298 reset-deassert-us = <100000>; 299 reset-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; 300 }; 301}; 302 303&pcie2x1l2 { 304 pinctrl-0 = <&pcie2_reset>; 305 pinctrl-names = "default"; 306 reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; 307 vpcie3v3-supply = <&vcc3v3_pcie20>; 308 status = "okay"; 309}; 310 311&pd_gpu { 312 domain-supply = <&vdd_gpu_s0>; 313}; 314 315&pinctrl { 316 hym8563 { 317 hym8563_int: hym8563-int { 318 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 319 }; 320 }; 321 322 leds { 323 sys_status_led_pin: sys-status-led-pin { 324 rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; 325 }; 326 }; 327 328 gmac1 { 329 gmac1_phy_rst: gmac1-phy-rst { 330 rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 331 }; 332 }; 333 334 pcie { 335 pcie2_reset: pcie2-reset { 336 rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 337 }; 338 }; 339 340 usb { 341 usb20_host_pwr_en: usb20-host-pwr-en { 342 rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 343 }; 344 345 usb30_host_pwr_en: usb30-host-pwr-en { 346 rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 347 }; 348 }; 349}; 350 351&pwm0 { 352 pinctrl-names = "default"; 353 pinctrl-0 = <&pwm0m2_pins>; 354 status = "okay"; 355}; 356 357&saradc { 358 vref-supply = <&avcc_1v8_s0>; 359 status = "okay"; 360}; 361 362&sdhci { 363 bus-width = <8>; 364 no-sdio; 365 no-sd; 366 non-removable; 367 mmc-hs400-1_8v; 368 mmc-hs400-enhanced-strobe; 369 status = "okay"; 370}; 371 372&sdmmc { 373 bus-width = <4>; 374 cap-mmc-highspeed; 375 cap-sd-highspeed; 376 disable-wp; 377 max-frequency = <150000000>; 378 no-mmc; 379 no-sdio; 380 sd-uhs-sdr104; 381 vmmc-supply = <&vcc_3v3_s3>; 382 vqmmc-supply = <&vccio_sd_s0>; 383 status = "okay"; 384}; 385 386&spi2 { 387 assigned-clocks = <&cru CLK_SPI2>; 388 assigned-clock-rates = <200000000>; 389 num-cs = <1>; 390 pinctrl-names = "default"; 391 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 392 status = "okay"; 393 394 pmic@0 { 395 compatible = "rockchip,rk806"; 396 reg = <0x0>; 397 gpio-controller; 398 #gpio-cells = <2>; 399 interrupt-parent = <&gpio0>; 400 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 401 pinctrl-names = "default"; 402 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 403 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 404 spi-max-frequency = <1000000>; 405 system-power-controller; 406 407 vcc1-supply = <&vcc5v0_sys>; 408 vcc2-supply = <&vcc5v0_sys>; 409 vcc3-supply = <&vcc5v0_sys>; 410 vcc4-supply = <&vcc5v0_sys>; 411 vcc5-supply = <&vcc5v0_sys>; 412 vcc6-supply = <&vcc5v0_sys>; 413 vcc7-supply = <&vcc5v0_sys>; 414 vcc8-supply = <&vcc5v0_sys>; 415 vcc9-supply = <&vcc5v0_sys>; 416 vcc10-supply = <&vcc5v0_sys>; 417 vcc11-supply = <&vcc_2v0_pldo_s3>; 418 vcc12-supply = <&vcc5v0_sys>; 419 vcc13-supply = <&vcc_1v1_nldo_s3>; 420 vcc14-supply = <&vcc_1v1_nldo_s3>; 421 vcca-supply = <&vcc5v0_sys>; 422 423 rk806_dvs1_null: dvs1-null-pins { 424 pins = "gpio_pwrctrl1"; 425 function = "pin_fun0"; 426 }; 427 428 rk806_dvs2_null: dvs2-null-pins { 429 pins = "gpio_pwrctrl2"; 430 function = "pin_fun0"; 431 }; 432 433 rk806_dvs3_null: dvs3-null-pins { 434 pins = "gpio_pwrctrl3"; 435 function = "pin_fun0"; 436 }; 437 438 regulators { 439 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 440 regulator-name = "vdd_gpu_s0"; 441 regulator-boot-on; 442 regulator-min-microvolt = <550000>; 443 regulator-max-microvolt = <950000>; 444 regulator-ramp-delay = <12500>; 445 regulator-enable-ramp-delay = <400>; 446 447 regulator-state-mem { 448 regulator-off-in-suspend; 449 }; 450 }; 451 452 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 453 regulator-name = "vdd_cpu_lit_s0"; 454 regulator-always-on; 455 regulator-boot-on; 456 regulator-min-microvolt = <550000>; 457 regulator-max-microvolt = <950000>; 458 regulator-ramp-delay = <12500>; 459 460 regulator-state-mem { 461 regulator-off-in-suspend; 462 }; 463 }; 464 465 vdd_log_s0: dcdc-reg3 { 466 regulator-name = "vdd_log_s0"; 467 regulator-always-on; 468 regulator-boot-on; 469 regulator-min-microvolt = <675000>; 470 regulator-max-microvolt = <750000>; 471 regulator-ramp-delay = <12500>; 472 473 regulator-state-mem { 474 regulator-off-in-suspend; 475 regulator-suspend-microvolt = <750000>; 476 }; 477 }; 478 479 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 480 regulator-name = "vdd_vdenc_s0"; 481 regulator-always-on; 482 regulator-boot-on; 483 regulator-min-microvolt = <550000>; 484 regulator-max-microvolt = <950000>; 485 regulator-ramp-delay = <12500>; 486 487 regulator-state-mem { 488 regulator-off-in-suspend; 489 }; 490 }; 491 492 vdd_ddr_s0: dcdc-reg5 { 493 regulator-name = "vdd_ddr_s0"; 494 regulator-always-on; 495 regulator-boot-on; 496 regulator-min-microvolt = <675000>; 497 regulator-max-microvolt = <900000>; 498 regulator-ramp-delay = <12500>; 499 500 regulator-state-mem { 501 regulator-off-in-suspend; 502 regulator-suspend-microvolt = <850000>; 503 }; 504 }; 505 506 vdd2_ddr_s3: dcdc-reg6 { 507 regulator-name = "vdd2_ddr_s3"; 508 regulator-always-on; 509 regulator-boot-on; 510 511 regulator-state-mem { 512 regulator-on-in-suspend; 513 }; 514 }; 515 516 vcc_2v0_pldo_s3: dcdc-reg7 { 517 regulator-name = "vdd_2v0_pldo_s3"; 518 regulator-always-on; 519 regulator-boot-on; 520 regulator-min-microvolt = <2000000>; 521 regulator-max-microvolt = <2000000>; 522 regulator-ramp-delay = <12500>; 523 524 regulator-state-mem { 525 regulator-on-in-suspend; 526 regulator-suspend-microvolt = <2000000>; 527 }; 528 }; 529 530 vcc_3v3_s3: dcdc-reg8 { 531 regulator-name = "vcc_3v3_s3"; 532 regulator-always-on; 533 regulator-boot-on; 534 regulator-min-microvolt = <3300000>; 535 regulator-max-microvolt = <3300000>; 536 537 regulator-state-mem { 538 regulator-on-in-suspend; 539 regulator-suspend-microvolt = <3300000>; 540 }; 541 }; 542 543 vddq_ddr_s0: dcdc-reg9 { 544 regulator-name = "vddq_ddr_s0"; 545 regulator-always-on; 546 regulator-boot-on; 547 548 regulator-state-mem { 549 regulator-off-in-suspend; 550 }; 551 }; 552 553 vcc_1v8_s3: dcdc-reg10 { 554 regulator-name = "vcc_1v8_s3"; 555 regulator-always-on; 556 regulator-boot-on; 557 regulator-min-microvolt = <1800000>; 558 regulator-max-microvolt = <1800000>; 559 560 regulator-state-mem { 561 regulator-on-in-suspend; 562 regulator-suspend-microvolt = <1800000>; 563 }; 564 }; 565 566 vcc_1v8_s0: pldo-reg1 { 567 regulator-name = "vcc_1v8_s0"; 568 regulator-always-on; 569 regulator-boot-on; 570 regulator-min-microvolt = <1800000>; 571 regulator-max-microvolt = <1800000>; 572 573 regulator-state-mem { 574 regulator-off-in-suspend; 575 regulator-suspend-microvolt = <1800000>; 576 }; 577 }; 578 579 avcc_1v8_s0: pldo-reg2 { 580 regulator-name = "avcc_1v8_s0"; 581 regulator-always-on; 582 regulator-boot-on; 583 regulator-min-microvolt = <1800000>; 584 regulator-max-microvolt = <1800000>; 585 586 regulator-state-mem { 587 regulator-off-in-suspend; 588 }; 589 }; 590 591 avdd_1v2_s0: pldo-reg3 { 592 regulator-name = "avdd_1v2_s0"; 593 regulator-always-on; 594 regulator-boot-on; 595 regulator-min-microvolt = <1200000>; 596 regulator-max-microvolt = <1200000>; 597 598 regulator-state-mem { 599 regulator-off-in-suspend; 600 }; 601 }; 602 603 vcc_3v3_s0: pldo-reg4 { 604 regulator-name = "vcc_3v3_s0"; 605 regulator-always-on; 606 regulator-boot-on; 607 regulator-min-microvolt = <3300000>; 608 regulator-max-microvolt = <3300000>; 609 regulator-ramp-delay = <12500>; 610 611 regulator-state-mem { 612 regulator-off-in-suspend; 613 }; 614 }; 615 616 vccio_sd_s0: pldo-reg5 { 617 regulator-name = "vccio_sd_s0"; 618 regulator-always-on; 619 regulator-boot-on; 620 regulator-min-microvolt = <1800000>; 621 regulator-max-microvolt = <3300000>; 622 regulator-ramp-delay = <12500>; 623 624 regulator-state-mem { 625 regulator-off-in-suspend; 626 }; 627 }; 628 629 pldo6_s3: pldo-reg6 { 630 regulator-name = "pldo6_s3"; 631 regulator-always-on; 632 regulator-boot-on; 633 regulator-min-microvolt = <1800000>; 634 regulator-max-microvolt = <1800000>; 635 636 regulator-state-mem { 637 regulator-on-in-suspend; 638 regulator-suspend-microvolt = <1800000>; 639 }; 640 }; 641 642 vdd_0v75_s3: nldo-reg1 { 643 regulator-name = "vdd_0v75_s3"; 644 regulator-always-on; 645 regulator-boot-on; 646 regulator-min-microvolt = <750000>; 647 regulator-max-microvolt = <750000>; 648 649 regulator-state-mem { 650 regulator-on-in-suspend; 651 regulator-suspend-microvolt = <750000>; 652 }; 653 }; 654 655 vdd_ddr_pll_s0: nldo-reg2 { 656 regulator-name = "vdd_ddr_pll_s0"; 657 regulator-always-on; 658 regulator-boot-on; 659 regulator-min-microvolt = <850000>; 660 regulator-max-microvolt = <850000>; 661 662 regulator-state-mem { 663 regulator-off-in-suspend; 664 regulator-suspend-microvolt = <850000>; 665 }; 666 }; 667 668 avdd_0v75_s0: nldo-reg3 { 669 regulator-name = "avdd_0v75_s0"; 670 regulator-always-on; 671 regulator-boot-on; 672 regulator-min-microvolt = <750000>; 673 regulator-max-microvolt = <750000>; 674 675 regulator-state-mem { 676 regulator-off-in-suspend; 677 }; 678 }; 679 680 vdd_0v85_s0: nldo-reg4 { 681 regulator-name = "vdd_0v85_s0"; 682 regulator-always-on; 683 regulator-boot-on; 684 regulator-min-microvolt = <850000>; 685 regulator-max-microvolt = <850000>; 686 687 regulator-state-mem { 688 regulator-off-in-suspend; 689 }; 690 }; 691 692 vdd_0v75_s0: nldo-reg5 { 693 regulator-name = "vdd_0v75_s0"; 694 regulator-always-on; 695 regulator-boot-on; 696 regulator-min-microvolt = <750000>; 697 regulator-max-microvolt = <750000>; 698 699 regulator-state-mem { 700 regulator-off-in-suspend; 701 }; 702 }; 703 }; 704 }; 705}; 706 707&tsadc { 708 status = "okay"; 709}; 710 711&u2phy0 { 712 status = "okay"; 713}; 714 715&u2phy0_otg { 716 status = "okay"; 717}; 718 719&u2phy2 { 720 status = "okay"; 721}; 722 723&u2phy2_host { 724 phy-supply = <&vcc5v0_usb30_host>; 725 status = "okay"; 726}; 727 728&u2phy3 { 729 status = "okay"; 730}; 731 732&u2phy3_host { 733 phy-supply = <&vcc5v0_usb20_host>; 734 status = "okay"; 735}; 736 737&uart2 { 738 pinctrl-0 = <&uart2m0_xfer>; 739 pinctrl-names = "default"; 740 status = "okay"; 741}; 742 743&usb_host0_ehci { 744 status = "okay"; 745}; 746 747&usb_host0_ohci { 748 status = "okay"; 749}; 750 751&usb_host0_xhci { 752 dr_mode = "host"; 753 status = "okay"; 754}; 755 756&usb_host1_ehci { 757 status = "okay"; 758}; 759 760&usb_host1_ohci { 761 status = "okay"; 762}; 763 764&usb_host2_xhci { 765 status = "okay"; 766}; 767 768&usbdp_phy0 { 769 status = "okay"; 770}; 771 772&vop { 773 status = "okay"; 774}; 775 776&vop_mmu { 777 status = "okay"; 778}; 779 780&vp0 { 781 vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 782 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 783 remote-endpoint = <&hdmi0_in_vp0>; 784 }; 785}; 786