1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3/dts-v1/; 4 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/input/linux-event-codes.h> 7#include <dt-bindings/leds/common.h> 8#include <dt-bindings/pinctrl/rockchip.h> 9#include <dt-bindings/soc/rockchip,vop2.h> 10#include "rk3588.dtsi" 11 12/ { 13 model = "Vicharak Vaaman2"; 14 compatible = "vicharak,vaaman2", "rockchip,rk3588"; 15 16 aliases { 17 mmc0 = &sdmmc; 18 mmc1 = &sdhci; 19 serial2 = &uart2; 20 }; 21 22 chosen { 23 stdout-path = "serial2:1500000n8"; 24 }; 25 26 leds { 27 compatible = "gpio-leds"; 28 29 status_led: led-0 { 30 default-state = "on"; 31 function = LED_FUNCTION_STATUS; 32 gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_LOW>; 33 retain-state-suspended; 34 linux,default-trigger = "heartbeat"; 35 }; 36 }; 37 38 vcc20v_dcin: regulator-vcc20v-dcin { 39 compatible = "regulator-fixed"; 40 regulator-always-on; 41 regulator-boot-on; 42 regulator-min-microvolt = <20000000>; 43 regulator-max-microvolt = <20000000>; 44 regulator-name = "vcc20v_dcin"; 45 }; 46 47 vcc5v0_sys: regulator-vcc5v0-sys { 48 compatible = "regulator-fixed"; 49 regulator-always-on; 50 regulator-boot-on; 51 regulator-min-microvolt = <5000000>; 52 regulator-max-microvolt = <5000000>; 53 vin-supply = <&vcc20v_dcin>; 54 regulator-name = "vcc5v0_sys"; 55 }; 56 57 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 58 compatible = "regulator-fixed"; 59 regulator-always-on; 60 regulator-boot-on; 61 regulator-min-microvolt = <1100000>; 62 regulator-max-microvolt = <1100000>; 63 regulator-name = "vcc_1v1_nldo_s3"; 64 vin-supply = <&vcc5v0_sys>; 65 }; 66}; 67 68&cpu_b0 { 69 cpu-supply = <&vdd_cpu_big0_s0>; 70}; 71 72&cpu_b1 { 73 cpu-supply = <&vdd_cpu_big0_s0>; 74}; 75 76&cpu_b2 { 77 cpu-supply = <&vdd_cpu_big1_s0>; 78}; 79 80&cpu_b3 { 81 cpu-supply = <&vdd_cpu_big1_s0>; 82}; 83 84&cpu_l0 { 85 cpu-supply = <&vdd_cpu_lit_s0>; 86}; 87 88&cpu_l1 { 89 cpu-supply = <&vdd_cpu_lit_s0>; 90}; 91 92&cpu_l2 { 93 cpu-supply = <&vdd_cpu_lit_s0>; 94}; 95 96&cpu_l3 { 97 cpu-supply = <&vdd_cpu_lit_s0>; 98}; 99 100&i2c0 { 101 pinctrl-0 = <&i2c0m2_xfer>; 102 pinctrl-names = "default"; 103 status = "okay"; 104 105 vdd_cpu_big0_s0: regulator@42 { 106 compatible = "rockchip,rk8602"; 107 reg = <0x42>; 108 regulator-always-on; 109 regulator-boot-on; 110 regulator-max-microvolt = <1050000>; 111 regulator-min-microvolt = <550000>; 112 regulator-name = "vdd_cpu_big0_s0"; 113 regulator-ramp-delay = <2300>; 114 vin-supply = <&vcc5v0_sys>; 115 fcs,suspend-voltage-selector = <1>; 116 117 regulator-state-mem { 118 regulator-off-in-suspend; 119 }; 120 }; 121 122 vdd_cpu_big1_s0: regulator@43 { 123 compatible = "rockchip,rk8603", "rockchip,rk8602"; 124 reg = <0x43>; 125 regulator-always-on; 126 regulator-boot-on; 127 regulator-max-microvolt = <1050000>; 128 regulator-min-microvolt = <550000>; 129 regulator-name = "vdd_cpu_big1_s0"; 130 regulator-ramp-delay = <2300>; 131 vin-supply = <&vcc5v0_sys>; 132 fcs,suspend-voltage-selector = <1>; 133 134 regulator-state-mem { 135 regulator-off-in-suspend; 136 }; 137 }; 138 139 hym8563: rtc@51 { 140 compatible = "haoyu,hym8563"; 141 reg = <0x51>; 142 #clock-cells = <0>; 143 clock-output-names = "hym8563"; 144 interrupt-parent = <&gpio0>; 145 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 146 pinctrl-names = "default"; 147 pinctrl-0 = <&rtc_int>; 148 wakeup-source; 149 }; 150}; 151 152&i2c1 { 153 pinctrl-names = "default"; 154 pinctrl-0 = <&i2c1m2_xfer>; 155 status = "okay"; 156 157 vdd_npu_s0: regulator@42 { 158 compatible = "rockchip,rk8602"; 159 reg = <0x42>; 160 regulator-name = "vdd_npu_s0"; 161 regulator-boot-on; 162 regulator-enable-ramp-delay = <500>; 163 regulator-min-microvolt = <550000>; 164 regulator-max-microvolt = <950000>; 165 regulator-ramp-delay = <2300>; 166 vin-supply = <&vcc5v0_sys>; 167 fcs,suspend-voltage-selector = <1>; 168 169 regulator-state-mem { 170 regulator-off-in-suspend; 171 }; 172 }; 173}; 174 175&sdhci { 176 bus-width = <8>; 177 full-pwr-cycle-in-suspend; 178 mmc-hs400-1_8v; 179 mmc-hs400-enhanced-strobe; 180 no-sd; 181 no-sdio; 182 non-removable; 183 vmmc-supply = <&vcc_3v3_s3>; 184 vqmmc-supply = <&vcc_1v8_s3>; 185 status = "okay"; 186}; 187 188&sdmmc { 189 bus-width = <4>; 190 cap-mmc-highspeed; 191 cap-sd-highspeed; 192 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 193 disable-wp; 194 max-frequency = <200000000>; 195 no-mmc; 196 no-sdio; 197 sd-uhs-sdr104; 198 vmmc-supply = <&vcc_3v3_s3>; 199 vqmmc-supply = <&vccio_sd_s0>; 200 status = "okay"; 201}; 202 203&spi2 { 204 assigned-clock-rates = <200000000>; 205 assigned-clocks = <&cru CLK_SPI2>; 206 num-cs = <1>; 207 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 208 pinctrl-names = "default"; 209 #address-cells = <1>; 210 #size-cells = <0>; 211 status = "okay"; 212 213 pmic@0 { 214 compatible = "rockchip,rk806"; 215 reg = <0>; 216 #gpio-cells = <2>; 217 gpio-controller; 218 interrupt-parent = <&gpio0>; 219 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 220 pinctrl-names = "default"; 221 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 222 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 223 spi-max-frequency = <1000000>; 224 225 vcc1-supply = <&vcc5v0_sys>; 226 vcc2-supply = <&vcc5v0_sys>; 227 vcc3-supply = <&vcc5v0_sys>; 228 vcc4-supply = <&vcc5v0_sys>; 229 vcc5-supply = <&vcc5v0_sys>; 230 vcc6-supply = <&vcc5v0_sys>; 231 vcc7-supply = <&vcc5v0_sys>; 232 vcc8-supply = <&vcc5v0_sys>; 233 vcc9-supply = <&vcc5v0_sys>; 234 vcc10-supply = <&vcc5v0_sys>; 235 vcc11-supply = <&vcc_2v0_pldo_s3>; 236 vcc12-supply = <&vcc5v0_sys>; 237 vcc13-supply = <&vcc_1v1_nldo_s3>; 238 vcc14-supply = <&vcc_1v1_nldo_s3>; 239 vcca-supply = <&vcc5v0_sys>; 240 241 rk806_dvs1_null: dvs1-null-pins { 242 pins = "gpio_pwrctrl1"; 243 function = "pin_fun0"; 244 }; 245 246 rk806_dvs2_null: dvs2-null-pins { 247 pins = "gpio_pwrctrl2"; 248 function = "pin_fun0"; 249 }; 250 251 rk806_dvs3_null: dvs3-null-pins { 252 pins = "gpio_pwrctrl3"; 253 function = "pin_fun0"; 254 }; 255 256 regulators { 257 vdd_gpu_s0: dcdc-reg1 { 258 regulator-boot-on; 259 regulator-enable-ramp-delay = <400>; 260 regulator-min-microvolt = <550000>; 261 regulator-max-microvolt = <950000>; 262 regulator-name = "vdd_gpu_s0"; 263 regulator-ramp-delay = <12500>; 264 265 regulator-state-mem { 266 regulator-off-in-suspend; 267 }; 268 }; 269 270 vdd_cpu_lit_s0: dcdc-reg2 { 271 regulator-always-on; 272 regulator-boot-on; 273 regulator-min-microvolt = <550000>; 274 regulator-max-microvolt = <950000>; 275 regulator-name = "vdd_cpu_lit_s0"; 276 regulator-ramp-delay = <12500>; 277 278 regulator-state-mem { 279 regulator-off-in-suspend; 280 }; 281 }; 282 283 vdd_log_s0: dcdc-reg3 { 284 regulator-always-on; 285 regulator-boot-on; 286 regulator-min-microvolt = <675000>; 287 regulator-max-microvolt = <750000>; 288 regulator-name = "vdd_log_s0"; 289 regulator-ramp-delay = <12500>; 290 291 regulator-state-mem { 292 regulator-off-in-suspend; 293 }; 294 }; 295 296 vdd_vdenc_s0: dcdc-reg4 { 297 regulator-always-on; 298 regulator-boot-on; 299 regulator-min-microvolt = <550000>; 300 regulator-max-microvolt = <950000>; 301 regulator-ramp-delay = <12500>; 302 regulator-name = "vdd_vdenc_s0"; 303 304 regulator-state-mem { 305 regulator-off-in-suspend; 306 }; 307 }; 308 309 vdd_ddr_s0: dcdc-reg5 { 310 regulator-always-on; 311 regulator-boot-on; 312 regulator-min-microvolt = <675000>; 313 regulator-max-microvolt = <900000>; 314 regulator-ramp-delay = <12500>; 315 regulator-name = "vdd_ddr_s0"; 316 317 regulator-state-mem { 318 regulator-off-in-suspend; 319 }; 320 }; 321 322 vdd2_ddr_s3: dcdc-reg6 { 323 regulator-always-on; 324 regulator-boot-on; 325 regulator-name = "vdd2_ddr_s3"; 326 327 regulator-state-mem { 328 regulator-on-in-suspend; 329 }; 330 }; 331 332 vcc_2v0_pldo_s3: dcdc-reg7 { 333 regulator-always-on; 334 regulator-boot-on; 335 regulator-min-microvolt = <2000000>; 336 regulator-max-microvolt = <2000000>; 337 regulator-name = "vdd_2v0_pldo_s3"; 338 339 regulator-state-mem { 340 regulator-on-in-suspend; 341 }; 342 }; 343 344 vcc_3v3_s3: dcdc-reg8 { 345 regulator-always-on; 346 regulator-boot-on; 347 regulator-min-microvolt = <3300000>; 348 regulator-max-microvolt = <3300000>; 349 regulator-name = "vcc_3v3_s3"; 350 351 regulator-state-mem { 352 regulator-on-in-suspend; 353 }; 354 }; 355 356 vddq_ddr_s0: dcdc-reg9 { 357 regulator-always-on; 358 regulator-boot-on; 359 regulator-name = "vddq_ddr_s0"; 360 361 regulator-state-mem { 362 regulator-off-in-suspend; 363 }; 364 }; 365 366 vcc_1v8_s3: dcdc-reg10 { 367 regulator-always-on; 368 regulator-boot-on; 369 regulator-min-microvolt = <1800000>; 370 regulator-max-microvolt = <1800000>; 371 regulator-name = "vcc_1v8_s3"; 372 373 regulator-state-mem { 374 regulator-on-in-suspend; 375 }; 376 }; 377 378 avcc_1v8_s0: pldo-reg1 { 379 regulator-always-on; 380 regulator-boot-on; 381 regulator-min-microvolt = <1800000>; 382 regulator-max-microvolt = <1800000>; 383 regulator-name = "avcc_1v8_s0"; 384 385 regulator-state-mem { 386 regulator-off-in-suspend; 387 }; 388 }; 389 390 vcc_1v8_s0: pldo-reg2 { 391 regulator-always-on; 392 regulator-boot-on; 393 regulator-min-microvolt = <1800000>; 394 regulator-max-microvolt = <1800000>; 395 regulator-name = "vcc_1v8_s0"; 396 397 regulator-state-mem { 398 regulator-off-in-suspend; 399 }; 400 }; 401 402 avdd_1v2_s0: pldo-reg3 { 403 regulator-always-on; 404 regulator-boot-on; 405 regulator-min-microvolt = <1200000>; 406 regulator-max-microvolt = <1200000>; 407 regulator-name = "avdd_1v2_s0"; 408 409 regulator-state-mem { 410 regulator-off-in-suspend; 411 }; 412 }; 413 414 vcc_3v3_s0: pldo-reg4 { 415 regulator-always-on; 416 regulator-boot-on; 417 regulator-min-microvolt = <3300000>; 418 regulator-max-microvolt = <3300000>; 419 regulator-name = "vcc_3v3_s0"; 420 421 regulator-state-mem { 422 regulator-off-in-suspend; 423 }; 424 }; 425 426 vccio_sd_s0: pldo-reg5 { 427 regulator-always-on; 428 regulator-boot-on; 429 regulator-min-microvolt = <1800000>; 430 regulator-max-microvolt = <3300000>; 431 regulator-name = "vccio_sd_s0"; 432 433 regulator-state-mem { 434 regulator-off-in-suspend; 435 }; 436 }; 437 438 pldo6_s3: pldo-reg6 { 439 regulator-always-on; 440 regulator-boot-on; 441 regulator-min-microvolt = <1800000>; 442 regulator-max-microvolt = <1800000>; 443 regulator-name = "pldo6_s3"; 444 445 regulator-state-mem { 446 regulator-on-in-suspend; 447 }; 448 }; 449 450 vdd_0v75_s3: nldo-reg1 { 451 regulator-always-on; 452 regulator-boot-on; 453 regulator-min-microvolt = <750000>; 454 regulator-max-microvolt = <750000>; 455 regulator-name = "vdd_0v75_s3"; 456 457 regulator-state-mem { 458 regulator-on-in-suspend; 459 }; 460 }; 461 462 vdd_ddr_pll_s0: nldo-reg2 { 463 regulator-always-on; 464 regulator-boot-on; 465 regulator-min-microvolt = <850000>; 466 regulator-max-microvolt = <850000>; 467 regulator-name = "vdd_ddr_pll_s0"; 468 469 regulator-state-mem { 470 regulator-off-in-suspend; 471 }; 472 }; 473 474 avdd_0v75_s0: nldo-reg3 { 475 regulator-always-on; 476 regulator-boot-on; 477 regulator-min-microvolt = <837500>; 478 regulator-max-microvolt = <837500>; 479 regulator-name = "avdd_0v75_s0"; 480 481 regulator-state-mem { 482 regulator-off-in-suspend; 483 }; 484 }; 485 486 vdd_0v85_s0: nldo-reg4 { 487 regulator-always-on; 488 regulator-boot-on; 489 regulator-min-microvolt = <850000>; 490 regulator-max-microvolt = <850000>; 491 regulator-name = "vdd_0v85_s0"; 492 493 regulator-state-mem { 494 regulator-off-in-suspend; 495 }; 496 }; 497 498 vdd_0v75_s0: nldo-reg5 { 499 regulator-always-on; 500 regulator-boot-on; 501 regulator-min-microvolt = <750000>; 502 regulator-max-microvolt = <750000>; 503 regulator-name = "vdd_0v75_s0"; 504 505 regulator-state-mem { 506 regulator-off-in-suspend; 507 }; 508 }; 509 }; 510 }; 511}; 512 513&pinctrl { 514 hym8563 { 515 rtc_int: rtc-int { 516 rockchip,pins = 517 <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 518 }; 519 }; 520}; 521 522&saradc { 523 vref-supply = <&avcc_1v8_s0>; 524 status = "okay"; 525}; 526 527&tsadc { 528 status = "okay"; 529}; 530 531&uart2 { 532 pinctrl-names = "default"; 533 pinctrl-0 = <&uart2m0_xfer>; 534 status = "okay"; 535}; 536