1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3/dts-v1/; 4 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/input/linux-event-codes.h> 7#include <dt-bindings/leds/common.h> 8#include <dt-bindings/pinctrl/rockchip.h> 9#include <dt-bindings/soc/rockchip,vop2.h> 10#include "rk3588.dtsi" 11 12/ { 13 model = "Vicharak Axon"; 14 compatible = "vicharak,axon", "rockchip,rk3588"; 15 16 aliases { 17 mmc0 = &sdmmc; 18 mmc1 = &sdhci; 19 serial2 = &uart2; 20 }; 21 22 chosen { 23 stdout-path = "serial2:1500000n8"; 24 }; 25 26 hdmi0-con { 27 compatible = "hdmi-connector"; 28 type = "a"; 29 30 port { 31 hdmi0_con_in: endpoint { 32 remote-endpoint = <&hdmi0_out_con>; 33 }; 34 }; 35 }; 36 37 hdmi1-con { 38 compatible = "hdmi-connector"; 39 type = "a"; 40 41 port { 42 hdmi1_con_in: endpoint { 43 remote-endpoint = <&hdmi1_out_con>; 44 }; 45 }; 46 }; 47 48 leds { 49 compatible = "gpio-leds"; 50 51 power_led: led-0 { 52 color = <LED_COLOR_ID_GREEN>; 53 function = LED_FUNCTION_STATUS; 54 gpios = <&pca9554 0 GPIO_ACTIVE_HIGH>; 55 linux,default-trigger = "heartbeat"; 56 }; 57 58 status_led: led-1 { 59 color = <LED_COLOR_ID_RED>; 60 function = LED_FUNCTION_STATUS; 61 gpios = <&pca9554 1 GPIO_ACTIVE_HIGH>; 62 linux,default-trigger = "none"; 63 }; 64 }; 65 66 vcc12v_dcin: regulator-vcc12v-dcin { 67 compatible = "regulator-fixed"; 68 regulator-name = "vcc12v_dcin"; 69 regulator-always-on; 70 regulator-boot-on; 71 regulator-min-microvolt = <12000000>; 72 regulator-max-microvolt = <12000000>; 73 }; 74 75 vcc3v3_io_expander: regulator-vcc3v3-io-expander { 76 compatible = "regulator-fixed"; 77 regulator-name = "vcc3v3_io_expander"; 78 regulator-boot-on; 79 regulator-always-on; 80 regulator-min-microvolt = <3300000>; 81 regulator-max-microvolt = <3300000>; 82 }; 83 84 vcc3v3_pcie20_sata30: regulator-vcc3v3-pcie20-sata30 { 85 compatible = "regulator-fixed"; 86 enable-active-high; 87 gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; 88 regulator-name = "vcc3v3_pcie20_sata30"; 89 regulator-boot-on; 90 regulator-always-on; 91 regulator-max-microvolt = <3300000>; 92 regulator-min-microvolt = <3300000>; 93 vin-supply = <&vcc12v_dcin>; 94 }; 95 96 vcc3v3_pcie30: regulator-vcc3v3-pcie30 { 97 compatible = "regulator-fixed"; 98 enable-active-high; 99 gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; 100 regulator-name = "vcc3v3_pcie30"; 101 regulator-boot-on; 102 regulator-always-on; 103 regulator-min-microvolt = <3300000>; 104 regulator-max-microvolt = <3300000>; 105 vin-supply = <&vcc12v_dcin>; 106 }; 107 108 vcc5v0_sys: regulator-vcc5v0-sys { 109 compatible = "regulator-fixed"; 110 regulator-name = "vcc5v0_sys"; 111 regulator-always-on; 112 regulator-boot-on; 113 regulator-min-microvolt = <5000000>; 114 regulator-max-microvolt = <5000000>; 115 vin-supply = <&vcc12v_dcin>; 116 }; 117 118 vcc5v0_usb20_host: regulator-vcc5v0-usb20-host { 119 compatible = "regulator-fixed"; 120 regulator-name = "vcc5v0_usb20_host"; 121 regulator-boot-on; 122 regulator-always-on; 123 regulator-min-microvolt = <5000000>; 124 regulator-max-microvolt = <5000000>; 125 vin-supply = <&vcc5v0_sys>; 126 }; 127 128 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 129 compatible = "regulator-fixed"; 130 regulator-name = "vcc_1v1_nldo_s3"; 131 regulator-always-on; 132 regulator-boot-on; 133 regulator-min-microvolt = <1100000>; 134 regulator-max-microvolt = <1100000>; 135 vin-supply = <&vcc5v0_sys>; 136 }; 137}; 138 139&combphy0_ps { 140 status = "okay"; 141}; 142 143&combphy1_ps { 144 status = "okay"; 145}; 146 147&combphy2_psu { 148 status = "okay"; 149}; 150 151&cpu_b0 { 152 cpu-supply = <&vdd_cpu_big0_s0>; 153}; 154 155&cpu_b1 { 156 cpu-supply = <&vdd_cpu_big0_s0>; 157}; 158 159&cpu_b2 { 160 cpu-supply = <&vdd_cpu_big1_s0>; 161}; 162 163&cpu_b3 { 164 cpu-supply = <&vdd_cpu_big1_s0>; 165}; 166 167&cpu_l0 { 168 cpu-supply = <&vdd_cpu_lit_s0>; 169}; 170 171&cpu_l1 { 172 cpu-supply = <&vdd_cpu_lit_s0>; 173}; 174 175&cpu_l2 { 176 cpu-supply = <&vdd_cpu_lit_s0>; 177}; 178 179&cpu_l3 { 180 cpu-supply = <&vdd_cpu_lit_s0>; 181}; 182 183&gmac1 { 184 clock_in_out = "output"; 185 phy-handle = <&rgmii_phy>; 186 phy-mode = "rgmii-rxid"; 187 phy-supply = <&vcc_3v3_s3>; 188 pinctrl-0 = <&gmac1_rgmii_bus 189 &gmac1_rgmii_clk 190 &gmac1_rx_bus2 191 &gmac1_tx_bus2 192 &gmac1_miim>; 193 pinctrl-names = "default"; 194 snps,reset-active-low; 195 snps,reset-delays-us = <0 20000 100000>; 196 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 197 tx_delay = <0x43>; 198 status = "okay"; 199}; 200 201&gpu { 202 mali-supply = <&vdd_gpu_s0>; 203 status = "okay"; 204}; 205 206&hdmi0 { 207 status = "okay"; 208}; 209 210&hdmi0_in { 211 hdmi0_in_vp0: endpoint { 212 remote-endpoint = <&vp0_out_hdmi0>; 213 }; 214}; 215 216&hdmi0_out { 217 hdmi0_out_con: endpoint { 218 remote-endpoint = <&hdmi0_con_in>; 219 }; 220}; 221 222&hdmi0_sound { 223 status = "okay"; 224}; 225 226&hdmi1 { 227 status = "okay"; 228}; 229 230&hdmi1_in { 231 hdmi1_in_vp1: endpoint { 232 remote-endpoint = <&vp1_out_hdmi1>; 233 }; 234}; 235 236&hdmi1_out { 237 hdmi1_out_con: endpoint { 238 remote-endpoint = <&hdmi1_con_in>; 239 }; 240}; 241 242&hdmi1_sound { 243 status = "okay"; 244}; 245 246&hdmi_receiver { 247 hpd-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>; 248 pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>; 249 pinctrl-names = "default"; 250 status = "okay"; 251}; 252 253&hdmi_receiver_cma { 254 status = "okay"; 255}; 256 257&hdptxphy0 { 258 status = "okay"; 259}; 260 261&hdptxphy1 { 262 status = "okay"; 263}; 264 265&i2c0 { 266 pinctrl-0 = <&i2c0m2_xfer>; 267 pinctrl-names = "default"; 268 status = "okay"; 269 270 vdd_cpu_big0_s0: regulator@42 { 271 compatible = "rockchip,rk8602"; 272 reg = <0x42>; 273 fcs,suspend-voltage-selector = <1>; 274 regulator-name = "vdd_cpu_big0_s0"; 275 regulator-always-on; 276 regulator-boot-on; 277 regulator-max-microvolt = <1050000>; 278 regulator-min-microvolt = <550000>; 279 regulator-ramp-delay = <2300>; 280 vin-supply = <&vcc5v0_sys>; 281 282 regulator-state-mem { 283 regulator-off-in-suspend; 284 }; 285 }; 286 287 vdd_cpu_big1_s0: regulator@43 { 288 compatible = "rockchip,rk8603", "rockchip,rk8602"; 289 reg = <0x43>; 290 fcs,suspend-voltage-selector = <1>; 291 regulator-name = "vdd_cpu_big1_s0"; 292 regulator-always-on; 293 regulator-boot-on; 294 regulator-max-microvolt = <1050000>; 295 regulator-min-microvolt = <550000>; 296 regulator-ramp-delay = <2300>; 297 vin-supply = <&vcc5v0_sys>; 298 299 regulator-state-mem { 300 regulator-off-in-suspend; 301 }; 302 }; 303 304 hym8563: rtc@51 { 305 compatible = "haoyu,hym8563"; 306 reg = <0x51>; 307 #clock-cells = <0>; 308 clock-output-names = "hym8563"; 309 interrupt-parent = <&gpio0>; 310 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 311 pinctrl-names = "default"; 312 pinctrl-0 = <&rtc_int>; 313 wakeup-source; 314 }; 315}; 316 317&i2c1 { 318 pinctrl-names = "default"; 319 pinctrl-0 = <&i2c1m2_xfer>; 320 status = "okay"; 321 322 vdd_npu_s0: regulator@42 { 323 compatible = "rockchip,rk8602"; 324 reg = <0x42>; 325 fcs,suspend-voltage-selector = <1>; 326 regulator-name = "vdd_npu_s0"; 327 regulator-boot-on; 328 regulator-enable-ramp-delay = <500>; 329 regulator-min-microvolt = <550000>; 330 regulator-max-microvolt = <950000>; 331 regulator-ramp-delay = <2300>; 332 vin-supply = <&vcc5v0_sys>; 333 334 regulator-state-mem { 335 regulator-off-in-suspend; 336 }; 337 }; 338}; 339 340&i2c6 { 341 pinctrl-names = "default"; 342 pinctrl-0 = <&i2c6m0_xfer>; 343 status = "okay"; 344 345 pca9554: gpio@24 { 346 compatible = "nxp,pca9554"; 347 reg = <0x24>; 348 #gpio-cells = <2>; 349 gpio-controller; 350 vcc-supply = <&vcc3v3_io_expander>; 351 }; 352}; 353 354&i2s5_8ch { 355 status = "okay"; 356}; 357 358&i2s6_8ch { 359 status = "okay"; 360}; 361 362&sdhci { 363 bus-width = <8>; 364 full-pwr-cycle-in-suspend; 365 mmc-hs400-1_8v; 366 mmc-hs400-enhanced-strobe; 367 no-sd; 368 no-sdio; 369 non-removable; 370 vmmc-supply = <&vcc_3v3_s3>; 371 vqmmc-supply = <&vcc_1v8_s3>; 372 status = "okay"; 373}; 374 375&sdmmc { 376 bus-width = <4>; 377 cap-mmc-highspeed; 378 cap-sd-highspeed; 379 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 380 disable-wp; 381 max-frequency = <200000000>; 382 no-mmc; 383 no-sdio; 384 sd-uhs-sdr104; 385 vmmc-supply = <&vcc_3v3_s3>; 386 vqmmc-supply = <&vccio_sd_s0>; 387 status = "okay"; 388}; 389 390&spi2 { 391 assigned-clock-rates = <200000000>; 392 assigned-clocks = <&cru CLK_SPI2>; 393 num-cs = <1>; 394 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 395 pinctrl-names = "default"; 396 #address-cells = <1>; 397 #size-cells = <0>; 398 status = "okay"; 399 400 pmic@0 { 401 compatible = "rockchip,rk806"; 402 reg = <0>; 403 #gpio-cells = <2>; 404 gpio-controller; 405 interrupt-parent = <&gpio0>; 406 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 407 pinctrl-names = "default"; 408 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 409 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 410 spi-max-frequency = <1000000>; 411 412 vcc1-supply = <&vcc5v0_sys>; 413 vcc2-supply = <&vcc5v0_sys>; 414 vcc3-supply = <&vcc5v0_sys>; 415 vcc4-supply = <&vcc5v0_sys>; 416 vcc5-supply = <&vcc5v0_sys>; 417 vcc6-supply = <&vcc5v0_sys>; 418 vcc7-supply = <&vcc5v0_sys>; 419 vcc8-supply = <&vcc5v0_sys>; 420 vcc9-supply = <&vcc5v0_sys>; 421 vcc10-supply = <&vcc5v0_sys>; 422 vcc11-supply = <&vcc_2v0_pldo_s3>; 423 vcc12-supply = <&vcc5v0_sys>; 424 vcc13-supply = <&vcc_1v1_nldo_s3>; 425 vcc14-supply = <&vcc_1v1_nldo_s3>; 426 vcca-supply = <&vcc5v0_sys>; 427 428 rk806_dvs1_null: dvs1-null-pins { 429 pins = "gpio_pwrctrl1"; 430 function = "pin_fun0"; 431 }; 432 433 rk806_dvs2_null: dvs2-null-pins { 434 pins = "gpio_pwrctrl2"; 435 function = "pin_fun0"; 436 }; 437 438 rk806_dvs3_null: dvs3-null-pins { 439 pins = "gpio_pwrctrl3"; 440 function = "pin_fun0"; 441 }; 442 443 regulators { 444 vdd_gpu_s0: dcdc-reg1 { 445 regulator-name = "vdd_gpu_s0"; 446 regulator-boot-on; 447 regulator-enable-ramp-delay = <400>; 448 regulator-min-microvolt = <550000>; 449 regulator-max-microvolt = <950000>; 450 regulator-ramp-delay = <12500>; 451 452 regulator-state-mem { 453 regulator-off-in-suspend; 454 }; 455 }; 456 457 vdd_cpu_lit_s0: dcdc-reg2 { 458 regulator-name = "vdd_cpu_lit_s0"; 459 regulator-always-on; 460 regulator-boot-on; 461 regulator-min-microvolt = <550000>; 462 regulator-max-microvolt = <950000>; 463 regulator-ramp-delay = <12500>; 464 465 regulator-state-mem { 466 regulator-off-in-suspend; 467 }; 468 }; 469 470 vdd_log_s0: dcdc-reg3 { 471 regulator-name = "vdd_log_s0"; 472 regulator-always-on; 473 regulator-boot-on; 474 regulator-min-microvolt = <675000>; 475 regulator-max-microvolt = <750000>; 476 regulator-ramp-delay = <12500>; 477 478 regulator-state-mem { 479 regulator-off-in-suspend; 480 }; 481 }; 482 483 vdd_vdenc_s0: dcdc-reg4 { 484 regulator-name = "vdd_vdenc_s0"; 485 regulator-always-on; 486 regulator-boot-on; 487 regulator-min-microvolt = <550000>; 488 regulator-max-microvolt = <950000>; 489 regulator-ramp-delay = <12500>; 490 491 regulator-state-mem { 492 regulator-off-in-suspend; 493 }; 494 }; 495 496 vdd_ddr_s0: dcdc-reg5 { 497 regulator-name = "vdd_ddr_s0"; 498 regulator-always-on; 499 regulator-boot-on; 500 regulator-min-microvolt = <675000>; 501 regulator-max-microvolt = <900000>; 502 regulator-ramp-delay = <12500>; 503 504 regulator-state-mem { 505 regulator-off-in-suspend; 506 }; 507 }; 508 509 vdd2_ddr_s3: dcdc-reg6 { 510 regulator-name = "vdd2_ddr_s3"; 511 regulator-always-on; 512 regulator-boot-on; 513 514 regulator-state-mem { 515 regulator-on-in-suspend; 516 }; 517 }; 518 519 vcc_2v0_pldo_s3: dcdc-reg7 { 520 regulator-name = "vdd_2v0_pldo_s3"; 521 regulator-always-on; 522 regulator-boot-on; 523 regulator-min-microvolt = <2000000>; 524 regulator-max-microvolt = <2000000>; 525 526 regulator-state-mem { 527 regulator-on-in-suspend; 528 }; 529 }; 530 531 vcc_3v3_s3: dcdc-reg8 { 532 regulator-name = "vcc_3v3_s3"; 533 regulator-always-on; 534 regulator-boot-on; 535 regulator-min-microvolt = <3300000>; 536 regulator-max-microvolt = <3300000>; 537 538 regulator-state-mem { 539 regulator-on-in-suspend; 540 }; 541 }; 542 543 vddq_ddr_s0: dcdc-reg9 { 544 regulator-name = "vddq_ddr_s0"; 545 regulator-always-on; 546 regulator-boot-on; 547 548 regulator-state-mem { 549 regulator-off-in-suspend; 550 }; 551 }; 552 553 vcc_1v8_s3: dcdc-reg10 { 554 regulator-name = "vcc_1v8_s3"; 555 regulator-always-on; 556 regulator-boot-on; 557 regulator-min-microvolt = <1800000>; 558 regulator-max-microvolt = <1800000>; 559 560 regulator-state-mem { 561 regulator-on-in-suspend; 562 }; 563 }; 564 565 avcc_1v8_s0: pldo-reg1 { 566 regulator-name = "avcc_1v8_s0"; 567 regulator-always-on; 568 regulator-boot-on; 569 regulator-min-microvolt = <1800000>; 570 regulator-max-microvolt = <1800000>; 571 572 regulator-state-mem { 573 regulator-off-in-suspend; 574 }; 575 }; 576 577 vcc_1v8_s0: pldo-reg2 { 578 regulator-name = "vcc_1v8_s0"; 579 regulator-always-on; 580 regulator-boot-on; 581 regulator-min-microvolt = <1800000>; 582 regulator-max-microvolt = <1800000>; 583 584 regulator-state-mem { 585 regulator-off-in-suspend; 586 }; 587 }; 588 589 avdd_1v2_s0: pldo-reg3 { 590 regulator-name = "avdd_1v2_s0"; 591 regulator-always-on; 592 regulator-boot-on; 593 regulator-min-microvolt = <1200000>; 594 regulator-max-microvolt = <1200000>; 595 596 regulator-state-mem { 597 regulator-off-in-suspend; 598 }; 599 }; 600 601 vcc_3v3_s0: pldo-reg4 { 602 regulator-name = "vcc_3v3_s0"; 603 regulator-always-on; 604 regulator-boot-on; 605 regulator-min-microvolt = <3300000>; 606 regulator-max-microvolt = <3300000>; 607 608 regulator-state-mem { 609 regulator-off-in-suspend; 610 }; 611 }; 612 613 vccio_sd_s0: pldo-reg5 { 614 regulator-name = "vccio_sd_s0"; 615 regulator-always-on; 616 regulator-boot-on; 617 regulator-min-microvolt = <1800000>; 618 regulator-max-microvolt = <3300000>; 619 620 regulator-state-mem { 621 regulator-off-in-suspend; 622 }; 623 }; 624 625 pldo6_s3: pldo-reg6 { 626 regulator-name = "pldo6_s3"; 627 regulator-always-on; 628 regulator-boot-on; 629 regulator-min-microvolt = <1800000>; 630 regulator-max-microvolt = <1800000>; 631 632 regulator-state-mem { 633 regulator-on-in-suspend; 634 }; 635 }; 636 637 vdd_0v75_s3: nldo-reg1 { 638 regulator-name = "vdd_0v75_s3"; 639 regulator-always-on; 640 regulator-boot-on; 641 regulator-min-microvolt = <750000>; 642 regulator-max-microvolt = <750000>; 643 644 regulator-state-mem { 645 regulator-on-in-suspend; 646 }; 647 }; 648 649 vdd_ddr_pll_s0: nldo-reg2 { 650 regulator-name = "vdd_ddr_pll_s0"; 651 regulator-always-on; 652 regulator-boot-on; 653 regulator-min-microvolt = <850000>; 654 regulator-max-microvolt = <850000>; 655 656 regulator-state-mem { 657 regulator-off-in-suspend; 658 }; 659 }; 660 661 avdd_0v75_s0: nldo-reg3 { 662 regulator-name = "avdd_0v75_s0"; 663 regulator-always-on; 664 regulator-boot-on; 665 regulator-min-microvolt = <837500>; 666 regulator-max-microvolt = <837500>; 667 668 regulator-state-mem { 669 regulator-off-in-suspend; 670 }; 671 }; 672 673 vdd_0v85_s0: nldo-reg4 { 674 regulator-name = "vdd_0v85_s0"; 675 regulator-always-on; 676 regulator-boot-on; 677 regulator-min-microvolt = <850000>; 678 regulator-max-microvolt = <850000>; 679 680 regulator-state-mem { 681 regulator-off-in-suspend; 682 }; 683 }; 684 685 vdd_0v75_s0: nldo-reg5 { 686 regulator-name = "vdd_0v75_s0"; 687 regulator-always-on; 688 regulator-boot-on; 689 regulator-min-microvolt = <750000>; 690 regulator-max-microvolt = <750000>; 691 692 regulator-state-mem { 693 regulator-off-in-suspend; 694 }; 695 }; 696 }; 697 }; 698}; 699 700&mdio1 { 701 rgmii_phy: phy@1 { 702 compatible = "ethernet-phy-ieee802.3-c22"; 703 reg = <0x1>; 704 }; 705}; 706 707&pcie2x1l0 { 708 pinctrl-names = "default"; 709 pinctrl-0 = <&pcie2_0_rst>; 710 reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; 711 vpcie3v3-supply = <&vcc3v3_pcie20_sata30>; 712 status = "okay"; 713}; 714 715&pcie2x1l1 { 716 pinctrl-names = "default"; 717 pinctrl-0 = <&pcie2_1_rst>; 718 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; 719 vpcie3v3-supply = <&vcc3v3_pcie20_sata30>; 720 status = "okay"; 721}; 722 723&pcie30phy { 724 status = "okay"; 725}; 726 727&pcie3x4 { 728 pinctrl-names = "default"; 729 pinctrl-0 = <&pcie3_reset>; 730 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 731 vpcie3v3-supply = <&vcc3v3_pcie30>; 732 status = "okay"; 733}; 734 735&pinctrl { 736 hdmirx { 737 hdmirx_hpd: hdmirx-5v-detection { 738 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 739 }; 740 }; 741 742 hym8563 { 743 rtc_int: rtc-int { 744 rockchip,pins = 745 <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 746 }; 747 }; 748 749 pcie2 { 750 pcie2_0_rst: pcie2-0-rst { 751 rockchip,pins = 752 <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 753 }; 754 755 pcie2_1_rst: pcie2-1-rst { 756 rockchip,pins = 757 <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 758 }; 759 }; 760 761 pcie3 { 762 pcie3_reset: pcie3-reset { 763 rockchip,pins = 764 <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 765 }; 766 }; 767}; 768 769&saradc { 770 vref-supply = <&avcc_1v8_s0>; 771 status = "okay"; 772}; 773 774&sata0 { 775 status = "okay"; 776}; 777 778&tsadc { 779 status = "okay"; 780}; 781 782&u2phy2 { 783 status = "okay"; 784}; 785 786&u2phy2_host { 787 phy-supply = <&vcc5v0_usb20_host>; 788 status = "okay"; 789}; 790 791&u2phy3 { 792 status = "okay"; 793}; 794 795&u2phy3_host { 796 phy-supply = <&vcc5v0_usb20_host>; 797 status = "okay"; 798}; 799 800&uart2 { 801 pinctrl-names = "default"; 802 pinctrl-0 = <&uart2m0_xfer>; 803 status = "okay"; 804}; 805 806&usb_host0_ehci { 807 status = "okay"; 808}; 809 810&usb_host0_ohci { 811 status = "okay"; 812}; 813 814&usb_host1_ehci { 815 status = "okay"; 816}; 817 818&usb_host1_ohci { 819 status = "okay"; 820}; 821 822&vop { 823 status = "okay"; 824}; 825 826&vop_mmu { 827 status = "okay"; 828}; 829 830&vp0 { 831 vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 832 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 833 remote-endpoint = <&hdmi0_in_vp0>; 834 }; 835}; 836 837&vp1 { 838 vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 { 839 reg = <ROCKCHIP_VOP2_EP_HDMI1>; 840 remote-endpoint = <&hdmi1_in_vp1>; 841 }; 842}; 843