1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2025 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/clock/rockchip,rk3588-cru.h> 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/pinctrl/rockchip.h> 12#include <dt-bindings/soc/rockchip,vop2.h> 13#include "rk3588.dtsi" 14 15/ { 16 model = "Rockchip RK3588 EVB2 V10 Board"; 17 compatible = "rockchip,rk3588-evb2-v10", "rockchip,rk3588"; 18 19 aliases { 20 mmc0 = &sdhci; 21 serial2 = &uart2; 22 }; 23 24 chosen { 25 stdout-path = "serial2:1500000n8"; 26 }; 27 28 hdmi-con { 29 compatible = "hdmi-connector"; 30 type = "a"; 31 32 port { 33 hdmi_con_in: endpoint { 34 remote-endpoint = <&hdmi0_out_con>; 35 }; 36 }; 37 }; 38 39 sdio_pwrseq: sdio-pwrseq { 40 compatible = "mmc-pwrseq-simple"; 41 clocks = <&hym8563>; 42 clock-names = "ext_clock"; 43 pinctrl-names = "default"; 44 pinctrl-0 = <&wifi_enable_h>; 45 /* 46 * On the module itself this is one of these (depending 47 * on the actual card populated): 48 * - SDIO_RESET_L_WL_REG_ON 49 * - PDN (power down when low) 50 */ 51 post-power-on-delay-ms = <200>; 52 reset-gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_LOW>; 53 }; 54 55 vcc12v_dcin: vcc12v-dcin-regulator { 56 compatible = "regulator-fixed"; 57 regulator-name = "vcc12v_dcin"; 58 regulator-always-on; 59 regulator-boot-on; 60 regulator-min-microvolt = <12000000>; 61 regulator-max-microvolt = <12000000>; 62 }; 63 64 vcc5v0_host: vcc5v0-host { 65 compatible = "regulator-fixed"; 66 regulator-name = "vcc5v0_host"; 67 regulator-boot-on; 68 regulator-always-on; 69 regulator-min-microvolt = <5000000>; 70 regulator-max-microvolt = <5000000>; 71 enable-active-high; 72 gpio = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>; 73 vin-supply = <&vcc5v0_usb>; 74 pinctrl-names = "default"; 75 pinctrl-0 = <&vcc5v0_host_en>; 76 }; 77 78 vcc5v0_usb: regulator-vcc5v0-usb { 79 compatible = "regulator-fixed"; 80 regulator-name = "vcc5v0_usb"; 81 regulator-always-on; 82 regulator-boot-on; 83 regulator-min-microvolt = <5000000>; 84 regulator-max-microvolt = <5000000>; 85 vin-supply = <&vcc5v0_usbdcin>; 86 }; 87 88 vcc5v0_sys: vcc5v0-sys-regulator { 89 compatible = "regulator-fixed"; 90 regulator-name = "vcc5v0_sys"; 91 regulator-always-on; 92 regulator-boot-on; 93 regulator-min-microvolt = <5000000>; 94 regulator-max-microvolt = <5000000>; 95 vin-supply = <&vcc12v_dcin>; 96 }; 97 98 vcc5v0_usbdcin: regulator-vcc5v0-usbdcin { 99 compatible = "regulator-fixed"; 100 regulator-name = "vcc5v0_usbdcin"; 101 regulator-always-on; 102 regulator-boot-on; 103 regulator-min-microvolt = <5000000>; 104 regulator-max-microvolt = <5000000>; 105 vin-supply = <&vcc12v_dcin>; 106 }; 107}; 108 109&gpu { 110 mali-supply = <&vdd_gpu_s0>; 111 sram-supply = <&vdd_gpu_mem_s0>; 112 status = "okay"; 113}; 114 115&hdmi0 { 116 status = "okay"; 117}; 118 119&hdmi0_in { 120 hdmi0_in_vp0: endpoint { 121 remote-endpoint = <&vp0_out_hdmi0>; 122 }; 123}; 124 125&hdmi0_out { 126 hdmi0_out_con: endpoint { 127 remote-endpoint = <&hdmi_con_in>; 128 }; 129}; 130 131&hdptxphy0 { 132 status = "okay"; 133}; 134 135&i2c2 { 136 status = "okay"; 137 138 hym8563: rtc@51 { 139 compatible = "haoyu,hym8563"; 140 reg = <0x51>; 141 #clock-cells = <0>; 142 clock-output-names = "hym8563"; 143 interrupt-parent = <&gpio0>; 144 interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>; 145 pinctrl-names = "default"; 146 pinctrl-0 = <&hym8563_int>; 147 wakeup-source; 148 }; 149}; 150 151&pd_gpu { 152 domain-supply = <&vdd_gpu_s0>; 153}; 154 155&pinctrl { 156 hym8563 { 157 hym8563_int: hym8563-int { 158 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; 159 }; 160 }; 161 162 usb { 163 vcc5v0_host_en: vcc5v0-host-en { 164 rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; 165 }; 166 }; 167 168 wifi { 169 wifi_enable_h: wifi-enable-h { 170 rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; 171 }; 172 173 wifi_host_wake_irq: wifi-host-wake-irq { 174 rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>; 175 }; 176 }; 177 178}; 179 180&sdhci { 181 bus-width = <8>; 182 max-frequency = <200000000>; 183 mmc-hs400-1_8v; 184 mmc-hs400-enhanced-strobe; 185 non-removable; 186 no-sd; 187 no-sdio; 188 status = "okay"; 189}; 190 191&sdio { 192 #address-cells = <1>; 193 #size-cells = <0>; 194 pinctrl-names = "default"; 195 pinctrl-0 = <&sdiom0_pins>; 196 bus-width = <4>; 197 cap-sd-highspeed; 198 cap-sdio-irq; 199 disable-wp; 200 keep-power-in-suspend; 201 max-frequency = <150000000>; 202 mmc-pwrseq = <&sdio_pwrseq>; 203 no-mmc; 204 non-removable; 205 no-sd; 206 sd-uhs-sdr104; 207 status = "okay"; 208 209 brcmf: wifi@1 { 210 compatible = "brcm,bcm4329-fmac"; 211 reg = <1>; 212 interrupt-parent = <&gpio2>; 213 interrupts = <RK_PB4 IRQ_TYPE_LEVEL_HIGH>; 214 interrupt-names = "host-wake"; 215 pinctrl-0 = <&wifi_host_wake_irq>; 216 pinctrl-names = "default"; 217 }; 218}; 219 220&spi2 { 221 status = "okay"; 222 assigned-clocks = <&cru CLK_SPI2>; 223 assigned-clock-rates = <200000000>; 224 num-cs = <2>; 225 226 pmic@0 { 227 compatible = "rockchip,rk806"; 228 reg = <0x0>; 229 #gpio-cells = <2>; 230 gpio-controller; 231 interrupt-parent = <&gpio0>; 232 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 233 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 234 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 235 pinctrl-names = "default"; 236 spi-max-frequency = <1000000>; 237 system-power-controller; 238 239 vcc1-supply = <&vcc5v0_sys>; 240 vcc2-supply = <&vcc5v0_sys>; 241 vcc3-supply = <&vcc5v0_sys>; 242 vcc4-supply = <&vcc5v0_sys>; 243 vcc5-supply = <&vcc5v0_sys>; 244 vcc6-supply = <&vcc5v0_sys>; 245 vcc7-supply = <&vcc5v0_sys>; 246 vcc8-supply = <&vcc5v0_sys>; 247 vcc9-supply = <&vcc5v0_sys>; 248 vcc10-supply = <&vcc5v0_sys>; 249 vcc11-supply = <&vcc_2v0_pldo_s3>; 250 vcc12-supply = <&vcc5v0_sys>; 251 vcc13-supply = <&vcc5v0_sys>; 252 vcc14-supply = <&vcc_1v1_nldo_s3>; 253 vcca-supply = <&vcc5v0_sys>; 254 255 rk806_dvs1_null: dvs1-null-pins { 256 pins = "gpio_pwrctrl1"; 257 function = "pin_fun0"; 258 }; 259 260 rk806_dvs2_null: dvs2-null-pins { 261 pins = "gpio_pwrctrl2"; 262 function = "pin_fun0"; 263 }; 264 265 rk806_dvs3_null: dvs3-null-pins { 266 pins = "gpio_pwrctrl3"; 267 function = "pin_fun0"; 268 }; 269 270 271 regulators { 272 vdd_gpu_s0: dcdc-reg1 { 273 /* regulator coupling requires always-on */ 274 regulator-always-on; 275 regulator-boot-on; 276 regulator-min-microvolt = <550000>; 277 regulator-max-microvolt = <950000>; 278 regulator-ramp-delay = <12500>; 279 regulator-name = "vdd_gpu_s0"; 280 regulator-enable-ramp-delay = <400>; 281 regulator-coupled-with = <&vdd_gpu_mem_s0>; 282 regulator-coupled-max-spread = <10000>; 283 regulator-state-mem { 284 regulator-off-in-suspend; 285 }; 286 }; 287 288 vdd_npu_s0: dcdc-reg2 { 289 regulator-always-on; 290 regulator-boot-on; 291 regulator-min-microvolt = <550000>; 292 regulator-max-microvolt = <950000>; 293 regulator-ramp-delay = <12500>; 294 regulator-name = "vdd_npu_s0"; 295 regulator-state-mem { 296 regulator-off-in-suspend; 297 }; 298 }; 299 300 vdd_log_s0: dcdc-reg3 { 301 regulator-always-on; 302 regulator-boot-on; 303 regulator-min-microvolt = <675000>; 304 regulator-max-microvolt = <750000>; 305 regulator-ramp-delay = <12500>; 306 regulator-name = "vdd_log_s0"; 307 regulator-state-mem { 308 regulator-off-in-suspend; 309 regulator-suspend-microvolt = <750000>; 310 }; 311 }; 312 313 vdd_vdenc_s0: dcdc-reg4 { 314 regulator-always-on; 315 regulator-boot-on; 316 regulator-min-microvolt = <550000>; 317 regulator-max-microvolt = <950000>; 318 regulator-ramp-delay = <12500>; 319 regulator-name = "vdd_vdenc_s0"; 320 regulator-state-mem { 321 regulator-off-in-suspend; 322 }; 323 324 }; 325 326 vdd_gpu_mem_s0: dcdc-reg5 { 327 /* regulator coupling requires always-on */ 328 regulator-always-on; 329 regulator-boot-on; 330 regulator-min-microvolt = <675000>; 331 regulator-max-microvolt = <950000>; 332 regulator-ramp-delay = <12500>; 333 regulator-enable-ramp-delay = <400>; 334 regulator-name = "vdd_gpu_mem_s0"; 335 regulator-coupled-with = <&vdd_gpu_s0>; 336 regulator-coupled-max-spread = <10000>; 337 regulator-state-mem { 338 regulator-off-in-suspend; 339 }; 340 341 }; 342 343 vdd_npu_mem_s0: dcdc-reg6 { 344 regulator-always-on; 345 regulator-boot-on; 346 regulator-min-microvolt = <675000>; 347 regulator-max-microvolt = <950000>; 348 regulator-ramp-delay = <12500>; 349 regulator-name = "vdd_npu_mem_s0"; 350 regulator-state-mem { 351 regulator-off-in-suspend; 352 }; 353 354 }; 355 356 vcc_2v0_pldo_s3: dcdc-reg7 { 357 regulator-always-on; 358 regulator-boot-on; 359 regulator-min-microvolt = <2000000>; 360 regulator-max-microvolt = <2000000>; 361 regulator-ramp-delay = <12500>; 362 regulator-name = "vdd_2v0_pldo_s3"; 363 regulator-state-mem { 364 regulator-on-in-suspend; 365 regulator-suspend-microvolt = <2000000>; 366 }; 367 }; 368 369 vdd_vdenc_mem_s0: dcdc-reg8 { 370 regulator-always-on; 371 regulator-boot-on; 372 regulator-min-microvolt = <675000>; 373 regulator-max-microvolt = <950000>; 374 regulator-ramp-delay = <12500>; 375 regulator-name = "vdd_vdenc_mem_s0"; 376 regulator-state-mem { 377 regulator-off-in-suspend; 378 }; 379 }; 380 381 vdd2_ddr_s3: dcdc-reg9 { 382 regulator-always-on; 383 regulator-boot-on; 384 regulator-name = "vdd2_ddr_s3"; 385 regulator-state-mem { 386 regulator-on-in-suspend; 387 }; 388 }; 389 390 vcc_1v1_nldo_s3: dcdc-reg10 { 391 regulator-always-on; 392 regulator-boot-on; 393 regulator-min-microvolt = <1100000>; 394 regulator-max-microvolt = <1100000>; 395 regulator-ramp-delay = <12500>; 396 regulator-name = "vcc_1v1_nldo_s3"; 397 regulator-state-mem { 398 regulator-on-in-suspend; 399 regulator-suspend-microvolt = <1100000>; 400 }; 401 }; 402 403 avcc_1v8_s0: pldo-reg1 { 404 regulator-always-on; 405 regulator-boot-on; 406 regulator-min-microvolt = <1800000>; 407 regulator-max-microvolt = <1800000>; 408 regulator-ramp-delay = <12500>; 409 regulator-name = "avcc_1v8_s0"; 410 regulator-state-mem { 411 regulator-off-in-suspend; 412 }; 413 }; 414 415 vdd1_1v8_ddr_s3: pldo-reg2 { 416 regulator-always-on; 417 regulator-boot-on; 418 regulator-min-microvolt = <1800000>; 419 regulator-max-microvolt = <1800000>; 420 regulator-ramp-delay = <12500>; 421 regulator-name = "vdd1_1v8_ddr_s3"; 422 regulator-state-mem { 423 regulator-on-in-suspend; 424 regulator-suspend-microvolt = <1800000>; 425 }; 426 }; 427 428 avcc_1v8_codec_s0: pldo-reg3 { 429 regulator-always-on; 430 regulator-boot-on; 431 regulator-min-microvolt = <1800000>; 432 regulator-max-microvolt = <1800000>; 433 regulator-ramp-delay = <12500>; 434 regulator-name = "avcc_1v8_codec_s0"; 435 regulator-state-mem { 436 regulator-off-in-suspend; 437 }; 438 }; 439 440 vcc_3v3_s3: pldo-reg4 { 441 regulator-always-on; 442 regulator-boot-on; 443 regulator-min-microvolt = <3300000>; 444 regulator-max-microvolt = <3300000>; 445 regulator-ramp-delay = <12500>; 446 regulator-name = "vcc_3v3_s3"; 447 regulator-state-mem { 448 regulator-on-in-suspend; 449 regulator-suspend-microvolt = <3300000>; 450 }; 451 }; 452 453 vccio_sd_s0: pldo-reg5 { 454 regulator-always-on; 455 regulator-boot-on; 456 regulator-min-microvolt = <1800000>; 457 regulator-max-microvolt = <3300000>; 458 regulator-ramp-delay = <12500>; 459 regulator-name = "vccio_sd_s0"; 460 regulator-state-mem { 461 regulator-off-in-suspend; 462 }; 463 }; 464 465 vccio_1v8_s3: pldo-reg6 { 466 regulator-always-on; 467 regulator-boot-on; 468 regulator-min-microvolt = <1800000>; 469 regulator-max-microvolt = <1800000>; 470 regulator-ramp-delay = <12500>; 471 regulator-name = "vccio_1v8_s3"; 472 regulator-state-mem { 473 regulator-on-in-suspend; 474 regulator-suspend-microvolt = <1800000>; 475 }; 476 }; 477 478 vdd_0v75_s3: nldo-reg1 { 479 regulator-always-on; 480 regulator-boot-on; 481 regulator-min-microvolt = <750000>; 482 regulator-max-microvolt = <750000>; 483 regulator-ramp-delay = <12500>; 484 regulator-name = "vdd_0v75_s3"; 485 regulator-state-mem { 486 regulator-on-in-suspend; 487 regulator-suspend-microvolt = <750000>; 488 }; 489 }; 490 491 vdd2l_0v9_ddr_s3: nldo-reg2 { 492 regulator-always-on; 493 regulator-boot-on; 494 regulator-min-microvolt = <900000>; 495 regulator-max-microvolt = <900000>; 496 regulator-name = "vdd2l_0v9_ddr_s3"; 497 regulator-state-mem { 498 regulator-on-in-suspend; 499 regulator-suspend-microvolt = <900000>; 500 }; 501 }; 502 503 vdd_0v75_hdmi_edp_s0: nldo-reg3 { 504 regulator-always-on; 505 regulator-boot-on; 506 regulator-min-microvolt = <750000>; 507 regulator-max-microvolt = <750000>; 508 regulator-name = "vdd_0v75_hdmi_edp_s0"; 509 regulator-state-mem { 510 regulator-off-in-suspend; 511 }; 512 }; 513 514 avdd_0v75_s0: nldo-reg4 { 515 regulator-always-on; 516 regulator-boot-on; 517 regulator-min-microvolt = <750000>; 518 regulator-max-microvolt = <750000>; 519 regulator-name = "avdd_0v75_s0"; 520 regulator-state-mem { 521 regulator-off-in-suspend; 522 }; 523 }; 524 525 vdd_0v85_s0: nldo-reg5 { 526 regulator-always-on; 527 regulator-boot-on; 528 regulator-min-microvolt = <850000>; 529 regulator-max-microvolt = <850000>; 530 regulator-name = "vdd_0v85_s0"; 531 regulator-state-mem { 532 regulator-off-in-suspend; 533 }; 534 }; 535 }; 536 }; 537 538 pmic@1 { 539 compatible = "rockchip,rk806"; 540 reg = <0x01>; 541 #gpio-cells = <2>; 542 gpio-controller; 543 interrupt-parent = <&gpio0>; 544 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 545 pinctrl-0 = <&rk806_slave_dvs1_null>, <&rk806_slave_dvs2_null>, 546 <&rk806_slave_dvs3_null>; 547 pinctrl-names = "default"; 548 spi-max-frequency = <1000000>; 549 550 vcc1-supply = <&vcc5v0_sys>; 551 vcc2-supply = <&vcc5v0_sys>; 552 vcc3-supply = <&vcc5v0_sys>; 553 vcc4-supply = <&vcc5v0_sys>; 554 vcc5-supply = <&vcc5v0_sys>; 555 vcc6-supply = <&vcc5v0_sys>; 556 vcc7-supply = <&vcc5v0_sys>; 557 vcc8-supply = <&vcc5v0_sys>; 558 vcc9-supply = <&vcc5v0_sys>; 559 vcc10-supply = <&vcc5v0_sys>; 560 vcc11-supply = <&vcc_2v0_pldo_s3>; 561 vcc12-supply = <&vcc5v0_sys>; 562 vcc13-supply = <&vcc_1v1_nldo_s3>; 563 vcc14-supply = <&vcc_2v0_pldo_s3>; 564 vcca-supply = <&vcc5v0_sys>; 565 566 rk806_slave_dvs1_null: dvs1-null-pins { 567 pins = "gpio_pwrctrl1"; 568 function = "pin_fun0"; 569 }; 570 571 rk806_slave_dvs2_null: dvs2-null-pins { 572 pins = "gpio_pwrctrl2"; 573 function = "pin_fun0"; 574 }; 575 576 rk806_slave_dvs3_null: dvs3-null-pins { 577 pins = "gpio_pwrctrl3"; 578 function = "pin_fun0"; 579 }; 580 581 regulators { 582 vdd_cpu_big1_s0: dcdc-reg1 { 583 regulator-always-on; 584 regulator-boot-on; 585 regulator-coupled-with = <&vdd_cpu_big1_mem_s0>; 586 regulator-coupled-max-spread = <10000>; 587 regulator-min-microvolt = <550000>; 588 regulator-max-microvolt = <1050000>; 589 regulator-ramp-delay = <12500>; 590 regulator-name = "vdd_cpu_big1_s0"; 591 regulator-state-mem { 592 regulator-off-in-suspend; 593 }; 594 }; 595 596 vdd_cpu_big0_s0: dcdc-reg2 { 597 regulator-always-on; 598 regulator-boot-on; 599 regulator-coupled-with = <&vdd_cpu_big0_mem_s0>; 600 regulator-coupled-max-spread = <10000>; 601 regulator-min-microvolt = <550000>; 602 regulator-max-microvolt = <1050000>; 603 regulator-ramp-delay = <12500>; 604 regulator-name = "vdd_cpu_big0_s0"; 605 regulator-state-mem { 606 regulator-off-in-suspend; 607 }; 608 }; 609 610 vdd_cpu_lit_s0: dcdc-reg3 { 611 regulator-always-on; 612 regulator-boot-on; 613 regulator-coupled-with = <&vdd_cpu_lit_mem_s0>; 614 regulator-coupled-max-spread = <10000>; 615 regulator-min-microvolt = <550000>; 616 regulator-max-microvolt = <950000>; 617 regulator-ramp-delay = <12500>; 618 regulator-name = "vdd_cpu_lit_s0"; 619 regulator-state-mem { 620 regulator-off-in-suspend; 621 }; 622 }; 623 624 vcc_3v3_s0: dcdc-reg4 { 625 regulator-always-on; 626 regulator-boot-on; 627 regulator-min-microvolt = <3300000>; 628 regulator-max-microvolt = <3300000>; 629 regulator-ramp-delay = <12500>; 630 regulator-name = "vcc_3v3_s0"; 631 regulator-state-mem { 632 regulator-off-in-suspend; 633 }; 634 }; 635 636 vdd_cpu_big1_mem_s0: dcdc-reg5 { 637 regulator-always-on; 638 regulator-boot-on; 639 regulator-coupled-with = <&vdd_cpu_big1_s0>; 640 regulator-coupled-max-spread = <10000>; 641 regulator-min-microvolt = <675000>; 642 regulator-max-microvolt = <1050000>; 643 regulator-ramp-delay = <12500>; 644 regulator-name = "vdd_cpu_big1_mem_s0"; 645 regulator-state-mem { 646 regulator-off-in-suspend; 647 }; 648 }; 649 650 651 vdd_cpu_big0_mem_s0: dcdc-reg6 { 652 regulator-always-on; 653 regulator-boot-on; 654 regulator-coupled-with = <&vdd_cpu_big0_s0>; 655 regulator-coupled-max-spread = <10000>; 656 regulator-min-microvolt = <675000>; 657 regulator-max-microvolt = <1050000>; 658 regulator-ramp-delay = <12500>; 659 regulator-name = "vdd_cpu_big0_mem_s0"; 660 regulator-state-mem { 661 regulator-off-in-suspend; 662 }; 663 }; 664 665 vcc_1v8_s0: dcdc-reg7 { 666 regulator-always-on; 667 regulator-boot-on; 668 regulator-min-microvolt = <1800000>; 669 regulator-max-microvolt = <1800000>; 670 regulator-ramp-delay = <12500>; 671 regulator-name = "vcc_1v8_s0"; 672 regulator-state-mem { 673 regulator-off-in-suspend; 674 }; 675 }; 676 677 vdd_cpu_lit_mem_s0: dcdc-reg8 { 678 regulator-always-on; 679 regulator-boot-on; 680 regulator-coupled-with = <&vdd_cpu_lit_s0>; 681 regulator-coupled-max-spread = <10000>; 682 regulator-min-microvolt = <675000>; 683 regulator-max-microvolt = <950000>; 684 regulator-ramp-delay = <12500>; 685 regulator-name = "vdd_cpu_lit_mem_s0"; 686 regulator-state-mem { 687 regulator-off-in-suspend; 688 }; 689 }; 690 691 vddq_ddr_s0: dcdc-reg9 { 692 regulator-always-on; 693 regulator-boot-on; 694 regulator-name = "vddq_ddr_s0"; 695 regulator-state-mem { 696 regulator-off-in-suspend; 697 }; 698 }; 699 700 vdd_ddr_s0: dcdc-reg10 { 701 regulator-always-on; 702 regulator-boot-on; 703 regulator-min-microvolt = <675000>; 704 regulator-max-microvolt = <900000>; 705 regulator-ramp-delay = <12500>; 706 regulator-name = "vdd_ddr_s0"; 707 regulator-state-mem { 708 regulator-off-in-suspend; 709 }; 710 }; 711 712 vcc_1v8_cam_s0: pldo-reg1 { 713 regulator-always-on; 714 regulator-boot-on; 715 regulator-min-microvolt = <1800000>; 716 regulator-max-microvolt = <1800000>; 717 regulator-ramp-delay = <12500>; 718 regulator-name = "vcc_1v8_cam_s0"; 719 regulator-state-mem { 720 regulator-off-in-suspend; 721 }; 722 }; 723 724 avdd1v8_ddr_pll_s0: pldo-reg2 { 725 regulator-always-on; 726 regulator-boot-on; 727 regulator-min-microvolt = <1800000>; 728 regulator-max-microvolt = <1800000>; 729 regulator-ramp-delay = <12500>; 730 regulator-name = "avdd1v8_ddr_pll_s0"; 731 regulator-state-mem { 732 regulator-off-in-suspend; 733 }; 734 }; 735 736 vdd_1v8_pll_s0: pldo-reg3 { 737 regulator-always-on; 738 regulator-boot-on; 739 regulator-min-microvolt = <1800000>; 740 regulator-max-microvolt = <1800000>; 741 regulator-ramp-delay = <12500>; 742 regulator-name = "vdd_1v8_pll_s0"; 743 regulator-state-mem { 744 regulator-off-in-suspend; 745 }; 746 }; 747 748 vcc_3v3_sd_s0: pldo-reg4 { 749 regulator-always-on; 750 regulator-boot-on; 751 regulator-min-microvolt = <3300000>; 752 regulator-max-microvolt = <3300000>; 753 regulator-ramp-delay = <12500>; 754 regulator-name = "vcc_3v3_sd_s0"; 755 regulator-state-mem { 756 regulator-off-in-suspend; 757 }; 758 }; 759 760 vcc_2v8_cam_s0: pldo-reg5 { 761 regulator-always-on; 762 regulator-boot-on; 763 regulator-min-microvolt = <2800000>; 764 regulator-max-microvolt = <2800000>; 765 regulator-ramp-delay = <12500>; 766 regulator-name = "vcc_2v8_cam_s0"; 767 regulator-state-mem { 768 regulator-off-in-suspend; 769 }; 770 }; 771 772 pldo6_s3: pldo-reg6 { 773 regulator-always-on; 774 regulator-boot-on; 775 regulator-min-microvolt = <1800000>; 776 regulator-max-microvolt = <1800000>; 777 regulator-name = "pldo6_s3"; 778 regulator-state-mem { 779 regulator-on-in-suspend; 780 regulator-suspend-microvolt = <1800000>; 781 }; 782 }; 783 784 vdd_0v75_pll_s0: nldo-reg1 { 785 regulator-always-on; 786 regulator-boot-on; 787 regulator-min-microvolt = <750000>; 788 regulator-max-microvolt = <750000>; 789 regulator-ramp-delay = <12500>; 790 regulator-name = "vdd_0v75_pll_s0"; 791 regulator-state-mem { 792 regulator-off-in-suspend; 793 }; 794 }; 795 796 vdd_ddr_pll_s0: nldo-reg2 { 797 regulator-always-on; 798 regulator-boot-on; 799 regulator-min-microvolt = <850000>; 800 regulator-max-microvolt = <850000>; 801 regulator-name = "vdd_ddr_pll_s0"; 802 regulator-state-mem { 803 regulator-off-in-suspend; 804 }; 805 }; 806 807 avdd_0v85_s0: nldo-reg3 { 808 regulator-always-on; 809 regulator-boot-on; 810 regulator-min-microvolt = <850000>; 811 regulator-max-microvolt = <850000>; 812 regulator-ramp-delay = <12500>; 813 regulator-name = "avdd_0v85_s0"; 814 regulator-state-mem { 815 regulator-off-in-suspend; 816 }; 817 }; 818 819 avdd_1v2_cam_s0: nldo-reg4 { 820 regulator-always-on; 821 regulator-boot-on; 822 regulator-min-microvolt = <1200000>; 823 regulator-max-microvolt = <1200000>; 824 regulator-ramp-delay = <12500>; 825 regulator-name = "avdd_1v2_cam_s0"; 826 regulator-state-mem { 827 regulator-off-in-suspend; 828 }; 829 }; 830 831 avdd_1v2_s0: nldo-reg5 { 832 regulator-always-on; 833 regulator-boot-on; 834 regulator-min-microvolt = <1200000>; 835 regulator-max-microvolt = <1200000>; 836 regulator-ramp-delay = <12500>; 837 regulator-name = "avdd_1v2_s0"; 838 regulator-state-mem { 839 regulator-off-in-suspend; 840 }; 841 }; 842 }; 843 }; 844}; 845 846&u2phy0 { 847 status = "okay"; 848}; 849 850&u2phy0_otg { 851 phy-supply = <&vcc5v0_host>; 852 status = "okay"; 853}; 854 855&u2phy1 { 856 status = "okay"; 857}; 858 859&u2phy1_otg { 860 phy-supply = <&vcc5v0_host>; 861 status = "okay"; 862}; 863 864&u2phy2 { 865 status = "okay"; 866}; 867 868&u2phy2_host { 869 phy-supply = <&vcc5v0_host>; 870 status = "okay"; 871}; 872 873&u2phy3 { 874 status = "okay"; 875}; 876 877&u2phy3_host { 878 phy-supply = <&vcc5v0_host>; 879 status = "okay"; 880}; 881 882&uart2 { 883 pinctrl-0 = <&uart2m0_xfer>; 884 status = "okay"; 885}; 886 887&usbdp_phy0 { 888 rockchip,dp-lane-mux = <2 3>; 889 status = "okay"; 890}; 891 892&usbdp_phy1 { 893 rockchip,dp-lane-mux = <2 3>; 894 status = "okay"; 895}; 896 897&usb_host0_ehci { 898 status = "okay"; 899}; 900 901&usb_host0_ohci { 902 status = "okay"; 903}; 904 905&usb_host1_ehci { 906 status = "okay"; 907}; 908 909&usb_host1_ohci { 910 status = "okay"; 911}; 912 913&usb_host1_xhci { 914 dr_mode = "host"; 915 status = "okay"; 916}; 917 918&vop { 919 status = "okay"; 920}; 921 922&vop_mmu { 923 status = "okay"; 924}; 925 926&vp0 { 927 vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 928 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 929 remote-endpoint = <&hdmi0_in_vp0>; 930 }; 931}; 932