1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * ArmSoM CM5 - Rockchip RK3576 compute module (Raspberry Pi CM4 form factor). 4 * 5 * Common to all CM5 carriers. The carrier .dts includes this file, sets the 6 * board model/compatible, and adds carrier-specific peripherals. 7 * 8 * On-module devices: 9 * - RK806 PMIC on I2C1 10 * - HYM8563 RTC on I2C2 11 * - eMMC (SDHCI) 12 * - GMAC0 + MotorComm YT8531 Gigabit Ethernet PHY (RGMII) 13 * - SYN43752 WiFi 6 + BT 5.x (SDIO + UART4) 14 * 15 * Copyright (c) 2024 ArmSoM 16 * Copyright (c) 2026 Jiaxing Hu <gahing@gahingwoo.com> 17 */ 18 19#include <dt-bindings/gpio/gpio.h> 20#include <dt-bindings/pinctrl/rockchip.h> 21#include "rk3576.dtsi" 22 23/ { 24 compatible = "armsom,cm5", "rockchip,rk3576"; 25 26 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 27 compatible = "regulator-fixed"; 28 regulator-name = "vcc_1v1_nldo_s3"; 29 regulator-boot-on; 30 regulator-always-on; 31 regulator-min-microvolt = <1100000>; 32 regulator-max-microvolt = <1100000>; 33 vin-supply = <&vcc_5v0_sys>; 34 }; 35 36 vcc_1v2_ufs_vccq_s0: regulator-vcc-1v2-ufs-vccq-s0 { 37 compatible = "regulator-fixed"; 38 regulator-name = "vcc_1v2_ufs_vccq_s0"; 39 regulator-boot-on; 40 regulator-always-on; 41 regulator-min-microvolt = <1200000>; 42 regulator-max-microvolt = <1200000>; 43 vin-supply = <&vcc_5v0_sys>; 44 }; 45 46 vcc_1v8_s0: regulator-vcc-1v8-s0 { 47 compatible = "regulator-fixed"; 48 regulator-name = "vcc_1v8_s0"; 49 regulator-boot-on; 50 regulator-always-on; 51 regulator-min-microvolt = <1800000>; 52 regulator-max-microvolt = <1800000>; 53 vin-supply = <&vcc_1v8_s3>; 54 }; 55 56 vcc_1v8_ufs_vccq2_s0: regulator-vcc-1v8-ufs-vccq2-s0 { 57 compatible = "regulator-fixed"; 58 regulator-name = "vcc_1v8_ufs_vccq2_s0"; 59 regulator-boot-on; 60 regulator-always-on; 61 regulator-min-microvolt = <1800000>; 62 regulator-max-microvolt = <1800000>; 63 vin-supply = <&vcc_1v8_s3>; 64 }; 65 66 vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 { 67 compatible = "regulator-fixed"; 68 regulator-name = "vcc_2v0_pldo_s3"; 69 regulator-boot-on; 70 regulator-always-on; 71 regulator-min-microvolt = <2000000>; 72 regulator-max-microvolt = <2000000>; 73 vin-supply = <&vcc_5v0_sys>; 74 }; 75 76 vcc_3v3_s0: regulator-vcc-3v3-s0 { 77 compatible = "regulator-fixed"; 78 regulator-name = "vcc_3v3_s0"; 79 regulator-boot-on; 80 regulator-always-on; 81 regulator-min-microvolt = <3300000>; 82 regulator-max-microvolt = <3300000>; 83 vin-supply = <&vcc_3v3_s3>; 84 }; 85 86 vcc_3v3_ufs_s0: regulator-vcc-ufs-s0 { 87 compatible = "regulator-fixed"; 88 regulator-name = "vcc_3v3_ufs_s0"; 89 regulator-boot-on; 90 regulator-always-on; 91 regulator-min-microvolt = <3300000>; 92 regulator-max-microvolt = <3300000>; 93 vin-supply = <&vcc_5v0_sys>; 94 }; 95 96 /* 97 * WiFi power sequencer for SYN43752. Reset GPIO1 PC6 active-low, 98 * clock from the HYM8563 RTC oscillator. 99 */ 100 sdio_pwrseq: sdio-pwrseq { 101 compatible = "mmc-pwrseq-simple"; 102 clocks = <&hym8563>; 103 clock-names = "ext_clock"; 104 pinctrl-names = "default"; 105 pinctrl-0 = <&wifi_reg_on>; 106 reset-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>; 107 }; 108}; 109 110&cpu_b0 { 111 cpu-supply = <&vdd_cpu_big_s0>; 112}; 113 114&cpu_b1 { 115 cpu-supply = <&vdd_cpu_big_s0>; 116}; 117 118&cpu_b2 { 119 cpu-supply = <&vdd_cpu_big_s0>; 120}; 121 122&cpu_b3 { 123 cpu-supply = <&vdd_cpu_big_s0>; 124}; 125 126&cpu_l0 { 127 cpu-supply = <&vdd_cpu_lit_s0>; 128}; 129 130&cpu_l1 { 131 cpu-supply = <&vdd_cpu_lit_s0>; 132}; 133 134&cpu_l2 { 135 cpu-supply = <&vdd_cpu_lit_s0>; 136}; 137 138&cpu_l3 { 139 cpu-supply = <&vdd_cpu_lit_s0>; 140}; 141 142/* 143 * GMAC0 drives an on-module MotorComm YT8531. The PHY has no local crystal and 144 * takes the SoC 25 MHz reference (REFCLKO25M_GMAC0_OUT); ethm0_clk0_25m_out 145 * routes that clock to the pad, and the PHY node consumes and enables it. 146 */ 147&gmac0 { 148 phy-mode = "rgmii-id"; 149 clock_in_out = "output"; 150 phy-handle = <&rgmii_phy0>; 151 phy-supply = <&vcc_3v3_s3>; 152 pinctrl-names = "default"; 153 pinctrl-0 = <ð0m0_miim 154 ð0m0_tx_bus2 155 ð0m0_rx_bus2 156 ð0m0_rgmii_clk 157 ð0m0_rgmii_bus 158 ðm0_clk0_25m_out>; 159 status = "okay"; 160}; 161 162&gpu { 163 mali-supply = <&vdd_gpu_s0>; 164 status = "okay"; 165}; 166 167&i2c1 { 168 status = "okay"; 169 170 pmic@23 { 171 compatible = "rockchip,rk806"; 172 reg = <0x23>; 173 gpio-controller; 174 #gpio-cells = <2>; 175 interrupt-parent = <&gpio0>; 176 interrupts = <RK_PA6 IRQ_TYPE_LEVEL_LOW>; 177 pinctrl-names = "default"; 178 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 179 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 180 system-power-controller; 181 vcc1-supply = <&vcc_5v0_sys>; 182 vcc2-supply = <&vcc_5v0_sys>; 183 vcc3-supply = <&vcc_5v0_sys>; 184 vcc4-supply = <&vcc_5v0_sys>; 185 vcc5-supply = <&vcc_5v0_sys>; 186 vcc6-supply = <&vcc_5v0_sys>; 187 vcc7-supply = <&vcc_5v0_sys>; 188 vcc8-supply = <&vcc_5v0_sys>; 189 vcc9-supply = <&vcc_5v0_sys>; 190 vcc10-supply = <&vcc_5v0_sys>; 191 vcc11-supply = <&vcc_2v0_pldo_s3>; 192 vcc12-supply = <&vcc_5v0_sys>; 193 vcc13-supply = <&vcc_1v1_nldo_s3>; 194 vcc14-supply = <&vcc_1v1_nldo_s3>; 195 vcca-supply = <&vcc_5v0_sys>; 196 197 rk806_dvs1_null: dvs1-null-pins { 198 pins = "gpio_pwrctrl1"; 199 function = "pin_fun0"; 200 }; 201 202 rk806_dvs2_null: dvs2-null-pins { 203 pins = "gpio_pwrctrl2"; 204 function = "pin_fun0"; 205 }; 206 207 rk806_dvs3_null: dvs3-null-pins { 208 pins = "gpio_pwrctrl3"; 209 function = "pin_fun0"; 210 }; 211 212 regulators { 213 vdd_cpu_big_s0: dcdc-reg1 { 214 regulator-always-on; 215 regulator-boot-on; 216 regulator-enable-ramp-delay = <400>; 217 regulator-min-microvolt = <550000>; 218 regulator-max-microvolt = <950000>; 219 regulator-name = "vdd_cpu_big_s0"; 220 regulator-ramp-delay = <12500>; 221 222 regulator-state-mem { 223 regulator-off-in-suspend; 224 }; 225 }; 226 227 vdd_npu_s0: dcdc-reg2 { 228 regulator-boot-on; 229 regulator-enable-ramp-delay = <400>; 230 regulator-min-microvolt = <550000>; 231 regulator-max-microvolt = <950000>; 232 regulator-name = "vdd_npu_s0"; 233 regulator-ramp-delay = <12500>; 234 235 regulator-state-mem { 236 regulator-off-in-suspend; 237 }; 238 }; 239 240 vdd_cpu_lit_s0: dcdc-reg3 { 241 regulator-always-on; 242 regulator-boot-on; 243 regulator-min-microvolt = <550000>; 244 regulator-max-microvolt = <950000>; 245 regulator-name = "vdd_cpu_lit_s0"; 246 regulator-ramp-delay = <12500>; 247 248 regulator-state-mem { 249 regulator-off-in-suspend; 250 }; 251 }; 252 253 vcc_3v3_s3: dcdc-reg4 { 254 regulator-always-on; 255 regulator-boot-on; 256 regulator-min-microvolt = <3300000>; 257 regulator-max-microvolt = <3300000>; 258 regulator-name = "vcc_3v3_s3"; 259 260 regulator-state-mem { 261 regulator-on-in-suspend; 262 }; 263 }; 264 265 vdd_gpu_s0: dcdc-reg5 { 266 regulator-boot-on; 267 regulator-enable-ramp-delay = <400>; 268 regulator-min-microvolt = <550000>; 269 regulator-max-microvolt = <900000>; 270 regulator-ramp-delay = <12500>; 271 regulator-name = "vdd_gpu_s0"; 272 273 regulator-state-mem { 274 regulator-off-in-suspend; 275 }; 276 }; 277 278 vddq_ddr_s0: dcdc-reg6 { 279 regulator-always-on; 280 regulator-boot-on; 281 regulator-name = "vddq_ddr_s0"; 282 283 regulator-state-mem { 284 regulator-off-in-suspend; 285 }; 286 }; 287 288 vdd_logic_s0: dcdc-reg7 { 289 regulator-always-on; 290 regulator-boot-on; 291 regulator-min-microvolt = <550000>; 292 regulator-max-microvolt = <800000>; 293 regulator-name = "vdd_logic_s0"; 294 295 regulator-state-mem { 296 regulator-off-in-suspend; 297 }; 298 }; 299 300 vcc_1v8_s3: dcdc-reg8 { 301 regulator-always-on; 302 regulator-boot-on; 303 regulator-min-microvolt = <1800000>; 304 regulator-max-microvolt = <1800000>; 305 regulator-name = "vcc_1v8_s3"; 306 307 regulator-state-mem { 308 regulator-on-in-suspend; 309 }; 310 }; 311 312 vdd2_ddr_s3: dcdc-reg9 { 313 regulator-always-on; 314 regulator-boot-on; 315 regulator-name = "vdd2_ddr_s3"; 316 317 regulator-state-mem { 318 regulator-on-in-suspend; 319 }; 320 }; 321 322 vdd_ddr_s0: dcdc-reg10 { 323 regulator-always-on; 324 regulator-boot-on; 325 regulator-min-microvolt = <550000>; 326 regulator-max-microvolt = <1200000>; 327 regulator-name = "vdd_ddr_s0"; 328 329 regulator-state-mem { 330 regulator-off-in-suspend; 331 }; 332 }; 333 334 vcca_1v8_s0: pldo-reg1 { 335 regulator-always-on; 336 regulator-boot-on; 337 regulator-min-microvolt = <1800000>; 338 regulator-max-microvolt = <1800000>; 339 regulator-name = "vcca_1v8_s0"; 340 341 regulator-state-mem { 342 regulator-off-in-suspend; 343 }; 344 }; 345 346 vcca1v8_pldo2_s0: pldo-reg2 { 347 regulator-always-on; 348 regulator-boot-on; 349 regulator-min-microvolt = <1800000>; 350 regulator-max-microvolt = <1800000>; 351 regulator-name = "vcca1v8_pldo2_s0"; 352 353 regulator-state-mem { 354 regulator-off-in-suspend; 355 }; 356 }; 357 358 vdda_1v2_s0: pldo-reg3 { 359 regulator-always-on; 360 regulator-boot-on; 361 regulator-min-microvolt = <1200000>; 362 regulator-max-microvolt = <1200000>; 363 regulator-name = "vdda_1v2_s0"; 364 365 regulator-state-mem { 366 regulator-off-in-suspend; 367 }; 368 }; 369 370 vcca_3v3_s0: pldo-reg4 { 371 regulator-always-on; 372 regulator-boot-on; 373 regulator-min-microvolt = <3300000>; 374 regulator-max-microvolt = <3300000>; 375 regulator-name = "vcca_3v3_s0"; 376 377 regulator-state-mem { 378 regulator-off-in-suspend; 379 }; 380 }; 381 382 vccio_sd_s0: pldo-reg5 { 383 regulator-always-on; 384 regulator-boot-on; 385 regulator-min-microvolt = <1800000>; 386 regulator-max-microvolt = <3300000>; 387 regulator-name = "vccio_sd_s0"; 388 389 regulator-state-mem { 390 regulator-off-in-suspend; 391 }; 392 }; 393 394 vcca1v8_pldo6_s3: pldo-reg6 { 395 regulator-always-on; 396 regulator-boot-on; 397 regulator-min-microvolt = <1800000>; 398 regulator-max-microvolt = <1800000>; 399 regulator-name = "vcca1v8_pldo6_s3"; 400 401 regulator-state-mem { 402 regulator-on-in-suspend; 403 }; 404 }; 405 406 vdd_0v75_s3: nldo-reg1 { 407 regulator-always-on; 408 regulator-boot-on; 409 regulator-min-microvolt = <750000>; 410 regulator-max-microvolt = <750000>; 411 regulator-name = "vdd_0v75_s3"; 412 413 regulator-state-mem { 414 regulator-on-in-suspend; 415 }; 416 }; 417 418 vdda_ddr_pll_s0: nldo-reg2 { 419 regulator-always-on; 420 regulator-boot-on; 421 regulator-min-microvolt = <850000>; 422 regulator-max-microvolt = <850000>; 423 regulator-name = "vdda_ddr_pll_s0"; 424 425 regulator-state-mem { 426 regulator-off-in-suspend; 427 }; 428 }; 429 430 vdda0v75_hdmi_s0: nldo-reg3 { 431 regulator-always-on; 432 regulator-boot-on; 433 regulator-min-microvolt = <837500>; 434 regulator-max-microvolt = <837500>; 435 regulator-name = "vdda0v75_hdmi_s0"; 436 437 regulator-state-mem { 438 regulator-off-in-suspend; 439 }; 440 }; 441 442 vdda_0v85_s0: nldo-reg4 { 443 regulator-always-on; 444 regulator-boot-on; 445 regulator-min-microvolt = <850000>; 446 regulator-max-microvolt = <850000>; 447 regulator-name = "vdda_0v85_s0"; 448 449 regulator-state-mem { 450 regulator-off-in-suspend; 451 }; 452 }; 453 454 vdda_0v75_s0: nldo-reg5 { 455 regulator-always-on; 456 regulator-boot-on; 457 regulator-min-microvolt = <750000>; 458 regulator-max-microvolt = <750000>; 459 regulator-name = "vdda_0v75_s0"; 460 461 regulator-state-mem { 462 regulator-off-in-suspend; 463 }; 464 }; 465 }; 466 }; 467}; 468 469/* I2C2: HYM8563 RTC @ 0x51 (interrupt on GPIO0 PA0). */ 470&i2c2 { 471 status = "okay"; 472 473 hym8563: rtc@51 { 474 compatible = "haoyu,hym8563"; 475 reg = <0x51>; 476 #clock-cells = <0>; 477 clock-output-names = "hym8563"; 478 interrupt-parent = <&gpio0>; 479 interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>; 480 pinctrl-names = "default"; 481 pinctrl-0 = <&hym8563_int>; 482 wakeup-source; 483 }; 484}; 485 486/* 487 * The PHY reset has to be described at the MDIO bus level: mdiobus releases a 488 * bus level reset before it scans for PHY IDs, whereas the per-PHY reset-gpios 489 * is only applied by phylib once the PHY has already been found, which never 490 * happens while the YT8531 is still held in reset. 491 * 492 * The compatible names the YT8531 explicitly so phylib instantiates the PHY 493 * from the device tree without an MDIO ID probe; the crystal-less PHY does not 494 * answer on MDIO until its driver has enabled the reference clock below. 495 */ 496&mdio0 { 497 reset-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>; 498 reset-delay-us = <20000>; 499 reset-post-delay-us = <100000>; 500 501 rgmii_phy0: ethernet-phy@1 { 502 compatible = "ethernet-phy-id4f51.e91b"; 503 reg = <0x1>; 504 clocks = <&cru REFCLKO25M_GMAC0_OUT>; 505 }; 506}; 507 508&saradc { 509 vref-supply = <&vcca_1v8_s0>; 510 status = "okay"; 511}; 512 513/* eMMC: on-module, HS400 200 MHz with enhanced strobe. */ 514&sdhci { 515 bus-width = <8>; 516 full-pwr-cycle-in-suspend; 517 max-frequency = <200000000>; 518 mmc-hs400-1_8v; 519 mmc-hs400-enhanced-strobe; 520 no-sdio; 521 no-sd; 522 non-removable; 523 /delete-property/ supports-cqe; 524 status = "okay"; 525}; 526 527/* SDIO: SYN43752 WiFi, power-sequenced by sdio_pwrseq, clock from HYM8563. */ 528&sdio { 529 bus-width = <4>; 530 cap-sdio-irq; 531 disable-wp; 532 keep-power-in-suspend; 533 mmc-pwrseq = <&sdio_pwrseq>; 534 no-sd; 535 no-mmc; 536 non-removable; 537 sd-uhs-sdr50; 538 sd-uhs-sdr104; 539 vmmc-supply = <&vcc_3v3_s3>; 540 vqmmc-supply = <&vcc_1v8_s3>; 541 wakeup-source; 542 status = "okay"; 543}; 544 545/* UART4: Bluetooth (SYN43752). */ 546&uart4 { 547 pinctrl-0 = <&uart4m1_xfer &uart4m1_ctsn &uart4m1_rtsn>; 548 pinctrl-names = "default"; 549 uart-has-rtscts; 550 status = "okay"; 551}; 552 553&pinctrl { 554 hym8563 { 555 hym8563_int: hym8563-int { 556 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; 557 }; 558 }; 559 560 wireless-wlan { 561 /* GPIO1 PC6 - WiFi power enable / reset (sdio_pwrseq) */ 562 wifi_reg_on: wifi-reg-on { 563 rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; 564 }; 565 }; 566}; 567