1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2025 Radxa Computer (Shenzhen) Co., Ltd. 4 */ 5 6#include <dt-bindings/leds/common.h> 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/pinctrl/rockchip.h> 9#include <dt-bindings/soc/rockchip,vop2.h> 10#include "rk3568.dtsi" 11 12/ { 13 aliases { 14 mmc0 = &sdhci; 15 mmc2 = &sdmmc2; 16 }; 17 18 gmac1_clkin: clock-125m { 19 compatible = "fixed-clock"; 20 clock-frequency = <125000000>; 21 clock-output-names = "gmac1_clkin"; 22 #clock-cells = <0>; 23 }; 24 25 leds-0 { 26 compatible = "gpio-leds"; 27 28 led-0 { 29 color = <LED_COLOR_ID_GREEN>; 30 default-state = "on"; 31 function = LED_FUNCTION_POWER; 32 gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&gpio0_b4_led>; 35 }; 36 }; 37 38 vcc3v3_sys: regulator-3v3-0 { 39 compatible = "regulator-fixed"; 40 regulator-name = "vcc3v3_sys"; 41 regulator-always-on; 42 regulator-boot-on; 43 regulator-min-microvolt = <3300000>; 44 regulator-max-microvolt = <3300000>; 45 vin-supply = <&dc5v>; 46 }; 47 48 vcc_3v3_1: regulator-3v3-1 { 49 compatible = "regulator-fixed"; 50 regulator-name = "vcc_3v3_1"; 51 regulator-always-on; 52 regulator-boot-on; 53 regulator-min-microvolt = <3300000>; 54 regulator-max-microvolt = <3300000>; 55 vin-supply = <&vcc3v3_sys>; 56 }; 57 58 sdio_pwrseq: sdio-pwrseq { 59 compatible = "mmc-pwrseq-simple"; 60 clocks = <&rk809 1>; 61 clock-names = "ext_clock"; 62 pinctrl-names = "default"; 63 pinctrl-0 = <&wifi_reg_on_h_gpio3_d4>; 64 reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; 65 }; 66}; 67 68&cpu0 { 69 cpu-supply = <&vdd_cpu>; 70}; 71 72&cpu1 { 73 cpu-supply = <&vdd_cpu>; 74}; 75 76&cpu2 { 77 cpu-supply = <&vdd_cpu>; 78}; 79 80&cpu3 { 81 cpu-supply = <&vdd_cpu>; 82}; 83 84&gmac1 { 85 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; 86 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; 87 clock_in_out = "input"; 88 phy-handle = <&rgmii_phy1>; 89 phy-mode = "rgmii-id"; 90 phy-supply = <&vcc_3v3_1>; 91 pinctrl-names = "default"; 92 pinctrl-0 = <&gmac1m1_miim 93 &gmac1m1_clkinout 94 &gmac1m1_rx_bus2 95 &gmac1m1_tx_bus2 96 &gmac1m1_rgmii_clk 97 &gmac1m1_rgmii_bus>; 98}; 99 100&gpu { 101 mali-supply = <&vdd_gpu>; 102 status = "okay"; 103}; 104 105&hdmi { 106 avdd-0v9-supply = <&vdda0v9_image>; 107 avdd-1v8-supply = <&vcca1v8_image>; 108}; 109 110&hdmi_in { 111 hdmi_in_vp0: endpoint { 112 remote-endpoint = <&vp0_out_hdmi>; 113 }; 114}; 115 116&hdmi_out { 117 hdmi_out_con: endpoint { 118 remote-endpoint = <&hdmi_con_in>; 119 }; 120}; 121 122&i2c0 { 123 status = "okay"; 124 125 rk809: pmic@20 { 126 compatible = "rockchip,rk809"; 127 reg = <0x20>; 128 #clock-cells = <1>; 129 clock-output-names = "rk809-clkout1", "rk809-clkout2"; 130 interrupt-parent = <&gpio0>; 131 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 132 pinctrl-names = "default"; 133 pinctrl-0 = <&pmic_int_l>; 134 system-power-controller; 135 vcc1-supply = <&vcc3v3_sys>; 136 vcc2-supply = <&vcc3v3_sys>; 137 vcc3-supply = <&vcc3v3_sys>; 138 vcc4-supply = <&vcc3v3_sys>; 139 vcc5-supply = <&vcc3v3_sys>; 140 vcc6-supply = <&vcc3v3_sys>; 141 vcc7-supply = <&vcc3v3_sys>; 142 vcc8-supply = <&vcc3v3_sys>; 143 vcc9-supply = <&vcc3v3_sys>; 144 wakeup-source; 145 146 regulators { 147 vdd_logic: DCDC_REG1 { 148 regulator-name = "vdd_logic"; 149 regulator-always-on; 150 regulator-boot-on; 151 regulator-initial-mode = <0x2>; 152 regulator-min-microvolt = <500000>; 153 regulator-max-microvolt = <1350000>; 154 regulator-ramp-delay = <6001>; 155 156 regulator-state-mem { 157 regulator-off-in-suspend; 158 }; 159 }; 160 161 vdd_gpu: DCDC_REG2 { 162 regulator-name = "vdd_gpu"; 163 regulator-initial-mode = <0x2>; 164 regulator-min-microvolt = <500000>; 165 regulator-max-microvolt = <1350000>; 166 regulator-ramp-delay = <6001>; 167 168 regulator-state-mem { 169 regulator-off-in-suspend; 170 }; 171 }; 172 173 vcc_ddr: DCDC_REG3 { 174 regulator-name = "vcc_ddr"; 175 regulator-always-on; 176 regulator-boot-on; 177 regulator-initial-mode = <0x2>; 178 179 regulator-state-mem { 180 regulator-on-in-suspend; 181 }; 182 }; 183 184 vdd_npu: DCDC_REG4 { 185 regulator-name = "vdd_npu"; 186 regulator-initial-mode = <0x2>; 187 regulator-min-microvolt = <500000>; 188 regulator-max-microvolt = <1350000>; 189 regulator-ramp-delay = <6001>; 190 191 regulator-state-mem { 192 regulator-off-in-suspend; 193 }; 194 }; 195 196 dc1v8: vccio_flash: vcc_1v8: DCDC_REG5 { 197 regulator-name = "vcc_1v8"; 198 regulator-always-on; 199 regulator-boot-on; 200 regulator-min-microvolt = <1800000>; 201 regulator-max-microvolt = <1800000>; 202 203 regulator-state-mem { 204 regulator-off-in-suspend; 205 }; 206 }; 207 208 vdda0v9_image: LDO_REG1 { 209 regulator-name = "vdda0v9_image"; 210 regulator-min-microvolt = <900000>; 211 regulator-max-microvolt = <900000>; 212 213 regulator-state-mem { 214 regulator-off-in-suspend; 215 }; 216 }; 217 218 vdda_0v9: LDO_REG2 { 219 regulator-name = "vdda_0v9"; 220 regulator-always-on; 221 regulator-boot-on; 222 regulator-min-microvolt = <900000>; 223 regulator-max-microvolt = <900000>; 224 225 regulator-state-mem { 226 regulator-off-in-suspend; 227 }; 228 }; 229 230 vdda0v9_pmu: LDO_REG3 { 231 regulator-name = "vdda0v9_pmu"; 232 regulator-always-on; 233 regulator-boot-on; 234 regulator-min-microvolt = <900000>; 235 regulator-max-microvolt = <900000>; 236 237 regulator-state-mem { 238 regulator-on-in-suspend; 239 regulator-suspend-microvolt = <900000>; 240 }; 241 }; 242 243 vccio_acodec: LDO_REG4 { 244 regulator-name = "vccio_acodec"; 245 regulator-min-microvolt = <3300000>; 246 regulator-max-microvolt = <3300000>; 247 248 regulator-state-mem { 249 regulator-off-in-suspend; 250 }; 251 }; 252 253 vccio_sd: LDO_REG5 { 254 regulator-name = "vccio_sd"; 255 regulator-always-on; 256 regulator-boot-on; 257 regulator-min-microvolt = <1800000>; 258 regulator-max-microvolt = <3300000>; 259 260 regulator-state-mem { 261 regulator-off-in-suspend; 262 }; 263 }; 264 265 vcc3v3_pmu: LDO_REG6 { 266 regulator-name = "vcc3v3_pmu"; 267 regulator-always-on; 268 regulator-boot-on; 269 regulator-min-microvolt = <3300000>; 270 regulator-max-microvolt = <3300000>; 271 272 regulator-state-mem { 273 regulator-on-in-suspend; 274 regulator-suspend-microvolt = <3300000>; 275 }; 276 }; 277 278 vcca_1v8: LDO_REG7 { 279 regulator-name = "vcca_1v8"; 280 regulator-always-on; 281 regulator-boot-on; 282 regulator-min-microvolt = <1800000>; 283 regulator-max-microvolt = <1800000>; 284 285 regulator-state-mem { 286 regulator-off-in-suspend; 287 }; 288 }; 289 290 vcca1v8_pmu: LDO_REG8 { 291 regulator-name = "vcca1v8_pmu"; 292 regulator-always-on; 293 regulator-boot-on; 294 regulator-min-microvolt = <1800000>; 295 regulator-max-microvolt = <1800000>; 296 297 regulator-state-mem { 298 regulator-on-in-suspend; 299 regulator-suspend-microvolt = <1800000>; 300 }; 301 }; 302 303 vcca1v8_image: LDO_REG9 { 304 regulator-name = "vcca1v8_image"; 305 regulator-min-microvolt = <1800000>; 306 regulator-max-microvolt = <1800000>; 307 308 regulator-state-mem { 309 regulator-off-in-suspend; 310 }; 311 }; 312 313 dc3v3: vcc_3v3: SWITCH_REG1 { 314 regulator-name = "vcc_3v3"; 315 regulator-always-on; 316 regulator-boot-on; 317 318 regulator-state-mem { 319 regulator-off-in-suspend; 320 }; 321 }; 322 323 vcc3v3_sd: SWITCH_REG2 { 324 regulator-name = "vcc3v3_sd"; 325 regulator-always-on; 326 regulator-boot-on; 327 328 regulator-state-mem { 329 regulator-off-in-suspend; 330 }; 331 }; 332 }; 333 }; 334 335 vdd_cpu: regulator@40 { 336 compatible = "silergy,syr827"; 337 reg = <0x40>; 338 fcs,suspend-voltage-selector = <1>; 339 regulator-name = "vdd_cpu"; 340 regulator-always-on; 341 regulator-boot-on; 342 regulator-min-microvolt = <712500>; 343 regulator-max-microvolt = <1390000>; 344 regulator-ramp-delay = <2300>; 345 vin-supply = <&dc5v>; 346 }; 347}; 348 349&i2c2 { 350 status = "okay"; 351 352 eeprom@50 { 353 compatible = "belling,bl24c16a", "atmel,24c16"; 354 reg = <0x50>; 355 pagesize = <16>; 356 read-only; 357 vcc-supply = <&gpio_vref>; 358 }; 359}; 360 361&mdio1 { 362 rgmii_phy1: ethernet-phy@0 { 363 compatible = "ethernet-phy-id001c.c916"; 364 reg = <0x0>; 365 pinctrl-names = "default"; 366 pinctrl-0 = <&gmac1_rstn_gpio3_b0>; // GPIO4_C3 367 reset-assert-us = <20000>; 368 reset-deassert-us = <100000>; 369 reset-gpios = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>; 370 }; 371}; 372 373&pinctrl { 374 bluetooth { 375 bt_reg_on_h_gpio4_b2: bt-reg-on-h-gpio4-b2 { 376 rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 377 }; 378 379 bt_wake_host_h_gpio4_b4: bt-wake-host-h-gpio4-b4 { 380 rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>; 381 }; 382 383 host_wake_bt_h_gpio4_b5: host-wake-bt-h-gpio4-b5 { 384 rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; 385 }; 386 }; 387 388 ethernet { 389 gmac1_rstn_gpio3_b0: gmac1-rstn-gpio3-b0 { 390 rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 391 }; 392 }; 393 394 leds { 395 gpio0_b4_led: gpio0-b4-led { 396 rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 397 }; 398 }; 399 400 pcie { 401 pcie20_clkreqnm2: pcie20_clkreqnm2 { 402 rockchip,pins = <1 RK_PB0 4 &pcfg_pull_none>; 403 }; 404 405 pcie_nrst: pcie-nrst { 406 rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 407 }; 408 }; 409 410 pmic { 411 pmic_int_l: pmic-int-l { 412 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 413 }; 414 }; 415 416 wifi { 417 wifi_reg_on_h_gpio3_d4: wifi-reg-on-h-gpio3-d4 { 418 rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; 419 }; 420 }; 421}; 422 423&pcie2x1 { 424 pinctrl-names = "default"; 425 pinctrl-0 = <&pcie20_clkreqnm2 &pcie_nrst>; 426 reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; 427 supports-clkreq; 428}; 429 430&pmu_io_domains { 431 pmuio1-supply = <&vcc3v3_pmu>; 432 pmuio2-supply = <&vcc_3v3>; 433 vccio1-supply = <&vccio_acodec>; 434 vccio2-supply = <&vccio_flash>; 435 vccio3-supply = <&vccio_sd>; 436 vccio4-supply = <&vcc_1v8>; 437 vccio5-supply = <&vcc_3v3>; 438 vccio6-supply = <&vcc_1v8>; 439 vccio7-supply = <&vcc_3v3>; 440 status = "okay"; 441}; 442 443&saradc { 444 vref-supply = <&vcca_1v8>; 445 status = "okay"; 446}; 447 448&sdhci { 449 bus-width = <8>; 450 cap-mmc-highspeed; 451 mmc-hs200-1_8v; 452 max-frequency = <200000000>; 453 no-sd; 454 no-sdio; 455 non-removable; 456 pinctrl-names = "default"; 457 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; 458 vmmc-supply = <&vcc_3v3>; 459 vqmmc-supply = <&vccio_flash>; 460 status = "okay"; 461}; 462 463&sdmmc2 { 464 #address-cells = <1>; 465 bus-width = <4>; 466 cap-sd-highspeed; 467 cap-sdio-irq; 468 disable-wp; 469 keep-power-in-suspend; 470 max-frequency = <200000000>; 471 mmc-pwrseq = <&sdio_pwrseq>; 472 no-mmc; 473 no-sd; 474 non-removable; 475 pinctrl-names = "default"; 476 pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_clk &sdmmc2m0_cmd>; 477 sd-uhs-sdr104; 478 #size-cells = <0>; 479 status = "okay"; 480 481 wifi@1 { 482 compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-fmac"; 483 reg = <1>; 484 }; 485}; 486 487&sfc { 488 #address-cells = <1>; 489 #size-cells = <0>; 490 status = "okay"; 491 492 flash@0 { 493 compatible = "jedec,spi-nor"; 494 reg = <0>; 495 spi-max-frequency = <104000000>; 496 spi-rx-bus-width = <4>; 497 spi-tx-bus-width = <1>; 498 vcc-supply = <&vccio_flash>; 499 }; 500}; 501 502&tsadc { 503 rockchip,hw-tshut-mode = <1>; 504 rockchip,hw-tshut-polarity = <0>; 505 status = "okay"; 506}; 507 508&uart2 { 509 status = "okay"; 510}; 511 512&uart8 { 513 dma-names = "tx", "rx"; 514 pinctrl-names = "default"; 515 pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn &uart8m0_rtsn>; 516 uart-has-rtscts; 517 status = "okay"; 518 519 bluetooth { 520 compatible = "brcm,bcm4345c5"; 521 clocks = <&rk809 1>; 522 clock-names = "lpo"; 523 device-wakeup-gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; 524 host-wakeup-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; 525 max-speed = <1500000>; 526 pinctrl-names = "default"; 527 pinctrl-0 = <&bt_reg_on_h_gpio4_b2 528 &bt_wake_host_h_gpio4_b4 529 &host_wake_bt_h_gpio4_b5>; 530 shutdown-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; 531 vbat-supply = <&vcc_3v3_1>; 532 vddio-supply = <&vcc_1v8>; 533 }; 534}; 535 536&usb_host0_xhci { 537 extcon = <&usb2phy0>; 538 maximum-speed = "high-speed"; 539 phys = <&usb2phy0_otg>; 540 phy-names = "usb2-phy"; 541}; 542 543&vop { 544 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; 545 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; 546 status = "okay"; 547}; 548 549&vop_mmu { 550 status = "okay"; 551}; 552 553&vp0 { 554 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 555 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 556 remote-endpoint = <&hdmi_in_vp0>; 557 }; 558}; 559