1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2026 Vicharak Computers Pvt Ltd 4 */ 5 6/dts-v1/; 7#include "rk3399.dtsi" 8 9/ { 10 model = "Vicharak Vaaman"; 11 compatible = "vicharak,vaaman", "rockchip,rk3399"; 12 13 aliases { 14 ethernet0 = &gmac; 15 mmc0 = &sdhci; 16 mmc1 = &sdmmc; 17 }; 18 19 chosen { 20 stdout-path = "serial2:1500000n8"; 21 }; 22 23 clkin_gmac: external-gmac-clock { 24 compatible = "fixed-clock"; 25 clock-frequency = <125000000>; 26 clock-output-names = "clkin_gmac"; 27 #clock-cells = <0>; 28 }; 29 30 vcc12v_dcin: regulator-dc-12v { 31 compatible = "regulator-fixed"; 32 regulator-name = "vcc12v_dcin"; 33 regulator-always-on; 34 regulator-boot-on; 35 regulator-min-microvolt = <12000000>; 36 regulator-max-microvolt = <12000000>; 37 }; 38 39 vcc3v3_lan: regulator-vcc3v3-lan { 40 compatible = "regulator-fixed"; 41 regulator-name = "vcc3v3_lan"; 42 regulator-always-on; 43 regulator-boot-on; 44 regulator-min-microvolt = <3300000>; 45 regulator-max-microvolt = <3300000>; 46 vin-supply = <&vcc3v3_sys>; 47 }; 48 49 vcc3v3_sys: regulator-vcc3v3-sys { 50 compatible = "regulator-fixed"; 51 regulator-name = "vcc3v3_sys"; 52 regulator-always-on; 53 regulator-boot-on; 54 regulator-min-microvolt = <3300000>; 55 regulator-max-microvolt = <3300000>; 56 vin-supply = <&vcc5v0_sys>; 57 }; 58 59 vcc5v0_sys: regulator-vcc-sys { 60 compatible = "regulator-fixed"; 61 regulator-name = "vcc5v0_sys"; 62 regulator-always-on; 63 regulator-boot-on; 64 regulator-min-microvolt = <5000000>; 65 regulator-max-microvolt = <5000000>; 66 vin-supply = <&vcc12v_dcin>; 67 }; 68 69 vdd_log: regulator-vdd-log { 70 compatible = "pwm-regulator"; 71 pwms = <&pwm2 0 25000 1>; 72 pwm-supply = <&vcc5v0_sys>; 73 regulator-name = "vdd_log"; 74 regulator-always-on; 75 regulator-boot-on; 76 regulator-min-microvolt = <800000>; 77 regulator-max-microvolt = <1400000>; 78 }; 79}; 80 81&cpu_l0 { 82 cpu-supply = <&vdd_cpu_l>; 83}; 84 85&cpu_l1 { 86 cpu-supply = <&vdd_cpu_l>; 87}; 88 89&cpu_l2 { 90 cpu-supply = <&vdd_cpu_l>; 91}; 92 93&cpu_l3 { 94 cpu-supply = <&vdd_cpu_l>; 95}; 96 97&cpu_b0 { 98 cpu-supply = <&vdd_cpu_b>; 99}; 100 101&cpu_b1 { 102 cpu-supply = <&vdd_cpu_b>; 103}; 104 105&emmc_phy { 106 rockchip,enable-strobe-pulldown; 107 status = "okay"; 108}; 109 110&gmac { 111 assigned-clocks = <&cru SCLK_RMII_SRC>; 112 assigned-clock-parents = <&clkin_gmac>; 113 clock_in_out = "input"; 114 phy-supply = <&vcc3v3_lan>; 115 phy-mode = "rgmii"; 116 phy-handle = <&rtl8211e>; 117 pinctrl-names = "default"; 118 pinctrl-0 = <&rgmii_pins>, <&phy_rstb>; 119 tx_delay = <0x28>; 120 rx_delay = <0x11>; 121 status = "okay"; 122 123 mdio { 124 compatible = "snps,dwmac-mdio"; 125 #address-cells = <1>; 126 #size-cells = <0>; 127 128 rtl8211e: ethernet-phy@1 { 129 reg = <1>; 130 reset-assert-us = <10000>; 131 reset-deassert-us = <50000>; 132 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 133 }; 134 }; 135}; 136 137&gpu { 138 mali-supply = <&vdd_gpu>; 139 status = "okay"; 140}; 141 142&i2c0 { 143 clock-frequency = <400000>; 144 i2c-scl-rising-time-ns = <168>; 145 i2c-scl-falling-time-ns = <4>; 146 status = "okay"; 147 148 rk808: pmic@1b { 149 compatible = "rockchip,rk808"; 150 reg = <0x1b>; 151 interrupt-parent = <&gpio1>; 152 interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>; 153 #clock-cells = <1>; 154 clock-output-names = "xin32k", "rk808-clkout2"; 155 pinctrl-names = "default"; 156 pinctrl-0 = <&pmic_int_l>; 157 system-power-controller; 158 wakeup-source; 159 160 vcc1-supply = <&vcc5v0_sys>; 161 vcc2-supply = <&vcc5v0_sys>; 162 vcc3-supply = <&vcc5v0_sys>; 163 vcc4-supply = <&vcc5v0_sys>; 164 vcc6-supply = <&vcc5v0_sys>; 165 vcc7-supply = <&vcc5v0_sys>; 166 vcc8-supply = <&vcc3v3_sys>; 167 vcc9-supply = <&vcc5v0_sys>; 168 vcc10-supply = <&vcc5v0_sys>; 169 vcc11-supply = <&vcc5v0_sys>; 170 vcc12-supply = <&vcc3v3_sys>; 171 vddio-supply = <&vcc_3v0>; 172 173 regulators { 174 vdd_center: DCDC_REG1 { 175 regulator-name = "vdd_center"; 176 regulator-always-on; 177 regulator-boot-on; 178 regulator-min-microvolt = <750000>; 179 regulator-max-microvolt = <1350000>; 180 regulator-ramp-delay = <6001>; 181 182 regulator-state-mem { 183 regulator-off-in-suspend; 184 }; 185 }; 186 187 vdd_cpu_l: DCDC_REG2 { 188 regulator-name = "vdd_cpu_l"; 189 regulator-always-on; 190 regulator-boot-on; 191 regulator-initial-mode = <0x2>; 192 regulator-min-microvolt = <750000>; 193 regulator-max-microvolt = <1350000>; 194 regulator-ramp-delay = <6001>; 195 196 regulator-state-mem { 197 regulator-off-in-suspend; 198 }; 199 }; 200 201 vcc_ddr: DCDC_REG3 { 202 regulator-name = "vcc_ddr"; 203 regulator-always-on; 204 regulator-boot-on; 205 206 regulator-state-mem { 207 regulator-on-in-suspend; 208 }; 209 }; 210 211 vcc_1v8: DCDC_REG4 { 212 regulator-name = "vcc_1v8"; 213 regulator-always-on; 214 regulator-boot-on; 215 regulator-min-microvolt = <1800000>; 216 regulator-max-microvolt = <1800000>; 217 218 regulator-state-mem { 219 regulator-on-in-suspend; 220 }; 221 }; 222 223 vcca1v8_codec: LDO_REG1 { 224 regulator-name = "vcca1v8_codec"; 225 regulator-always-on; 226 regulator-boot-on; 227 regulator-min-microvolt = <1800000>; 228 regulator-max-microvolt = <1800000>; 229 230 regulator-state-mem { 231 regulator-on-in-suspend; 232 }; 233 }; 234 235 vcca1v8_hdmi: LDO_REG2 { 236 regulator-name = "vcca1v8_hdmi"; 237 regulator-always-on; 238 regulator-boot-on; 239 regulator-min-microvolt = <1800000>; 240 regulator-max-microvolt = <1800000>; 241 242 regulator-state-mem { 243 regulator-off-in-suspend; 244 }; 245 }; 246 247 vcca_1v8: LDO_REG3 { 248 regulator-name = "vcca_1v8"; 249 regulator-always-on; 250 regulator-boot-on; 251 regulator-min-microvolt = <1800000>; 252 regulator-max-microvolt = <1800000>; 253 254 regulator-state-mem { 255 regulator-on-in-suspend; 256 }; 257 }; 258 259 vcc_sdio: LDO_REG4 { 260 regulator-name = "vcc_sdio"; 261 regulator-always-on; 262 regulator-boot-on; 263 regulator-min-microvolt = <3000000>; 264 regulator-max-microvolt = <3000000>; 265 266 regulator-state-mem { 267 regulator-on-in-suspend; 268 }; 269 }; 270 271 vcca3v0_codec: LDO_REG5 { 272 regulator-name = "vcca3v0_codec"; 273 regulator-always-on; 274 regulator-boot-on; 275 regulator-min-microvolt = <3000000>; 276 regulator-max-microvolt = <3000000>; 277 278 regulator-state-mem { 279 regulator-off-in-suspend; 280 }; 281 }; 282 283 vcc_1v5: LDO_REG6 { 284 regulator-name = "vcc_1v5"; 285 regulator-always-on; 286 regulator-boot-on; 287 regulator-min-microvolt = <1500000>; 288 regulator-max-microvolt = <1500000>; 289 290 regulator-state-mem { 291 regulator-on-in-suspend; 292 }; 293 }; 294 295 vcca0v9_hdmi: LDO_REG7 { 296 regulator-name = "vcca0v9_hdmi"; 297 regulator-always-on; 298 regulator-boot-on; 299 regulator-min-microvolt = <900000>; 300 regulator-max-microvolt = <900000>; 301 302 regulator-state-mem { 303 regulator-off-in-suspend; 304 }; 305 }; 306 307 vcc_3v0: LDO_REG8 { 308 regulator-name = "vcc_3v0"; 309 regulator-always-on; 310 regulator-boot-on; 311 regulator-min-microvolt = <3000000>; 312 regulator-max-microvolt = <3000000>; 313 314 regulator-state-mem { 315 regulator-on-in-suspend; 316 }; 317 }; 318 319 vcc_cam: SWITCH_REG1 { 320 regulator-name = "vcc_cam"; 321 regulator-always-on; 322 regulator-boot-on; 323 324 regulator-state-mem { 325 regulator-off-in-suspend; 326 }; 327 }; 328 329 vcc_mipi: SWITCH_REG2 { 330 regulator-name = "vcc_mipi"; 331 regulator-always-on; 332 regulator-boot-on; 333 334 regulator-state-mem { 335 regulator-off-in-suspend; 336 }; 337 }; 338 }; 339 }; 340 341 vdd_cpu_b: regulator@40 { 342 compatible = "silergy,syr827"; 343 reg = <0x40>; 344 fcs,suspend-voltage-selector = <1>; 345 pinctrl-names = "default"; 346 pinctrl-0 = <&vsel1_pin>; 347 regulator-name = "vdd_cpu_b"; 348 regulator-min-microvolt = <712500>; 349 regulator-max-microvolt = <1500000>; 350 regulator-ramp-delay = <1000>; 351 regulator-always-on; 352 regulator-boot-on; 353 vin-supply = <&vcc5v0_sys>; 354 355 regulator-state-mem { 356 regulator-off-in-suspend; 357 }; 358 }; 359 360 vdd_gpu: regulator@41 { 361 compatible = "silergy,syr828"; 362 reg = <0x41>; 363 fcs,suspend-voltage-selector = <1>; 364 pinctrl-names = "default"; 365 pinctrl-0 = <&vsel2_pin>; 366 regulator-name = "vdd_gpu"; 367 regulator-min-microvolt = <712500>; 368 regulator-max-microvolt = <1500000>; 369 regulator-ramp-delay = <1000>; 370 regulator-always-on; 371 regulator-boot-on; 372 vin-supply = <&vcc5v0_sys>; 373 374 regulator-state-mem { 375 regulator-off-in-suspend; 376 }; 377 }; 378}; 379 380&io_domains { 381 audio-supply = <&vcca1v8_codec>; 382 bt656-supply = <&vcc_3v0>; 383 gpio1830-supply = <&vcc_3v0>; 384 sdmmc-supply = <&vcc_sdio>; 385 status = "okay"; 386}; 387 388&pinctrl { 389 gmac { 390 phy_rstb: phy-rstb { 391 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 392 }; 393 }; 394 395 pmic { 396 pmic_int_l: pmic-int-l { 397 rockchip,pins = 398 <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 399 }; 400 401 vsel1_pin: vsel1-pin { 402 rockchip,pins = 403 <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 404 }; 405 406 vsel2_pin: vsel2-pin { 407 rockchip,pins = 408 <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 409 }; 410 }; 411}; 412 413&pmu_io_domains { 414 pmu1830-supply = <&vcc_3v0>; 415 status = "okay"; 416}; 417 418&pwm2 { 419 status = "okay"; 420}; 421 422&saradc { 423 vref-supply = <&vcc_1v8>; 424 status = "okay"; 425}; 426 427&sdhci { 428 max-frequency = <150000000>; 429 bus-width = <8>; 430 mmc-hs400-1_8v; 431 mmc-hs400-enhanced-strobe; 432 non-removable; 433 status = "okay"; 434}; 435 436&sdmmc { 437 bus-width = <4>; 438 cap-mmc-highspeed; 439 cap-sd-highspeed; 440 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 441 disable-wp; 442 max-frequency = <150000000>; 443 pinctrl-names = "default"; 444 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>; 445 status = "okay"; 446}; 447 448&tsadc { 449 /* tshut mode 0:CRU 1:GPIO */ 450 rockchip,hw-tshut-mode = <1>; 451 /* tshut polarity 0:LOW 1:HIGH */ 452 rockchip,hw-tshut-polarity = <1>; 453 status = "okay"; 454}; 455 456&uart2 { 457 status = "okay"; 458}; 459