1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the RZ/G3E SMARC EVK board 4 * 5 * Copyright (C) 2024 Renesas Electronics Corp. 6 */ 7 8/dts-v1/; 9 10/* Switch selection settings */ 11#define SW_GPIO8_CAN0_STB 0 12#define SW_GPIO9_CAN1_STB 0 13#define SW_LCD_EN 0 14#define SW_PDM_EN 0 15#define SW_SD0_DEV_SEL 0 16#define SW_SDIO_M2E 0 17 18#include <dt-bindings/gpio/gpio.h> 19#include <dt-bindings/pinctrl/renesas,r9a09g047-pinctrl.h> 20#include "r9a09g047e57.dtsi" 21#include "rzg3e-smarc-som.dtsi" 22#include "renesas-smarc2.dtsi" 23 24/ { 25 model = "Renesas SMARC EVK version 2 based on r9a09g047e57"; 26 compatible = "renesas,smarc2-evk", "renesas,rzg3e-smarcm", 27 "renesas,r9a09g047e57", "renesas,r9a09g047"; 28 29 vqmmc_sd1_pvdd: regulator-vqmmc-sd1-pvdd { 30 compatible = "regulator-gpio"; 31 regulator-name = "SD1_PVDD"; 32 regulator-min-microvolt = <1800000>; 33 regulator-max-microvolt = <3300000>; 34 gpios = <&pinctrl RZG3E_GPIO(1, 5) GPIO_ACTIVE_HIGH>; 35 gpios-states = <0>; 36 states = <3300000 0>, <1800000 1>; 37 }; 38}; 39 40&canfd { 41 pinctrl-0 = <&canfd_pins>; 42 pinctrl-names = "default"; 43 44#if (!SW_PDM_EN) 45 channel1 { 46 status = "okay"; 47#if (!SW_LCD_EN) && (SW_GPIO9_CAN1_STB) 48 phys = <&can_transceiver1>; 49#endif 50 }; 51#endif 52 53#if (!SW_LCD_EN) 54 channel4 { 55 status = "okay"; 56#if (SW_GPIO8_CAN0_STB) 57 phys = <&can_transceiver0>; 58#endif 59 }; 60#endif 61}; 62 63#if (!SW_LCD_EN) && (SW_GPIO8_CAN0_STB) 64&can_transceiver0 { 65 standby-gpios = <&pinctrl RZG3E_GPIO(5, 4) GPIO_ACTIVE_HIGH>; 66 status = "okay"; 67}; 68#endif 69 70#if (!SW_LCD_EN) && (SW_GPIO9_CAN1_STB) 71&can_transceiver1 { 72 standby-gpios = <&pinctrl RZG3E_GPIO(5, 5) GPIO_ACTIVE_HIGH>; 73 status = "okay"; 74}; 75#endif 76 77&pinctrl { 78 canfd_pins: canfd { 79 can1_pins: can1 { 80 pinmux = <RZG3E_PORT_PINMUX(L, 2, 3)>, /* RX */ 81 <RZG3E_PORT_PINMUX(L, 3, 3)>; /* TX */ 82 }; 83 84 can4_pins: can4 { 85 pinmux = <RZG3E_PORT_PINMUX(5, 2, 3)>, /* RX */ 86 <RZG3E_PORT_PINMUX(5, 3, 3)>; /* TX */ 87 }; 88 }; 89 90 scif_pins: scif { 91 pins = "SCIF_TXD", "SCIF_RXD"; 92 renesas,output-impedance = <1>; 93 }; 94 95 sd1-pwr-en-hog { 96 gpio-hog; 97 gpios = <RZG3E_GPIO(1, 6) GPIO_ACTIVE_HIGH>; 98 output-high; 99 line-name = "sd1_pwr_en"; 100 }; 101 102 sdhi1_pins: sd1 { 103 sd1-cd { 104 pinmux = <RZG3E_PORT_PINMUX(1, 4, 8)>; /* SD1CD */ 105 }; 106 107 sd1-ctrl { 108 pinmux = <RZG3E_PORT_PINMUX(G, 0, 1)>, /* SD1CLK */ 109 <RZG3E_PORT_PINMUX(G, 1, 1)>; /* SD1CMD */ 110 }; 111 112 sd1-data { 113 pinmux = <RZG3E_PORT_PINMUX(G, 2, 1)>, /* SD1DAT0 */ 114 <RZG3E_PORT_PINMUX(G, 3, 1)>, /* SD1DAT1 */ 115 <RZG3E_PORT_PINMUX(G, 4, 1)>, /* SD1DAT2 */ 116 <RZG3E_PORT_PINMUX(G, 5, 1)>; /* SD1DAT3 */ 117 }; 118 }; 119}; 120 121&scif0 { 122 pinctrl-0 = <&scif_pins>; 123 pinctrl-names = "default"; 124}; 125 126&sdhi1 { 127 pinctrl-0 = <&sdhi1_pins>; 128 pinctrl-1 = <&sdhi1_pins>; 129 pinctrl-names = "default", "state_uhs"; 130 131 vmmc-supply = <®_3p3v>; 132 vqmmc-supply = <&vqmmc_sd1_pvdd>; 133}; 134