1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2/* 3 * Copyright (c) 2025, Stanislav Zaikin <zstaseg@gmail.com> 4 */ 5 6/dts-v1/; 7 8/* PM7250B is configured to use SID8/9 */ 9#define PM7250B_SID 8 10#define PM7250B_SID1 9 11 12#include <dt-bindings/arm/qcom,ids.h> 13#include <dt-bindings/gpio/gpio.h> 14#include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h> 15#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> 16#include <dt-bindings/leds/common.h> 17#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 18#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 19#include <dt-bindings/sound/qcom,q6afe.h> 20#include <dt-bindings/sound/qcom,q6asm.h> 21 22#include "sm7325.dtsi" 23#include "pm7325.dtsi" 24#include "pm7250b.dtsi" /* PM7250B */ 25#include "pm8350c.dtsi" /* PM7350C */ 26#include "pmk8350.dtsi" /* PMK7325 */ 27 28/* The following reserved memory regions have different addresses or sizes */ 29/delete-node/ &adsp_mem; 30/delete-node/ &cdsp_mem; 31/delete-node/ &rmtfs_mem; 32 33/ { 34 model = "Xiaomi 12 Lite 5G"; 35 compatible = "xiaomi,taoyao", "qcom,sm7325"; 36 chassis-type = "handset"; 37 38 aliases { 39 serial0 = &uart5; 40 serial1 = &uart7; 41 }; 42 43 chosen { 44 #address-cells = <2>; 45 #size-cells = <2>; 46 ranges; 47 48 framebuffer0: framebuffer { 49 compatible = "simple-framebuffer"; 50 memory-region = <&framebuffer_reserved>; 51 width = <1080>; 52 height = <2400>; 53 stride = <(1080 * 4)>; 54 format = "a8r8g8b8"; 55 56 clocks = <&gcc GCC_DISP_HF_AXI_CLK>; 57 }; 58 }; 59 60 gpio-keys { 61 compatible = "gpio-keys"; 62 63 pinctrl-0 = <&key_vol_up>; 64 pinctrl-names = "default"; 65 66 key-volume-up { 67 label = "Volume Up"; 68 gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>; 69 linux,code = <KEY_VOLUMEUP>; 70 }; 71 }; 72 73 pmic-glink { 74 compatible = "qcom,sm7325-pmic-glink", 75 "qcom,qcm6490-pmic-glink", 76 "qcom,pmic-glink"; 77 78 #address-cells = <1>; 79 #size-cells = <0>; 80 81 orientation-gpios = <&tlmm 140 GPIO_ACTIVE_HIGH>; 82 83 connector@0 { 84 compatible = "usb-c-connector"; 85 reg = <0>; 86 power-role = "dual"; 87 data-role = "dual"; 88 89 ports { 90 #address-cells = <1>; 91 #size-cells = <0>; 92 93 port@0 { 94 reg = <0>; 95 96 pmic_glink_hs_in: endpoint { 97 remote-endpoint = <&usb_1_dwc3_hs>; 98 }; 99 }; 100 101 port@2 { 102 reg = <2>; 103 104 pmic_glink_sbu: endpoint { 105 remote-endpoint = <&fsa4480_sbu_mux>; 106 }; 107 }; 108 }; 109 }; 110 }; 111 112 vreg_oled_dvdd: regulator-oled-dvdd { 113 compatible = "regulator-fixed"; 114 regulator-name = "oled_dvdd"; 115 regulator-min-microvolt = <1200000>; 116 regulator-max-microvolt = <1200000>; 117 gpio = <&tlmm 46 GPIO_ACTIVE_HIGH>; 118 enable-active-high; 119 vin-supply = <&vreg_s1b_1p856>; 120 regulator-boot-on; 121 }; 122 123 /* S2B is really ebi.lvl but it's there for supply map completeness sake. */ 124 vreg_s2b_0p7: regulator-smpb2 { 125 compatible = "regulator-fixed"; 126 regulator-name = "vreg_s2b_0p7"; 127 128 regulator-min-microvolt = <700000>; 129 regulator-max-microvolt = <700000>; 130 regulator-always-on; 131 vin-supply = <&vph_pwr>; 132 }; 133 134 vph_pwr: regulator-vph-pwr { 135 compatible = "regulator-fixed"; 136 regulator-name = "vph_pwr"; 137 regulator-min-microvolt = <3700000>; 138 regulator-max-microvolt = <3700000>; 139 }; 140 141 reserved-memory { 142 cdsp_secure_heap_mem: cdsp-secure-heap@81800000 { 143 reg = <0x0 0x81800000 0x0 0x1e00000>; 144 no-map; 145 }; 146 147 cvp_mem: cvp@86200000 { 148 reg = <0x0 0x86200000 0x0 0x500000>; 149 no-map; 150 }; 151 152 adsp_mem: adsp@86700000 { 153 reg = <0x0 0x86700000 0x0 0x4000000>; 154 no-map; 155 }; 156 157 camera_mem: camera@8ad00000 { 158 reg = <0x0 0x8ad00000 0x0 0x500000>; 159 no-map; 160 }; 161 162 ipa_gsi_mem: ipa-gsi@8b710000 { 163 reg = <0x0 0x8b710000 0x0 0xa000>; 164 no-map; 165 }; 166 167 cdsp_mem: cdsp@9c700000 { 168 reg = <0x0 0x9c700000 0x0 0x1e00000>; 169 no-map; 170 }; 171 172 ramoops@a9000000 { 173 compatible = "ramoops"; 174 reg = <0x0 0xa9000000 0x0 0x200000>; 175 mem-type = <2>; 176 pmsg-size = <0x100000>; 177 record-size = <0x100000>; 178 }; 179 180 removed_mem: removed@c0000000 { 181 reg = <0x0 0xc0000000 0x0 0x6800000>; 182 no-map; 183 }; 184 185 pil_trustedvm_mem: pil-trustedvm-region@d0800000 { 186 reg = <0x0 0xd0800000 0x0 0x76f7000>; 187 no-map; 188 }; 189 190 qrtr_shmem: qrtr-shmem@d7ef7000 { 191 reg = <0x0 0xd7ef7000 0x0 0x9000>; 192 no-map; 193 }; 194 195 neuron_block_0_mem: neuron-block@d7f00000 { 196 reg = <0x0 0xd7f00000 0x0 0x80000>; 197 no-map; 198 }; 199 200 neuron_block_1_mem: neuron-block@d7f80000 { 201 reg = <0x0 0xd7f80000 0x0 0x80000>; 202 no-map; 203 }; 204 205 framebuffer_reserved: framebuffer@e1000000 { 206 reg = <0x0 0xe1000000 0x0 (1080 * 2400 * 4)>; 207 no-map; 208 }; 209 210 rmtfs_mem: rmtfs@e7d00000 { 211 compatible = "qcom,rmtfs-mem"; 212 reg = <0x0 0xe7d00000 0x0 0x280000>; 213 no-map; 214 215 qcom,client-id = <1>; 216 qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>, 217 <QCOM_SCM_VMID_NAV>; 218 }; 219 }; 220 221 wcn6750-pmu { 222 compatible = "qcom,wcn6750-pmu"; 223 pinctrl-0 = <&hst_bt_en>, 224 <&hst_sw_ctrl>; 225 pinctrl-names = "default"; 226 vddio-supply = <&vreg_l19b_1p8>; 227 vddaon-supply = <&vreg_s7b_0p952>; 228 vddasd-supply = <&vreg_l11c_2p8>; 229 vddpmu-supply = <&vreg_s7b_0p952>; 230 vddrfa0p8-supply = <&vreg_s7b_0p952>; 231 vddrfa1p2-supply = <&vreg_s8b_1p256>; 232 vddrfa1p7-supply = <&vreg_s1b_1p856>; 233 vddrfa2p2-supply = <&vreg_s1c_2p2>; 234 235 bt-enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; 236 swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; 237 238 regulators { 239 vreg_pmu_rfa_cmn: ldo0 { 240 regulator-name = "vreg_pmu_rfa_cmn"; 241 }; 242 243 vreg_pmu_aon_0p59: ldo1 { 244 regulator-name = "vreg_pmu_aon_0p59"; 245 }; 246 247 vreg_pmu_wlcx_0p8: ldo2 { 248 regulator-name = "vreg_pmu_wlcx_0p8"; 249 }; 250 251 vreg_pmu_wlmx_0p85: ldo3 { 252 regulator-name = "vreg_pmu_wlmx_0p85"; 253 }; 254 255 vreg_pmu_btcmx_0p85: ldo4 { 256 regulator-name = "vreg_pmu_btcmx_0p85"; 257 }; 258 259 vreg_pmu_rfa_0p8: ldo5 { 260 regulator-name = "vreg_pmu_rfa_0p8"; 261 }; 262 263 vreg_pmu_rfa_1p2: ldo6 { 264 regulator-name = "vreg_pmu_rfa_1p2"; 265 }; 266 267 vreg_pmu_rfa_1p7: ldo7 { 268 regulator-name = "vreg_pmu_rfa_1p7"; 269 }; 270 }; 271 }; 272}; 273 274&apps_rsc { 275 regulators-0 { 276 compatible = "qcom,pm7325-rpmh-regulators"; 277 qcom,pmic-id = "b"; 278 279 vdd-s1-supply = <&vph_pwr>; 280 vdd-s2-supply = <&vph_pwr>; 281 vdd-s7-supply = <&vph_pwr>; 282 vdd-s8-supply = <&vph_pwr>; 283 284 vdd-l1-l4-l12-l15-supply = <&vreg_s7b_0p952>; 285 vdd-l2-l7-supply = <&vreg_bob>; 286 vdd-l3-supply = <&vreg_s2b_0p7>; 287 vdd-l5-supply = <&vreg_s2b_0p7>; 288 vdd-l6-l9-l10-supply = <&vreg_s8b_1p256>; 289 vdd-l8-supply = <&vreg_s7b_0p952>; 290 vdd-l11-l17-l18-l19-supply = <&vreg_s1b_1p856>; 291 vdd-l13-supply = <&vreg_s7b_0p952>; 292 vdd-l14-l16-supply = <&vreg_s8b_1p256>; 293 294 /* 295 * S2, L4-L5 are ARCs: 296 * S2 - ebi.lvl, 297 * L4 - lmx.lvl, 298 * L5 - lcx.lvl. 299 * 300 * L10 are unused. 301 */ 302 303 vreg_s1b_1p856: smps1 { 304 regulator-name = "vreg_s1b_1p856"; 305 regulator-min-microvolt = <1840000>; 306 regulator-max-microvolt = <2040000>; 307 }; 308 309 vreg_s7b_0p952: smps7 { 310 regulator-name = "vreg_s7b_0p952"; 311 regulator-min-microvolt = <535000>; 312 regulator-max-microvolt = <1120000>; 313 }; 314 315 vreg_s8b_1p256: smps8 { 316 regulator-name = "vreg_s8b_1p256"; 317 regulator-min-microvolt = <1200000>; 318 regulator-max-microvolt = <1500000>; 319 regulator-initial-mode = <RPMH_REGULATOR_MODE_RET>; 320 }; 321 322 vreg_l1b_0p912: ldo1 { 323 regulator-name = "vreg_l1b_0p912"; 324 regulator-min-microvolt = <825000>; 325 regulator-max-microvolt = <925000>; 326 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 327 }; 328 329 vreg_l2b_3p072: ldo2 { 330 regulator-name = "vreg_l2b_3p072"; 331 regulator-min-microvolt = <2700000>; 332 regulator-max-microvolt = <3544000>; 333 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 334 }; 335 336 vreg_l3b_0p6: ldo3 { 337 regulator-name = "vreg_l3b_0p6"; 338 regulator-min-microvolt = <312000>; 339 regulator-max-microvolt = <910000>; 340 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 341 }; 342 343 vreg_l6b_1p2: ldo6 { 344 regulator-name = "vreg_l6b_1p2"; 345 regulator-min-microvolt = <1140000>; 346 regulator-max-microvolt = <1260000>; 347 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 348 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 349 RPMH_REGULATOR_MODE_HPM>; 350 }; 351 352 vreg_l7b_2p96: ldo7 { 353 regulator-name = "vreg_l7b_2p96"; 354 /* Constrained for UFS VCC, at least until UFS driver scales voltage */ 355 regulator-min-microvolt = <2952000>; 356 regulator-max-microvolt = <2952000>; 357 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 358 }; 359 360 vreg_l8b_0p904: ldo8 { 361 regulator-name = "vreg_l8b_0p904"; 362 regulator-min-microvolt = <870000>; 363 regulator-max-microvolt = <970000>; 364 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 365 }; 366 367 vreg_l9b_1p2: ldo9 { 368 regulator-name = "vreg_l9b_1p2"; 369 regulator-min-microvolt = <1200000>; 370 regulator-max-microvolt = <1304000>; 371 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 372 regulator-allow-set-load; 373 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 374 RPMH_REGULATOR_MODE_HPM>; 375 }; 376 377 vreg_l11b_1p776: ldo11 { 378 regulator-name = "vreg_l11b_1p776"; 379 regulator-min-microvolt = <1504000>; 380 regulator-max-microvolt = <2000000>; 381 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 382 }; 383 384 vreg_l12b_0p8: ldo12 { 385 regulator-name = "vreg_l12b_0p8"; 386 regulator-min-microvolt = <751000>; 387 regulator-max-microvolt = <824000>; 388 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 389 }; 390 391 vreg_l13b_0p8: ldo13 { 392 regulator-name = "vreg_l13b_0p8"; 393 regulator-min-microvolt = <530000>; 394 regulator-max-microvolt = <824000>; 395 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 396 }; 397 398 vreg_l14b_1p2: ldo14 { 399 regulator-name = "vreg_l14b_1p2"; 400 regulator-min-microvolt = <1080000>; 401 regulator-max-microvolt = <1304000>; 402 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 403 }; 404 405 vreg_l15b_0p88: ldo15 { 406 regulator-name = "vreg_l15b_0p88"; 407 regulator-min-microvolt = <765000>; 408 regulator-max-microvolt = <1020000>; 409 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 410 }; 411 412 vreg_l16b_1p2: ldo16 { 413 regulator-name = "vreg_l16b_1p2"; 414 regulator-min-microvolt = <1100000>; 415 regulator-max-microvolt = <1300000>; 416 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 417 }; 418 419 vreg_l17b_1p8: ldo17 { 420 regulator-name = "vreg_l17b_1p8"; 421 regulator-min-microvolt = <1700000>; 422 regulator-max-microvolt = <1900000>; 423 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 424 }; 425 426 vreg_l18b_1p8: ldo18 { 427 regulator-name = "vreg_l18b_1p8"; 428 regulator-min-microvolt = <1800000>; 429 regulator-max-microvolt = <2000000>; 430 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 431 }; 432 433 vreg_l19b_1p8: ldo19 { 434 regulator-name = "vreg_l19b_1p8"; 435 regulator-min-microvolt = <1800000>; 436 regulator-max-microvolt = <2000000>; 437 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 438 }; 439 }; 440 441 regulators-1 { 442 compatible = "qcom,pm8350c-rpmh-regulators"; 443 qcom,pmic-id = "c"; 444 445 vdd-s1-supply = <&vph_pwr>; 446 vdd-s2-supply = <&vph_pwr>; 447 vdd-s5-supply = <&vph_pwr>; 448 vdd-s7-supply = <&vph_pwr>; 449 vdd-s9-supply = <&vph_pwr>; 450 vdd-s10-supply = <&vph_pwr>; 451 452 vdd-l1-l12-supply = <&vreg_s1b_1p856>; 453 vdd-l2-l8-supply = <&vreg_s1b_1p856>; 454 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>; 455 vdd-l6-l9-l11-supply = <&vreg_bob>; 456 vdd-l10-supply = <&vreg_s7b_0p952>; 457 458 vdd-bob-supply = <&vph_pwr>; 459 460 /* 461 * S2, S5, S7, S10 are ARCs: 462 * S2 - cx.lvl, 463 * S5 - mss.lvl, 464 * S7 - gfx.lvl, 465 * S10 - mx.lvl. 466 */ 467 468 vreg_s1c_2p2: smps1 { 469 regulator-name = "vreg_s1c_2p2"; 470 regulator-min-microvolt = <2190000>; 471 regulator-max-microvolt = <2210000>; 472 }; 473 474 vreg_s9c_0p676: smps9 { 475 regulator-name = "vreg_s9c_0p676"; 476 regulator-min-microvolt = <1010000>; 477 regulator-max-microvolt = <1170000>; 478 }; 479 480 vreg_l1c_1p8: ldo1 { 481 regulator-name = "vreg_l1c_1p8"; 482 regulator-min-microvolt = <1800000>; 483 regulator-max-microvolt = <1980000>; 484 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 485 }; 486 487 vreg_l2c_1p8: ldo2 { 488 regulator-name = "vreg_l2c_1p8"; 489 regulator-min-microvolt = <1620000>; 490 regulator-max-microvolt = <1980000>; 491 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 492 }; 493 494 vreg_l3c_3p0: ldo3 { 495 regulator-name = "vreg_l3c_3p0"; 496 regulator-min-microvolt = <2800000>; 497 regulator-max-microvolt = <3540000>; 498 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 499 }; 500 501 vreg_l4c_1p8_3p0: ldo4 { 502 regulator-name = "vreg_l4c_1p8_3p0"; 503 regulator-min-microvolt = <1620000>; 504 regulator-max-microvolt = <3300000>; 505 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 506 }; 507 508 vreg_l5c_1p8_3p0: ldo5 { 509 regulator-name = "vreg_l5c_1p8_3p0"; 510 regulator-min-microvolt = <1620000>; 511 regulator-max-microvolt = <3300000>; 512 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 513 }; 514 515 vreg_l6c_2p96: ldo6 { 516 regulator-name = "vreg_l6c_2p96"; 517 regulator-min-microvolt = <1650000>; 518 regulator-max-microvolt = <3544000>; 519 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 520 }; 521 522 vreg_l7c_3p0: ldo7 { 523 regulator-name = "vreg_l7c_3p0"; 524 regulator-min-microvolt = <3000000>; 525 regulator-max-microvolt = <3544000>; 526 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 527 }; 528 529 vreg_l8c_1p8: ldo8 { 530 regulator-name = "vreg_l8c_1p8"; 531 regulator-min-microvolt = <1620000>; 532 regulator-max-microvolt = <2000000>; 533 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 534 }; 535 536 vreg_l9c_2p96: ldo9 { 537 regulator-name = "vreg_l9c_2p96"; 538 regulator-min-microvolt = <2700000>; 539 regulator-max-microvolt = <3544000>; 540 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 541 }; 542 543 vreg_l10c_0p88: ldo10 { 544 regulator-name = "vreg_l10c_0p88"; 545 regulator-min-microvolt = <720000>; 546 regulator-max-microvolt = <1050000>; 547 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 548 regulator-allow-set-load; 549 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 550 RPMH_REGULATOR_MODE_HPM>; 551 }; 552 553 vreg_l11c_2p8: ldo11 { 554 regulator-name = "vreg_l11c_2p8"; 555 regulator-min-microvolt = <2800000>; 556 regulator-max-microvolt = <3544000>; 557 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 558 }; 559 560 vreg_l12c_1p8: ldo12 { 561 regulator-name = "vreg_l12c_1p8"; 562 regulator-min-microvolt = <1650000>; 563 regulator-max-microvolt = <2000000>; 564 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 565 }; 566 567 vreg_l13c_3p0: ldo13 { 568 regulator-name = "vreg_l13c_3p0"; 569 regulator-min-microvolt = <2700000>; 570 regulator-max-microvolt = <3544000>; 571 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 572 }; 573 574 vreg_bob: bob { 575 regulator-name = "vreg_bob"; 576 regulator-min-microvolt = <3008000>; 577 regulator-max-microvolt = <3960000>; 578 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 579 }; 580 }; 581}; 582 583&dispcc { 584 status = "disabled"; 585}; 586 587&gcc { 588 protected-clocks = <GCC_CFG_NOC_LPASS_CLK>, 589 <GCC_MSS_CFG_AHB_CLK>, 590 <GCC_MSS_OFFLINE_AXI_CLK>, 591 <GCC_MSS_Q6SS_BOOT_CLK_SRC>, 592 <GCC_MSS_Q6_MEMNOC_AXI_CLK>, 593 <GCC_MSS_SNOC_AXI_CLK>, 594 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, 595 <GCC_QSPI_CORE_CLK>, 596 <GCC_QSPI_CORE_CLK_SRC>, 597 <GCC_SEC_CTRL_CLK_SRC>, 598 <GCC_WPSS_AHB_BDG_MST_CLK>, 599 <GCC_WPSS_AHB_CLK>, 600 <GCC_WPSS_RSCP_CLK>; 601}; 602 603&gpi_dma0 { 604 status = "okay"; 605}; 606 607&gpi_dma1 { 608 status = "okay"; 609}; 610 611&gpu { 612 status = "okay"; 613}; 614 615&gpu_zap_shader { 616 firmware-name = "qcom/sm7325/xiaomi/taoyao/a660_zap.mbn"; 617}; 618 619&i2c1 { 620 clock-frequency = <100000>; 621 622 status = "okay"; 623 624 typec-mux@42 { 625 compatible = "fcs,fsa4480"; 626 reg = <0x42>; 627 628 vcc-supply = <&vreg_bob>; 629 630 mode-switch; 631 orientation-switch; 632 633 port { 634 fsa4480_sbu_mux: endpoint { 635 remote-endpoint = <&pmic_glink_sbu>; 636 }; 637 }; 638 }; 639}; 640 641&ipa { 642 firmware-name = "qcom/sm7325/xiaomi/taoyao/ipa_fws.mbn"; 643 644 status = "okay"; 645}; 646 647&lpass_audiocc { 648 compatible = "qcom,qcm6490-lpassaudiocc"; 649 /delete-property/ power-domains; 650}; 651 652&pm7325_gpios { 653 key_vol_up: key-vol-up-n-state { 654 pins = "gpio6"; 655 function = PMIC_GPIO_FUNC_NORMAL; 656 power-source = <1>; 657 bias-pull-up; 658 input-enable; 659 }; 660}; 661 662&pmk8350_rtc { 663 status = "okay"; 664}; 665 666&pon_pwrkey { 667 status = "okay"; 668}; 669 670&pon_resin { 671 linux,code = <KEY_VOLUMEDOWN>; 672 673 status = "okay"; 674}; 675 676&qup_spi13_cs { 677 drive-strength = <6>; 678 bias-disable; 679}; 680 681&qup_spi13_data_clk { 682 drive-strength = <6>; 683 bias-disable; 684}; 685 686&qupv3_id_0 { 687 status = "okay"; 688}; 689 690&qupv3_id_1 { 691 status = "okay"; 692}; 693 694&remoteproc_adsp { 695 firmware-name = "qcom/sm7325/xiaomi/taoyao/adsp.mbn"; 696 697 status = "okay"; 698}; 699 700&remoteproc_cdsp { 701 firmware-name = "qcom/sm7325/xiaomi/taoyao/cdsp.mbn"; 702 703 status = "okay"; 704}; 705 706&remoteproc_mpss { 707 firmware-name = "qcom/sm7325/xiaomi/taoyao/modem.mbn"; 708 709 status = "okay"; 710}; 711 712&remoteproc_wpss { 713 firmware-name = "qcom/sm7325/xiaomi/taoyao/wpss.mbn"; 714 715 status = "okay"; 716}; 717 718&spi13 { 719 status = "okay"; 720 721 touchscreen@0 { 722 compatible = "goodix,gt9916"; 723 reg = <0>; 724 725 interrupts-extended = <&tlmm 81 IRQ_TYPE_LEVEL_LOW>; 726 727 reset-gpios = <&tlmm 105 GPIO_ACTIVE_LOW>; 728 729 avdd-supply = <&vreg_l7c_3p0>; 730 vddio-supply = <&vreg_l2c_1p8>; 731 732 spi-max-frequency = <5000000>; 733 734 touchscreen-size-x = <10800>; 735 touchscreen-size-y = <24000>; 736 737 pinctrl-0 = <&ts_irq>, <&ts_reset>; 738 pinctrl-names = "default"; 739 }; 740}; 741 742&tlmm { 743 /* 744 * 48-51: presumably NFC SE 745 * 56-59: presumably fingerprint reader 746 */ 747 gpio-reserved-ranges = <48 4>, <56 4>; 748 749 bt_uart_sleep_cts: bt-uart-sleep-cts-state { 750 pins = "gpio28"; 751 function = "gpio"; 752 bias-bus-hold; 753 }; 754 755 bt_uart_sleep_rts: bt-uart-sleep-rts-state { 756 pins = "gpio29"; 757 function = "gpio"; 758 bias-pull-down; 759 }; 760 761 bt_uart_sleep_txd: bt-uart-sleep-txd-state { 762 pins = "gpio30"; 763 function = "gpio"; 764 bias-pull-up; 765 }; 766 767 bt_uart_sleep_rxd: bt-uart-sleep-rxd-state { 768 pins = "gpio31"; 769 function = "gpio"; 770 bias-pull-up; 771 }; 772 773 sde_dsi_active: sde-dsi-active-state { 774 pins = "gpio44"; 775 function = "gpio"; 776 drive-strength = <8>; 777 bias-disable; 778 }; 779 780 sde_dsi_sleep: sde-dsi-sleep-state { 781 pins = "gpio44"; 782 function = "gpio"; 783 drive-strength = <2>; 784 bias-pull-down; 785 }; 786 787 sde_te_active_sleep: sde-te-active-state { 788 pins = "gpio80"; 789 function = "mdp_vsync"; 790 drive-strength = <2>; 791 bias-pull-down; 792 }; 793 794 ts_irq: ts-irq-state { 795 pins = "gpio81"; 796 function = "gpio"; 797 drive-strength = <8>; 798 bias-pull-up; 799 }; 800 801 hst_bt_en: hst-bt-en-state { 802 pins = "gpio85"; 803 function = "gpio"; 804 bias-disable; 805 }; 806 807 hst_sw_ctrl: hst-sw-ctrl-state { 808 pins = "gpio86"; 809 function = "gpio"; 810 bias-pull-down; 811 }; 812 813 ts_reset: ts-reset-state { 814 pins = "gpio105"; 815 function = "gpio"; 816 drive-strength = <8>; 817 bias-pull-up; 818 }; 819}; 820 821&uart5 { 822 status = "okay"; 823}; 824 825&uart7 { 826 /delete-property/interrupts; 827 interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, 828 <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; 829 830 pinctrl-1 = <&bt_uart_sleep_cts>, 831 <&bt_uart_sleep_rts>, 832 <&bt_uart_sleep_txd>, 833 <&bt_uart_sleep_rxd>; 834 pinctrl-names = "default", "sleep"; 835 836 status = "okay"; 837 838 bluetooth: bluetooth { 839 compatible = "qcom,wcn6750-bt"; 840 841 vddrfacmn-supply = <&vreg_pmu_rfa_cmn>; 842 vddaon-supply = <&vreg_pmu_aon_0p59>; 843 vddbtcmx-supply = <&vreg_pmu_btcmx_0p85>; 844 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; 845 vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>; 846 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; 847 max-speed = <3200000>; 848 }; 849}; 850 851&ufs_mem_hc { 852 reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; 853 854 vcc-supply = <&vreg_l7b_2p96>; 855 vcc-max-microamp = <800000>; 856 /* 857 * Technically l9b enables an eLDO (supplied by s1b) which then powers 858 * VCCQ2 of the UFS. 859 */ 860 vccq2-supply = <&vreg_l9b_1p2>; 861 vccq2-max-microamp = <900000>; 862 863 status = "okay"; 864}; 865 866&ufs_mem_phy { 867 vdda-phy-supply = <&vreg_l10c_0p88>; 868 vdda-pll-supply = <&vreg_l6b_1p2>; 869 870 status = "okay"; 871}; 872 873&usb_1 { 874 /* USB 2.0 only */ 875 qcom,select-utmi-as-pipe-clk; 876 877 maximum-speed = "high-speed"; 878 /* Remove USB3 phy */ 879 phys = <&usb_1_hsphy>; 880 phy-names = "usb2-phy"; 881 882 status = "okay"; 883}; 884 885&usb_1_dwc3_hs { 886 remote-endpoint = <&pmic_glink_hs_in>; 887}; 888 889&usb_1_hsphy { 890 vdda-pll-supply = <&vreg_l10c_0p88>; 891 vdda18-supply = <&vreg_l1c_1p8>; 892 vdda33-supply = <&vreg_l2b_3p072>; 893 894 status = "okay"; 895}; 896 897&venus { 898 firmware-name = "qcom/sm7325/xiaomi/taoyao/vpu20_1v.mbn"; 899 900 status = "okay"; 901}; 902 903&wifi { 904 qcom,calibration-variant = "Xiaomi_taoyao"; 905 906 status = "okay"; 907}; 908