1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Google Zombie board device tree source 4 * 5 * Copyright 2022 Google LLC. 6 */ 7 8#include "sc7280-herobrine.dtsi" 9#include "sc7280-herobrine-audio-rt5682.dtsi" 10 11/* 12 * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES 13 * 14 * Sort order matches the order in the parent files (parents before children). 15 */ 16 17&pp3300_codec { 18 status = "okay"; 19}; 20 21/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ 22 23ap_tp_i2c: &i2c0 { 24 clock-frequency = <400000>; 25 status = "okay"; 26 27 trackpad: trackpad@15 { 28 compatible = "hid-over-i2c"; 29 reg = <0x15>; 30 pinctrl-names = "default"; 31 pinctrl-0 = <&tp_int_odl>; 32 33 interrupt-parent = <&tlmm>; 34 interrupts = <7 IRQ_TYPE_EDGE_FALLING>; 35 36 hid-descr-addr = <0x01>; 37 vdd-supply = <&pp3300_z1>; 38 39 wakeup-source; 40 }; 41}; 42 43&ap_sar_sensor_i2c { 44 status = "okay"; 45}; 46 47&ap_sar_sensor0 { 48 status = "okay"; 49}; 50 51&ap_sar_sensor1 { 52 status = "okay"; 53}; 54 55&mdss_edp { 56 status = "okay"; 57}; 58 59&mdss_edp_phy { 60 status = "okay"; 61}; 62 63&pm8350c_pwm_backlight { 64 /* Set the PWM period to 320 microseconds (3.125kHz frequency) */ 65 pwms = <&pm8350c_pwm 3 320000>; 66}; 67 68&pwmleds { 69 status = "okay"; 70}; 71 72/* For eMMC */ 73&sdhc_1 { 74 status = "okay"; 75}; 76 77/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */ 78 79&ts_rst_conn { 80 bias-disable; 81}; 82 83/* PINCTRL - BOARD-SPECIFIC */ 84 85/* 86 * Methodology for gpio-line-names: 87 * - If a pin goes to herobrine board and is named it gets that name. 88 * - If a pin goes to herobrine board and is not named, it gets no name. 89 * - If a pin is totally internal to Qcard then it gets Qcard name. 90 * - If a pin is not hooked up on Qcard, it gets no name. 91 */ 92 93&pm8350c_gpios { 94 gpio-line-names = "FLASH_STROBE_1", /* 1 */ 95 "AP_SUSPEND", 96 "PM8008_1_RST_N", 97 "", 98 "", 99 "", 100 "PMIC_EDP_BL_EN", 101 "PMIC_EDP_BL_PWM", 102 ""; 103}; 104 105&tlmm { 106 gpio-line-names = "AP_TP_I2C_SDA", /* 0 */ 107 "AP_TP_I2C_SCL", 108 "SSD_RST_L", 109 "PE_WAKE_ODL", 110 "AP_SAR_SDA", 111 "AP_SAR_SCL", 112 "PRB_SC_GPIO_6", 113 "TP_INT_ODL", 114 "HP_I2C_SDA", 115 "HP_I2C_SCL", 116 117 "GNSS_L1_EN", /* 10 */ 118 "GNSS_L5_EN", 119 "SPI_AP_MOSI", 120 "SPI_AP_MISO", 121 "SPI_AP_CLK", 122 "SPI_AP_CS0_L", 123 /* 124 * AP_FLASH_WP is crossystem ABI. Schematics 125 * call it BIOS_FLASH_WP_OD. 126 */ 127 "AP_FLASH_WP", 128 "", 129 "AP_EC_INT_L", 130 "", 131 132 "UF_CAM_RST_L", /* 20 */ 133 "WF_CAM_RST_L", 134 "UART_AP_TX_DBG_RX", 135 "UART_DBG_TX_AP_RX", 136 "", 137 "PM8008_IRQ_1", 138 "HOST2WLAN_SOL", 139 "WLAN2HOST_SOL", 140 "MOS_BT_UART_CTS", 141 "MOS_BT_UART_RFR", 142 143 "MOS_BT_UART_TX", /* 30 */ 144 "MOS_BT_UART_RX", 145 "PRB_SC_GPIO_32", 146 "HUB_RST_L", 147 "", 148 "", 149 "AP_SPI_FP_MISO", 150 "AP_SPI_FP_MOSI", 151 "AP_SPI_FP_CLK", 152 "AP_SPI_FP_CS_L", 153 154 "AP_EC_SPI_MISO", /* 40 */ 155 "AP_EC_SPI_MOSI", 156 "AP_EC_SPI_CLK", 157 "AP_EC_SPI_CS_L", 158 "LCM_RST_L", 159 "EARLY_EUD_N", 160 "", 161 "DP_HOT_PLUG_DET", 162 "IO_BRD_MLB_ID0", 163 "IO_BRD_MLB_ID1", 164 165 "IO_BRD_MLB_ID2", /* 50 */ 166 "SSD_EN", 167 "TS_I2C_SDA_CONN", 168 "TS_I2C_CLK_CONN", 169 "TS_RST_CONN", 170 "TS_INT_CONN", 171 "AP_I2C_TPM_SDA", 172 "AP_I2C_TPM_SCL", 173 "PRB_SC_GPIO_58", 174 "PRB_SC_GPIO_59", 175 176 "EDP_HOT_PLUG_DET_N", /* 60 */ 177 "FP_TO_AP_IRQ_L", 178 "", 179 "AMP_EN", 180 "CAM0_MCLK_GPIO_64", 181 "CAM1_MCLK_GPIO_65", 182 "WF_CAM_MCLK", 183 "PRB_SC_GPIO_67", 184 "FPMCU_BOOT0", 185 "UF_CAM_SDA", 186 187 "UF_CAM_SCL", /* 70 */ 188 "", 189 "", 190 "WF_CAM_SDA", 191 "WF_CAM_SCL", 192 "", 193 "", 194 "EN_FP_RAILS", 195 "FP_RST_L", 196 "PCIE1_CLKREQ_ODL", 197 198 "EN_PP3300_DX_EDP", /* 80 */ 199 "US_EURO_HS_SEL", 200 "FORCED_USB_BOOT", 201 "WCD_RESET_N", 202 "MOS_WLAN_EN", 203 "MOS_BT_EN", 204 "MOS_SW_CTRL", 205 "MOS_PCIE0_RST", 206 "MOS_PCIE0_CLKREQ_N", 207 "MOS_PCIE0_WAKE_N", 208 209 "MOS_LAA_AS_EN", /* 90 */ 210 "SD_CD_ODL", 211 "", 212 "", 213 "MOS_BT_WLAN_SLIMBUS_CLK", 214 "MOS_BT_WLAN_SLIMBUS_DAT0", 215 "HP_MCLK", 216 "HP_BCLK", 217 "HP_DOUT", 218 "HP_DIN", 219 220 "HP_LRCLK", /* 100 */ 221 "HP_IRQ", 222 "", 223 "", 224 "GSC_AP_INT_ODL", 225 "EN_PP3300_CODEC", 226 "AMP_BCLK", 227 "AMP_DIN", 228 "AMP_LRCLK", 229 "UIM1_DATA_GPIO_109", 230 231 "UIM1_CLK_GPIO_110", /* 110 */ 232 "UIM1_RESET_GPIO_111", 233 "PRB_SC_GPIO_112", 234 "UIM0_DATA", 235 "UIM0_CLK", 236 "UIM0_RST", 237 "UIM0_PRESENT_ODL", 238 "SDM_RFFE0_CLK", 239 "SDM_RFFE0_DATA", 240 "WF_CAM_EN", 241 242 "FASTBOOT_SEL_0", /* 120 */ 243 "SC_GPIO_121", 244 "FASTBOOT_SEL_1", 245 "SC_GPIO_123", 246 "FASTBOOT_SEL_2", 247 "SM_RFFE4_CLK_GRFC_8", 248 "SM_RFFE4_DATA_GRFC_9", 249 "WLAN_COEX_UART1_RX", 250 "WLAN_COEX_UART1_TX", 251 "PRB_SC_GPIO_129", 252 253 "LCM_ID0", /* 130 */ 254 "LCM_ID1", 255 "", 256 "SDR_QLINK_REQ", 257 "SDR_QLINK_EN", 258 "QLINK0_WMSS_RESET_N", 259 "SMR526_QLINK1_REQ", 260 "SMR526_QLINK1_EN", 261 "SMR526_QLINK1_WMSS_RESET_N", 262 "PRB_SC_GPIO_139", 263 264 "SAR1_IRQ_ODL", /* 140 */ 265 "SAR0_IRQ_ODL", 266 "PRB_SC_GPIO_142", 267 "", 268 "WCD_SWR_TX_CLK", 269 "WCD_SWR_TX_DATA0", 270 "WCD_SWR_TX_DATA1", 271 "WCD_SWR_RX_CLK", 272 "WCD_SWR_RX_DATA0", 273 "WCD_SWR_RX_DATA1", 274 275 "DMIC01_CLK", /* 150 */ 276 "DMIC01_DATA", 277 "DMIC23_CLK", 278 "DMIC23_DATA", 279 "", 280 "", 281 "EC_IN_RW_ODL", 282 "HUB_EN", 283 "WCD_SWR_TX_DATA2", 284 "", 285 286 "", /* 160 */ 287 "", 288 "", 289 "", 290 "", 291 "", 292 "", 293 "", 294 "", 295 "", 296 297 "", /* 170 */ 298 "MOS_BLE_UART_TX", 299 "MOS_BLE_UART_RX", 300 "", 301 ""; 302}; 303