1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4 */ 5 6/dts-v1/; 7/plugin/; 8 9#include <dt-bindings/clock/qcom,sa8775p-camcc.h> 10#include <dt-bindings/gpio/gpio.h> 11 12&{/} { 13 vreg_cam1_1p8: regulator-cam1 { 14 compatible = "regulator-fixed"; 15 regulator-name = "vreg_cam1"; 16 startup-delay-us = <10000>; 17 enable-active-high; 18 gpio = <&pmm8654au_0_gpios 8 GPIO_ACTIVE_HIGH>; 19 }; 20}; 21 22&camss { 23 vdda-pll-supply = <&vreg_l1c>; 24 vdda-phy-supply = <&vreg_l4a>; 25 26 status = "okay"; 27 28 ports { 29 #address-cells = <1>; 30 #size-cells = <0>; 31 32 port@1 { 33 reg = <1>; 34 35 csiphy1_ep: endpoint { 36 clock-lanes = <7>; 37 data-lanes = <0 1 2 3>; 38 remote-endpoint = <&imx577_ep1>; 39 }; 40 }; 41 }; 42}; 43 44&cci1 { 45 pinctrl-0 = <&cci1_0_default>; 46 pinctrl-1 = <&cci1_0_sleep>; 47 48 status = "okay"; 49}; 50 51&cci1_i2c0 { 52 #address-cells = <1>; 53 #size-cells = <0>; 54 55 camera@1a { 56 compatible = "sony,imx577"; 57 reg = <0x1a>; 58 59 reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>; 60 pinctrl-0 = <&cam1_default>; 61 pinctrl-names = "default"; 62 63 clocks = <&camcc CAM_CC_MCLK1_CLK>; 64 assigned-clocks = <&camcc CAM_CC_MCLK1_CLK>; 65 assigned-clock-rates = <24000000>; 66 67 dovdd-supply = <&vreg_s4a>; 68 avdd-supply = <&vreg_cam1_1p8>; 69 70 port { 71 imx577_ep1: endpoint { 72 clock-lanes = <7>; 73 link-frequencies = /bits/ 64 <600000000>; 74 data-lanes = <0 1 2 3>; 75 remote-endpoint = <&csiphy1_ep>; 76 }; 77 }; 78 }; 79}; 80 81&tlmm { 82 cam1_default: cam1-default-state { 83 mclk-pins { 84 pins = "gpio73"; 85 function = "cam_mclk"; 86 drive-strength = <2>; 87 bias-disable; 88 }; 89 90 rst-pins { 91 pins = "gpio133"; 92 function = "gpio"; 93 drive-strength = <2>; 94 bias-disable; 95 }; 96 }; 97}; 98