xref: /linux/arch/arm64/boot/dts/qcom/ipq9574-rdp433-common.dtsi (revision e65f4718a577fcc84d40431f022985898b6dbf2e)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * IPQ9574 RDP433 board device tree source
4 *
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
6 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
7 */
8
9&pcie1_phy {
10	status = "okay";
11};
12
13&pcie1 {
14	pinctrl-0 = <&pcie1_default>;
15	pinctrl-names = "default";
16
17	perst-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
18	wake-gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
19	status = "okay";
20};
21
22&pcie2_phy {
23	status = "okay";
24};
25
26&pcie2 {
27	pinctrl-0 = <&pcie2_default>;
28	pinctrl-names = "default";
29
30	perst-gpios = <&tlmm 29 GPIO_ACTIVE_LOW>;
31	wake-gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
32	status = "okay";
33};
34
35&pcie3_phy {
36	status = "okay";
37};
38
39&pcie3 {
40	pinctrl-0 = <&pcie3_default>;
41	pinctrl-names = "default";
42
43	perst-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
44	wake-gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
45	status = "okay";
46};
47
48&tlmm {
49
50	pcie1_default: pcie1-default-state {
51		clkreq-n-pins {
52			pins = "gpio25";
53			function = "pcie1_clk";
54			drive-strength = <6>;
55			bias-pull-up;
56		};
57
58		perst-n-pins {
59			pins = "gpio26";
60			function = "gpio";
61			drive-strength = <8>;
62			bias-pull-down;
63			output-low;
64		};
65
66		wake-n-pins {
67			pins = "gpio27";
68			function = "pcie1_wake";
69			drive-strength = <6>;
70			bias-pull-up;
71		};
72	};
73
74	pcie2_default: pcie2-default-state {
75		clkreq-n-pins {
76			pins = "gpio28";
77			function = "pcie2_clk";
78			drive-strength = <6>;
79			bias-pull-up;
80		};
81
82		perst-n-pins {
83			pins = "gpio29";
84			function = "gpio";
85			drive-strength = <8>;
86			bias-pull-down;
87			output-low;
88		};
89
90		wake-n-pins {
91			pins = "gpio30";
92			function = "pcie2_wake";
93			drive-strength = <6>;
94			bias-pull-up;
95		};
96	};
97
98	pcie3_default: pcie3-default-state {
99		clkreq-n-pins {
100			pins = "gpio31";
101			function = "pcie3_clk";
102			drive-strength = <6>;
103			bias-pull-up;
104		};
105
106		perst-n-pins {
107			pins = "gpio32";
108			function = "gpio";
109			drive-strength = <8>;
110			bias-pull-up;
111			output-low;
112		};
113
114		wake-n-pins {
115			pins = "gpio33";
116			function = "pcie3_wake";
117			drive-strength = <6>;
118			bias-pull-up;
119		};
120	};
121};
122