xref: /linux/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-pro.dtsi (revision 0cac5ce06e524755b3dac1e0a060b05992076d93)
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (C) 2025 MediaTek Inc.
4 * Author: Sam.Shih <sam.shih@mediatek.com>
5 * Author: Frank Wunderlich <frank-w@public-files.de>
6 */
7
8/dts-v1/;
9
10#include "mt7988a.dtsi"
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/input/input.h>
13#include <dt-bindings/leds/common.h>
14#include <dt-bindings/regulator/richtek,rt5190a-regulator.h>
15
16/ {
17	aliases {
18		ethernet0 = &gmac0;
19		i2c0 = &i2c0;
20		i2c1 = &i2c1;
21		i2c2 = &i2c2;
22		/* PCA9548 (0-0070) provides 4 i2c channels */
23		i2c3 = &imux0;
24		i2c4 = &imux1_sfp1;
25		i2c5 = &imux2_sfp2;
26		i2c6 = &imux3_wifi;
27	};
28
29	chosen {
30		stdout-path = &serial0;
31	};
32
33	fan: pwm-fan {
34		compatible = "pwm-fan";
35		/* cooling level (0, 1, 2, 3) : (0% duty, 30% duty, 50% duty, 100% duty) */
36		cooling-levels = <0 80 128 255>;
37		pinctrl-0 = <&pwm0_pins>;
38		pinctrl-names = "default";
39		pwms = <&pwm 0 50000>;
40		#cooling-cells = <2>;
41	};
42
43	gpio-keys {
44		compatible = "gpio-keys";
45
46		button-reset {
47			label = "reset";
48			gpios = <&pio 13 GPIO_ACTIVE_LOW>;
49			linux,code = <KEY_RESTART>;
50		};
51
52		button-wps {
53			label = "WPS";
54			gpios = <&pio 14 GPIO_ACTIVE_LOW>;
55			linux,code = <KEY_WPS_BUTTON>;
56		};
57	};
58
59	gpio-leds {
60		compatible = "gpio-leds";
61
62		led_red: sys-led-red {
63			color = <LED_COLOR_ID_RED>;
64			gpios = <&pca9555 15 GPIO_ACTIVE_HIGH>;
65			default-state = "on";
66		};
67
68		led_blue: sys-led-blue {
69			color = <LED_COLOR_ID_BLUE>;
70			gpios = <&pca9555 14 GPIO_ACTIVE_HIGH>;
71			default-state = "on";
72		};
73	};
74
75	reg_1p8v: regulator-dvdd1v8 {
76		compatible = "regulator-fixed";
77		regulator-name = "DVDD1V8_SOC";
78		regulator-min-microvolt = <1800000>;
79		regulator-max-microvolt = <1800000>;
80		regulator-boot-on;
81		regulator-always-on;
82	};
83
84	reg_3p3v: regulator-3v3vd {
85		compatible = "regulator-fixed";
86		regulator-name = "3V3VD";
87		regulator-min-microvolt = <3300000>;
88		regulator-max-microvolt = <3300000>;
89		regulator-boot-on;
90		regulator-always-on;
91	};
92
93	/* SFP1 cage (LAN) */
94	sfp1: sfp1 {
95		compatible = "sff,sfp";
96		i2c-bus = <&imux1_sfp1>;
97		los-gpios = <&pio 70 GPIO_ACTIVE_HIGH>;
98		mod-def0-gpios = <&pio 69 GPIO_ACTIVE_LOW>;
99		tx-disable-gpios = <&pio 21 GPIO_ACTIVE_HIGH>;
100		maximum-power-milliwatt = <3000>;
101	};
102
103	/* SFP2 cage (WAN) */
104	sfp2: sfp2 {
105		compatible = "sff,sfp";
106		i2c-bus = <&imux2_sfp2>;
107		los-gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
108		mod-def0-gpios = <&pio 1 GPIO_ACTIVE_LOW>;
109		tx-disable-gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
110		maximum-power-milliwatt = <3000>;
111	};
112};
113
114&cci {
115	proc-supply = <&rt5190_buck3>;
116};
117
118&cpu0 {
119	proc-supply = <&rt5190_buck3>;
120};
121
122&cpu1 {
123	proc-supply = <&rt5190_buck3>;
124};
125
126&cpu2 {
127	proc-supply = <&rt5190_buck3>;
128};
129
130&cpu3 {
131	proc-supply = <&rt5190_buck3>;
132};
133
134&cpu_thermal {
135	trips {
136		cpu_trip_hot: hot {
137			temperature = <120000>;
138			hysteresis = <2000>;
139			type = "hot";
140		};
141
142		cpu_trip_active_high: active-high {
143			temperature = <115000>;
144			hysteresis = <2000>;
145			type = "active";
146		};
147
148		cpu_trip_active_med: active-med {
149			temperature = <85000>;
150			hysteresis = <2000>;
151			type = "active";
152		};
153
154		cpu_trip_active_low: active-low {
155			temperature = <40000>;
156			hysteresis = <2000>;
157			type = "active";
158		};
159	};
160
161	cooling-maps {
162		map-cpu-active-high {
163			/* active: set fan to cooling level 2 */
164			cooling-device = <&fan 3 3>;
165			trip = <&cpu_trip_active_high>;
166		};
167
168		map-cpu-active-med {
169			/* active: set fan to cooling level 1 */
170			cooling-device = <&fan 2 2>;
171			trip = <&cpu_trip_active_med>;
172		};
173
174		map-cpu-active-low {
175			/* active: set fan to cooling level 0 */
176			cooling-device = <&fan 1 1>;
177			trip = <&cpu_trip_active_low>;
178		};
179	};
180};
181
182&eth {
183	pinctrl-0 = <&mdio0_pins>;
184	pinctrl-names = "default";
185	status = "okay";
186};
187
188&fan {
189	pinctrl-0 = <&pwm0_pins>;
190	pinctrl-names = "default";
191	pwms = <&pwm 0 50000>;
192	status = "okay";
193};
194
195&gmac0 {
196	status = "okay";
197};
198
199&gsw_phy0 {
200	pinctrl-0 = <&gbe0_led0_pins>;
201	pinctrl-names = "gbe-led";
202};
203
204&gsw_phy0_led0 {
205	color = <LED_COLOR_ID_YELLOW>;
206	status = "okay";
207};
208
209&gsw_port0 {
210	label = "mgmt";
211};
212
213/* R4Pro has only port 0 connected, so disable the others */
214&gsw_phy1 {
215	status = "disabled";
216};
217
218&gsw_port1 {
219	status = "disabled";
220};
221
222&gsw_phy2 {
223	status = "disabled";
224};
225
226&gsw_port2 {
227	status = "disabled";
228};
229
230&gsw_phy3 {
231	status = "disabled";
232};
233
234&gsw_port3 {
235	status = "disabled";
236};
237
238&i2c0 {
239	pinctrl-0 = <&i2c0_pins>;
240	pinctrl-names = "default";
241	status = "okay";
242
243	rt5190a_64: rt5190a@64 {
244		compatible = "richtek,rt5190a";
245		reg = <0x64>;
246		vin2-supply = <&rt5190_buck1>;
247		vin3-supply = <&rt5190_buck1>;
248		vin4-supply = <&rt5190_buck1>;
249
250		regulators {
251			rt5190_buck1: buck1 {
252				regulator-name = "rt5190a-buck1";
253				regulator-min-microvolt = <5090000>;
254				regulator-max-microvolt = <5090000>;
255				regulator-allowed-modes =
256				<RT5190A_OPMODE_AUTO RT5190A_OPMODE_FPWM>;
257				regulator-boot-on;
258				regulator-always-on;
259			};
260
261			buck2 {
262				regulator-name = "vcore";
263				regulator-min-microvolt = <600000>;
264				regulator-max-microvolt = <1400000>;
265				regulator-boot-on;
266				regulator-always-on;
267			};
268
269			rt5190_buck3: buck3 {
270				regulator-name = "vproc";
271				regulator-min-microvolt = <600000>;
272				regulator-max-microvolt = <1400000>;
273				regulator-boot-on;
274				regulator-always-on;
275			};
276
277			buck4 {
278				regulator-name = "rt5190a-buck4";
279				regulator-min-microvolt = <1800000>;
280				regulator-max-microvolt = <1800000>;
281				regulator-allowed-modes =
282				<RT5190A_OPMODE_AUTO RT5190A_OPMODE_FPWM>;
283				regulator-boot-on;
284				regulator-always-on;
285			};
286
287			ldo {
288				regulator-name = "rt5190a-ldo";
289				regulator-min-microvolt = <1800000>;
290				regulator-max-microvolt = <1800000>;
291				regulator-boot-on;
292				regulator-always-on;
293			};
294		};
295	};
296};
297
298&i2c1 {
299	pinctrl-0 = <&i2c1_pins>;
300	pinctrl-names = "default";
301	status = "okay";
302};
303
304&i2c2 {
305	pinctrl-0 = <&i2c2_1_pins>;
306	pinctrl-names = "default";
307	status = "okay";
308
309	pca9545: i2c-mux@70 {
310		compatible = "nxp,pca9545";
311		reg = <0x70>;
312		#address-cells = <1>;
313		#size-cells = <0>;
314
315		imux0: i2c@0 {
316			reg = <0>;
317			#address-cells = <1>;
318			#size-cells = <0>;
319
320			pca9555: i2c-gpio-expander@20 {
321				compatible = "nxp,pca9555";
322				reg = <0x20>;
323				gpio-controller;
324				#gpio-cells = <2>;
325			};
326
327			rtc@51 {
328				compatible = "nxp,pcf8563";
329				reg = <0x51>;
330			};
331
332			eeprom@57 {
333				compatible = "atmel,24c02";
334				reg = <0x57>;
335				address-width = <8>;
336				pagesize = <8>;
337				size = <256>;
338			};
339		};
340
341		imux1_sfp1: i2c@1 {
342			reg = <1>;
343			#address-cells = <1>;
344			#size-cells = <0>;
345		};
346
347		imux2_sfp2: i2c@2 {
348			reg = <2>;
349			#address-cells = <1>;
350			#size-cells = <0>;
351		};
352
353		imux3_wifi: i2c@3 {
354			reg = <3>;
355			#address-cells = <1>;
356			#size-cells = <0>;
357		};
358	};
359};
360
361/* mPCIe SIM2 (11300000) */
362&pcie0 {
363	status = "okay";
364};
365
366/* mPCIe (11310000 near leds) SIM3 */
367&pcie1 {
368	status = "okay";
369};
370
371/* M.2 (11280000) 1L0 key-m SSD1 CN13 / key-b SIM1 CN15 */
372&pcie2 {
373	status = "okay";
374};
375
376/* M.2 (11290000) 1L1 key-m SSD2 CN14 / key-b SIM2 CN18 */
377&pcie3 {
378	status = "okay";
379};
380
381&pio {
382	gbe0_led0_pins: gbe0-led0-pins {
383		mux {
384			function = "led";
385			groups = "gbe0_led0";
386		};
387	};
388
389	i2c0_pins: i2c0-g0-pins {
390		mux {
391			function = "i2c";
392			groups = "i2c0_1";
393		};
394	};
395
396	i2c1_pins: i2c1-g0-pins {
397		mux {
398			function = "i2c";
399			groups = "i2c1_0";
400		};
401	};
402
403	i2c2_1_pins: i2c2-g1-pins {
404		mux {
405			function = "i2c";
406			groups = "i2c2_1";
407		};
408	};
409
410	mdio0_pins: mdio0-pins {
411		mux {
412			function = "eth";
413			groups = "mdc_mdio0";
414		};
415
416		conf {
417			pins = "SMI_0_MDC", "SMI_0_MDIO";
418			drive-strength = <8>;
419		};
420	};
421
422	mmc0_pins_emmc_51: mmc0-emmc-51-pins {
423		mux {
424			function = "flash";
425			groups = "emmc_51";
426		};
427	};
428
429	mmc0_pins_sdcard: mmc0-sdcard-pins {
430		mux {
431			function = "flash";
432			groups = "sdcard";
433		};
434	};
435
436	/* 1L0 0=key-b (CN15), 1=key-m (CN13) */
437	pcie-2-hog {
438		gpio-hog;
439		gpios = <79 GPIO_ACTIVE_HIGH>;
440		output-high;
441	};
442
443	/* 1L1 0=key-b (CN18), 1=key-m (CN14) */
444	pcie-3-hog {
445		gpio-hog;
446		gpios = <63 GPIO_ACTIVE_HIGH>;
447		output-high;
448	};
449
450	pwm0_pins: pwm0-pins {
451		mux {
452			groups = "pwm0";
453			function = "pwm";
454		};
455	};
456
457	spi0_flash_pins: spi0-flash-pins {
458		mux {
459			function = "spi";
460			groups = "spi0", "spi0_wp_hold";
461		};
462	};
463};
464
465&pwm {
466	status = "okay";
467};
468
469&serial0 {
470	status = "okay";
471};
472
473&spi0 {
474	pinctrl-0 = <&spi0_flash_pins>;
475	pinctrl-names = "default";
476	status = "okay";
477
478	spi_nand: nand@0 {
479		compatible = "spi-nand";
480		reg = <0>;
481		spi-max-frequency = <52000000>;
482		spi-rx-bus-width = <4>;
483		spi-tx-bus-width = <4>;
484	};
485};
486
487&spi_nand {
488	partitions {
489		compatible = "fixed-partitions";
490		#address-cells = <1>;
491		#size-cells = <1>;
492
493		partition@0 {
494			reg = <0x0 0x200000>;
495			label = "bl2";
496		};
497
498		partition@200000 {
499			compatible = "linux,ubi";
500			reg = <0x200000 0xfe00000>;
501			label = "ubi";
502		};
503	};
504};
505
506/* back USB */
507&ssusb0 {
508	/* Use U2P only instead of both U3P/U2P due to U3P serdes shared with pcie2 */
509	phys = <&xphyu2port0 PHY_TYPE_USB2>;
510	mediatek,u3p-dis-msk = <1>;
511	status = "okay";
512};
513
514/* front USB */
515&ssusb1 {
516	status = "okay";
517};
518
519&switch {
520	dsa,member = <1 0>;
521	status = "okay";
522};
523
524&tphy {
525	status = "okay";
526};
527
528&watchdog {
529	status = "okay";
530};
531
532&xsphy {
533	status = "okay";
534};
535