1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2/* 3 * Copyright (c) Toradex 4 * 5 * https://www.toradex.com/computer-on-modules/aquila-arm-family/nxp-imx95 6 */ 7 8#include <dt-bindings/net/ti-dp83867.h> 9#include "imx95.dtsi" 10 11/ { 12 aliases { 13 can0 = &flexcan1; 14 can1 = &flexcan2; 15 can2 = &flexcan3; 16 can3 = &flexcan4; 17 eeprom0 = &som_eeprom; 18 ethernet0 = &enetc_port0; 19 i2c0 = &lpi2c3; 20 i2c1 = &lpi2c2; 21 i2c2 = &i3c2; 22 i2c3 = &lpi2c8; 23 i2c4 = &lpi2c4; 24 i2c6 = &lpi2c5; 25 mmc0 = &usdhc1; 26 mmc1 = &usdhc2; 27 rtc0 = &rtc_i2c; 28 rtc1 = &scmi_bbm; 29 serial0 = &lpuart3; 30 serial1 = &lpuart7; 31 serial2 = &lpuart1; 32 serial3 = &lpuart2; 33 usb0 = &usb3; 34 usb1 = &usb2; 35 }; 36 37 chosen { 38 stdout-path = "serial2:115200n8"; 39 }; 40 41 aquila_key_wake: gpio-key-wakeup { 42 compatible = "gpio-keys"; 43 pinctrl-names = "default"; 44 pinctrl-0 = <&pinctrl_ctrl_wake1_mico>; 45 46 status = "disabled"; 47 48 key-wakeup { 49 /* Aquila CTRL_WAKE1_MICO# */ 50 gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; 51 label = "Wake Up"; 52 wakeup-source; 53 linux,code = <KEY_WAKEUP>; 54 }; 55 }; 56 57 clk_dsi2dp_refclk: clock-dsi2dp-refclk { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <27000000>; 61 }; 62 63 clk_dsi2dp_refclk_en: clock-dsi2dp-refclk-en { 64 compatible = "gpio-gate-clock"; 65 pinctrl-names = "default"; 66 pinctrl-0 = <&pinctrl_ctrl_dp_clk_en>; 67 clocks = <&clk_dsi2dp_refclk>; 68 #clock-cells = <0>; 69 /* CTRL_DP_CLK_EN */ 70 enable-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; 71 }; 72 73 clk_serdes_eth_ref: clock-serdes-eth-ref { 74 compatible = "gpio-gate-clock"; 75 #clock-cells = <0>; 76 /* CTRL_ETH_REF_CLK_STBY */ 77 enable-gpios = <&som_gpio_expander_0 6 GPIO_ACTIVE_LOW>; 78 }; 79 80 reg_1p8v: regulator-1p8v { 81 compatible = "regulator-fixed"; 82 regulator-max-microvolt = <1800000>; 83 regulator-min-microvolt = <1800000>; 84 regulator-name = "On-module +V1.8"; 85 }; 86 87 reg_dp_1p2v: regulator-dp-1p2v { 88 compatible = "regulator-fixed"; 89 /* CTRL_DP_BRIDGE_EN */ 90 gpios = <&som_gpio_expander_0 7 GPIO_ACTIVE_HIGH>; 91 enable-active-high; 92 regulator-always-on; 93 regulator-max-microvolt = <1200000>; 94 regulator-min-microvolt = <1200000>; 95 regulator-name = "On-module +V1.2_DP"; 96 vin-supply = <®_1p8v>; 97 }; 98 99 reg_usb1_vbus: regulator-usb1-vbus { 100 compatible = "regulator-fixed"; 101 /* Aquila USB_1_EN */ 102 gpios = <&som_gpio_expander_0 2 GPIO_ACTIVE_HIGH>; 103 enable-active-high; 104 regulator-name = "USB_1_EN"; 105 }; 106 107 reg_usb2_vbus: regulator-usb2-vbus { 108 compatible = "regulator-fixed"; 109 /* Aquila USB_2_EN */ 110 gpios = <&som_gpio_expander_0 3 GPIO_ACTIVE_HIGH>; 111 enable-active-high; 112 regulator-name = "USB_2_H_EN"; 113 }; 114 115 reg_usdhc2_vmmc: regulator-usdhc2-vmmc { 116 compatible = "regulator-fixed"; 117 pinctrl-names = "default"; 118 pinctrl-0 = <&pinctrl_sd1_pwr_en>; 119 /* Aquila SD_1_PWR_EN */ 120 gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>; 121 enable-active-high; 122 off-on-delay-us = <100000>; 123 regulator-max-microvolt = <3300000>; 124 regulator-min-microvolt = <3300000>; 125 regulator-name = "SD_1_PWR_EN"; 126 startup-delay-us = <20000>; 127 }; 128 129 reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc { 130 compatible = "regulator-gpio"; 131 /* PMIC_SD_1_VSEL */ 132 gpios = <&som_gpio_expander_1 9 GPIO_ACTIVE_HIGH>; 133 regulator-max-microvolt = <3300000>; 134 regulator-min-microvolt = <1800000>; 135 regulator-name = "PMIC_SD_1_VSEL"; 136 states = <1800000 0x1>, 137 <3300000 0x0>; 138 }; 139 140 remoteproc-cm7 { 141 compatible = "fsl,imx95-cm7"; 142 mboxes = <&mu7 0 1 &mu7 1 1 &mu7 3 1>; 143 mbox-names = "tx", "rx", "rxdb"; 144 memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>, 145 <&vdev1vring0>, <&vdev1vring1>, <&rsc_table>, <&m7_reserved>; 146 }; 147 148 reserved-memory { 149 #address-cells = <2>; 150 #size-cells = <2>; 151 ranges; 152 153 linux_cma: linux,cma { 154 compatible = "shared-dma-pool"; 155 reusable; 156 size = <0 0x3c000000>; 157 alloc-ranges = <0 0x80000000 0 0x7f000000>; 158 linux,cma-default; 159 }; 160 161 m7_reserved: memory@80000000 { 162 reg = <0 0x80000000 0 0x1000000>; 163 no-map; 164 }; 165 166 rsc_table: rsc-table@88220000 { 167 reg = <0 0x88220000 0 0x1000>; 168 no-map; 169 }; 170 171 vdev0vring0: vdev0vring0@88000000 { 172 reg = <0 0x88000000 0 0x8000>; 173 no-map; 174 }; 175 176 vdev0vring1: vdev0vring1@88008000 { 177 reg = <0 0x88008000 0 0x8000>; 178 no-map; 179 }; 180 181 vdev1vring0: vdev1vring0@88010000 { 182 reg = <0 0x88010000 0 0x8000>; 183 no-map; 184 }; 185 186 vdev1vring1: vdev1vring1@88018000 { 187 reg = <0 0x88018000 0 0x8000>; 188 no-map; 189 }; 190 191 vdevbuffer: vdevbuffer@88020000 { 192 compatible = "shared-dma-pool"; 193 reg = <0 0x88020000 0 0x100000>; 194 no-map; 195 }; 196 }; 197}; 198 199/* Aquila ADC_[1-4] */ 200&adc1 { 201 vref-supply = <®_1p8v>; 202}; 203 204/* Aquila ETH_1 */ 205&enetc_port0 { 206 pinctrl-names = "default"; 207 pinctrl-0 = <&pinctrl_enetc0>; 208 phy-handle = <ðphy1>; 209 phy-mode = "rgmii-id"; 210}; 211 212/* Aquila CAN_1 */ 213&flexcan1 { 214 pinctrl-names = "default"; 215 pinctrl-0 = <&pinctrl_flexcan1>; 216}; 217 218/* Aquila CAN_2 */ 219&flexcan2 { 220 pinctrl-names = "default"; 221 pinctrl-0 = <&pinctrl_flexcan2>; 222}; 223 224/* Aquila CAN_3 */ 225&flexcan3 { 226 pinctrl-names = "default"; 227 pinctrl-0 = <&pinctrl_flexcan3>; 228}; 229 230/* Aquila CAN_4 */ 231&flexcan4 { 232 pinctrl-names = "default"; 233 pinctrl-0 = <&pinctrl_flexcan4>; 234}; 235 236/* Aquila QSPI_1 */ 237&flexspi1 { 238 pinctrl-names = "default"; 239 pinctrl-0 = <&pinctrl_flexspi1_8bit>, 240 <&pinctrl_qspi_cs1>; 241}; 242 243&gpio1 { 244 gpio-line-names = "", /* 0 */ 245 "", 246 "", 247 "", 248 "", 249 "", 250 "", 251 "", 252 "", 253 "", 254 "AQUILA_C24", /* 10 */ 255 "", 256 "AQUILA_B17", 257 "CTRL_GPIO_EXP_INT#", 258 "AQUILA_B18"; 259 260 status = "okay"; 261}; 262 263&gpio2 { 264 gpio-line-names = "", /* 0 */ 265 "", 266 "", 267 "", 268 "", 269 "", 270 "", 271 "AQUILA_B42", 272 "", 273 "AQUILA_B43"; 274}; 275 276&gpio3 { 277 gpio-line-names = "", /* 0 */ 278 "", 279 "", 280 "", 281 "", 282 "", 283 "", 284 "", 285 "", 286 "", 287 "", /* 10 */ 288 "", 289 "", 290 "", 291 "", 292 "", 293 "", 294 "", 295 "", 296 "AQUILA_A11", 297 "", /* 20 */ 298 "AQUILA_B57", 299 "AQUILA_B19"; 300}; 301 302&gpio4 { 303 gpio-line-names = "", /* 0 */ 304 "", 305 "", 306 "", 307 "", 308 "", 309 "", 310 "", 311 "", 312 "", 313 "", /* 10 */ 314 "", 315 "", 316 "", 317 "", 318 "", 319 "", 320 "AQUILA_C22", 321 "AQUILA_C21", 322 "AQUILA_C20", 323 "", /* 20 */ 324 "", 325 "", 326 "AQUILA_C23", 327 "AQUILA_D23", 328 "AQUILA_D24", 329 "", 330 "AQUILA_D25"; 331}; 332 333&gpio5 { 334 gpio-line-names = "", /* 0 */ 335 "", 336 "", 337 "", 338 "", 339 "", 340 "", 341 "", 342 "", 343 "", 344 "", /* 10 */ 345 "", 346 "", 347 "AQUILA_B44", 348 "AQUILA_B45"; 349}; 350 351/* Aquila I2C_2 */ 352&i3c2 { 353 pinctrl-names = "default"; 354 pinctrl-0 = <&pinctrl_i3c2>; 355 i2c-scl-hz = <100000>; 356}; 357 358/* Aquila I2C_1 */ 359&lpi2c2 { 360 pinctrl-names = "default", "gpio"; 361 pinctrl-0 = <&pinctrl_lpi2c2>; 362 pinctrl-1 = <&pinctrl_lpi2c2_gpio>; 363 #address-cells = <1>; 364 #size-cells = <0>; 365 clock-frequency = <100000>; 366 scl-gpios = <&gpio1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 367 sda-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 368}; 369 370/* On-module I2C - I2C_SOM */ 371&lpi2c3 { 372 pinctrl-names = "default", "gpio"; 373 pinctrl-0 = <&pinctrl_lpi2c3>, <&pinctrl_ctrl_gpio_exp_int>; 374 pinctrl-1 = <&pinctrl_lpi2c3_gpio>, <&pinctrl_ctrl_gpio_exp_int>; 375 #address-cells = <1>; 376 #size-cells = <0>; 377 clock-frequency = <400000>; 378 scl-gpios = <&gpio2 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 379 sda-gpios = <&gpio2 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 380 381 status = "okay"; 382 383 som_gpio_expander_0: gpio@20 { 384 compatible = "nxp,pcal6408"; 385 reg = <0x20>; 386 #gpio-cells = <2>; 387 gpio-controller; 388 gpio-line-names = 389 "AQUILA_C38", /* 0 */ 390 "PCIE_2_RESET#", 391 "AQUILA_B77", 392 "USB_2_H_EN", 393 "BT_DISABLE#", 394 "WIFI_DISABLE#", 395 "CTRL_ETH_REF_CLK_STBY", 396 "CTRL_DP_BRIDGE_EN"; 397 }; 398 399 som_gpio_expander_1: gpio@21 { 400 compatible = "nxp,pcal6416"; 401 reg = <0x21>; 402 #interrupt-cells = <2>; 403 interrupt-controller; 404 interrupt-parent = <&gpio1>; 405 interrupts = <13 IRQ_TYPE_LEVEL_LOW>; 406 #gpio-cells = <2>; 407 gpio-controller; 408 gpio-line-names = 409 "AQUILA_C1", /* 0 */ 410 "AQUILA_C2", 411 "AQUILA_C3", 412 "AQUILA_C4", 413 "AQUILA_C36", 414 "AQUILA_B74", 415 "AQUILA_B75", 416 "USB_2_H_OC#", 417 "AQUILA_B81", 418 "PMIC_SD_1_VSEL", 419 "ETH_1_INT#", /* 10 */ 420 "CTRL_TPM_INT#", 421 "SPI_2_CS2_TPM", 422 "PCIE_WAKE_WIFI#", 423 "WIFI_WAKE_BT", 424 "WIFI_WAKEUP_HOST"; 425 }; 426 427 som_dsi2dp_bridge: bridge@2c { 428 compatible = "ti,sn65dsi86"; 429 reg = <0x2c>; 430 clocks = <&clk_dsi2dp_refclk_en>; 431 clock-names = "refclk"; 432 vcc-supply = <®_dp_1p2v>; 433 vcca-supply = <®_dp_1p2v>; 434 vccio-supply = <®_1p8v>; 435 vpll-supply = <®_1p8v>; 436 437 status = "disabled"; 438 439 ports { 440 #address-cells = <1>; 441 #size-cells = <0>; 442 443 port@0 { 444 reg = <0>; 445 446 dsi2dp_in: endpoint { 447 }; 448 }; 449 450 port@1 { 451 reg = <1>; 452 453 dsi2dp_out: endpoint { 454 data-lanes = <3 2 1 0>; 455 }; 456 }; 457 }; 458 }; 459 460 rtc_i2c: rtc@32 { 461 compatible = "epson,rx8130"; 462 reg = <0x32>; 463 }; 464 465 temperature-sensor@48 { 466 compatible = "ti,tmp1075"; 467 reg = <0x48>; 468 }; 469 470 som_eeprom: eeprom@50 { 471 compatible = "st,24c02", "atmel,24c02"; 472 reg = <0x50>; 473 pagesize = <16>; 474 }; 475}; 476 477/* Aquila I2C_4_CSI1 */ 478&lpi2c4 { 479 pinctrl-names = "default", "gpio"; 480 pinctrl-0 = <&pinctrl_lpi2c4>; 481 pinctrl-1 = <&pinctrl_lpi2c4_gpio>; 482 #address-cells = <1>; 483 #size-cells = <0>; 484 clock-frequency = <100000>; 485 scl-gpios = <&gpio2 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 486 sda-gpios = <&gpio2 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 487}; 488 489/* Aquila I2C_6 */ 490&lpi2c5 { 491 pinctrl-names = "default", "gpio"; 492 pinctrl-0 = <&pinctrl_lpi2c5>; 493 pinctrl-1 = <&pinctrl_lpi2c5_gpio>; 494 #address-cells = <1>; 495 #size-cells = <0>; 496 clock-frequency = <100000>; 497 scl-gpios = <&gpio2 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 498 sda-gpios = <&gpio2 22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 499}; 500 501/* Aquila I2C_3_DSI1/I2C_5_CSI2 */ 502&lpi2c8 { 503 pinctrl-names = "default", "gpio"; 504 pinctrl-0 = <&pinctrl_lpi2c8>; 505 pinctrl-1 = <&pinctrl_lpi2c8_gpio>; 506 #address-cells = <1>; 507 #size-cells = <0>; 508 clock-frequency = <100000>; 509 scl-gpios = <&gpio2 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 510 sda-gpios = <&gpio2 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 511}; 512 513/* Aquila SPI_2 */ 514&lpspi4 { 515 pinctrl-names = "default"; 516 pinctrl-0 = <&pinctrl_lpspi4>; 517 cs-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>, 518 <&som_gpio_expander_1 12 GPIO_ACTIVE_LOW>; 519 520 status = "okay"; 521 522 som_tpm: tpm@1 { 523 compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; 524 reg = <0x1>; 525 interrupt-parent = <&som_gpio_expander_1>; 526 interrupts = <11 IRQ_TYPE_EDGE_FALLING>; 527 /* 528 * Maximum TPM-supported speed is 18.5 MHz, limited to 12 MHz 529 * here as lpspi4's per-clock (2x the max speed) is 24 MHz. 530 */ 531 spi-max-frequency = <12000000>; 532 }; 533}; 534 535/* Aquila SPI_1 */ 536&lpspi6 { 537 pinctrl-names = "default"; 538 pinctrl-0 = <&pinctrl_lpspi6>; 539 cs-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; 540}; 541 542/* Aquila UART_3, used as the Linux Console */ 543&lpuart1 { 544 pinctrl-names = "default"; 545 pinctrl-0 = <&pinctrl_uart1>; 546}; 547 548/* Aquila UART_4 */ 549&lpuart2 { 550 pinctrl-names = "default"; 551 pinctrl-0 = <&pinctrl_uart2>; 552}; 553 554/* Aquila UART_1 */ 555&lpuart3 { 556 pinctrl-names = "default"; 557 pinctrl-0 = <&pinctrl_uart3>; 558 uart-has-rtscts; 559}; 560 561/* Aquila UART_2 */ 562&lpuart7 { 563 pinctrl-names = "default"; 564 pinctrl-0 = <&pinctrl_uart7>; 565 uart-has-rtscts; 566}; 567 568&mu7 { 569 status = "okay"; 570}; 571 572/* Aquila ETH_2_XGMII_MDIO, shared between all ethernet ports */ 573&netc_emdio { 574 pinctrl-names = "default"; 575 pinctrl-0 = <&pinctrl_emdio>; 576 577 status = "okay"; 578 579 ethphy1: ethernet-phy@1 { 580 reg = <1>; 581 interrupt-parent = <&som_gpio_expander_1>; 582 interrupts = <10 IRQ_TYPE_EDGE_FALLING>; 583 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 584 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 585 }; 586}; 587 588&netcmix_blk_ctrl { 589 status = "okay"; 590}; 591 592&netc_blk_ctrl { 593 status = "okay"; 594}; 595 596&netc_timer { 597 status = "okay"; 598}; 599 600/* Aquila PCIE_1 */ 601&pcie0 { 602 pinctrl-names = "default"; 603 pinctrl-0 = <&pinctrl_pcie0>; 604 reset-gpios = <&som_gpio_expander_0 0 GPIO_ACTIVE_LOW>; 605}; 606 607/* On-module Wi-Fi or Aquila PCIE_2 */ 608&pcie1 { 609 pinctrl-names = "default"; 610 pinctrl-0 = <&pinctrl_pcie1>; 611 reset-gpios = <&som_gpio_expander_0 1 GPIO_ACTIVE_LOW>; 612 613 status = "okay"; 614}; 615 616/* Aquila I2S_1 */ 617&sai2 { 618 pinctrl-names = "default"; 619 pinctrl-0 = <&pinctrl_sai2>; 620 assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>, 621 <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>, 622 <&scmi_clk IMX95_CLK_AUDIOPLL1>, 623 <&scmi_clk IMX95_CLK_AUDIOPLL2>, 624 <&scmi_clk IMX95_CLK_SAI2>; 625 assigned-clock-parents = <0>, <0>, <0>, <0>, 626 <&scmi_clk IMX95_CLK_AUDIOPLL1>; 627 assigned-clock-rates = <3932160000>, 628 <3612672000>, <393216000>, 629 <361267200>, <12288000>; 630 #sound-dai-cells = <0>; 631 fsl,sai-mclk-direction-output; 632}; 633 634&scmi_bbm { 635 linux,code = <KEY_POWER>; 636}; 637 638&thermal_zones { 639 /* PF09 Main PMIC */ 640 pf09-thermal { 641 polling-delay = <2000>; 642 polling-delay-passive = <250>; 643 thermal-sensors = <&scmi_sensor 2>; 644 645 trips { 646 trip0 { 647 hysteresis = <2000>; 648 temperature = <155000>; 649 type = "critical"; 650 }; 651 }; 652 }; 653 654 /* PF53 VDD_ARM PMIC */ 655 pf53-arm-thermal { 656 polling-delay = <2000>; 657 polling-delay-passive = <250>; 658 thermal-sensors = <&scmi_sensor 4>; 659 660 trips { 661 trip0 { 662 hysteresis = <2000>; 663 temperature = <155000>; 664 type = "critical"; 665 }; 666 }; 667 }; 668 669 /* PF53 VDD_SOC PMIC */ 670 pf53-soc-thermal { 671 polling-delay = <2000>; 672 polling-delay-passive = <250>; 673 thermal-sensors = <&scmi_sensor 3>; 674 675 trips { 676 trip0 { 677 hysteresis = <2000>; 678 temperature = <155000>; 679 type = "critical"; 680 }; 681 }; 682 }; 683}; 684 685/* Aquila PWM_1 */ 686&tpm3 { 687 pinctrl-names = "default"; 688 pinctrl-0 = <&pinctrl_pwm1>; 689}; 690 691/* Aquila PWM_2 */ 692&tpm6 { 693 pinctrl-names = "default"; 694 pinctrl-0 = <&pinctrl_pwm2>; 695}; 696 697/* Aquila PWM_3_DSI and PWM_4_DP */ 698&tpm5 { 699 pinctrl-names = "default"; 700 pinctrl-0 = <&pinctrl_pwm3_dsi>, <&pinctrl_pwm4_dp>; 701}; 702 703/* Aquila USB_2, optional Bluetooth USB */ 704&usb2 { 705 dr_mode = "host"; 706 vbus-supply = <®_usb2_vbus>; 707}; 708 709/* Aquila USB_1 */ 710&usb3 { 711 fsl,disable-port-power-control; 712}; 713 714&usb3_dwc3 { 715 dr_mode = "otg"; 716 adp-disable; 717 hnp-disable; 718 srp-disable; 719 usb-role-switch; 720}; 721 722&usb3_phy { 723 vbus-supply = <®_usb1_vbus>; 724}; 725 726/* On-module eMMC */ 727&usdhc1 { 728 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 729 pinctrl-0 = <&pinctrl_usdhc1>; 730 pinctrl-1 = <&pinctrl_usdhc1>; 731 pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 732 bus-width = <8>; 733 non-removable; 734 no-sdio; 735 no-sd; 736 737 status = "okay"; 738}; 739 740/* Aquila SD_1 */ 741&usdhc2 { 742 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 743 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_sd1_cd_gpio>; 744 pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_sd1_cd_gpio>; 745 pinctrl-2 = <&pinctrl_usdhc2_200mhz>,<&pinctrl_sd1_cd_gpio>; 746 pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_sd1_cd_gpio>; 747 cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; 748 vmmc-supply = <®_usdhc2_vmmc>; 749 vqmmc-supply = <®_usdhc2_vqmmc>; 750}; 751 752&wdog3 { 753 fsl,ext-reset-output; 754 755 status = "okay"; 756}; 757 758&scmi_iomuxc { 759 /* Aquila CTRL_WAKE1_MICO# */ 760 pinctrl_ctrl_wake1_mico: ctrlwake1micogrp { 761 fsl,pins = <IMX95_PAD_XSPI1_SS1_B__GPIO5_IO_BIT11 0x31e>; /* Aquila D6 */ 762 }; 763 764 pinctrl_ctrl_dp_clk_en: dpclkengrp { 765 fsl,pins = <IMX95_PAD_SAI1_TXFS__AONMIX_TOP_GPIO1_IO_BIT11 0x11e>; /* CTRL_DP_CLK_EN */ 766 }; 767 768 /* Aquila ETH_2_XGMII_MDIO */ 769 pinctrl_emdio: emdiogrp { 770 fsl,pins = <IMX95_PAD_ENET2_MDC__NETCMIX_TOP_NETC_MDC 0x57e>, /* Aquila B90 */ 771 <IMX95_PAD_ENET2_MDIO__NETCMIX_TOP_NETC_MDIO 0x97e>; /* Aquila B89 */ 772 }; 773 774 /* Aquila ETH_1 */ 775 pinctrl_enetc0: enetc0grp { 776 fsl,pins = <IMX95_PAD_ENET1_TX_CTL__NETCMIX_TOP_ETH0_RGMII_TX_CTL 0x57e>, /* ENET1_TX_CTL */ 777 <IMX95_PAD_ENET1_TXC__NETCMIX_TOP_ETH0_RGMII_TX_CLK 0x58e>, /* ENET1_TXC */ 778 <IMX95_PAD_ENET1_TD0__NETCMIX_TOP_ETH0_RGMII_TD0 0x50e>, /* ENET1_TDO */ 779 <IMX95_PAD_ENET1_TD1__NETCMIX_TOP_ETH0_RGMII_TD1 0x50e>, /* ENET1_TD1 */ 780 <IMX95_PAD_ENET1_TD2__NETCMIX_TOP_ETH0_RGMII_TD2 0x50e>, /* ENET1_TD2 */ 781 <IMX95_PAD_ENET1_TD3__NETCMIX_TOP_ETH0_RGMII_TD3 0x50e>, /* ENET1_TD3 */ 782 <IMX95_PAD_ENET1_RX_CTL__NETCMIX_TOP_ETH0_RGMII_RX_CTL 0x57e>, /* ENET1_RX_CTL */ 783 <IMX95_PAD_ENET1_RXC__NETCMIX_TOP_ETH0_RGMII_RX_CLK 0x58e>, /* ENET1_RXC */ 784 <IMX95_PAD_ENET1_RD0__NETCMIX_TOP_ETH0_RGMII_RD0 0x57e>, /* ENET1_RD0 */ 785 <IMX95_PAD_ENET1_RD1__NETCMIX_TOP_ETH0_RGMII_RD1 0x57e>, /* ENET1_RD1 */ 786 <IMX95_PAD_ENET1_RD2__NETCMIX_TOP_ETH0_RGMII_RD2 0x57e>, /* ENET1_RD2 */ 787 <IMX95_PAD_ENET1_RD3__NETCMIX_TOP_ETH0_RGMII_RD3 0x57e>; /* ENET1_RD3 */ 788 }; 789 790 /* Aquila CAN_1 */ 791 pinctrl_flexcan1: flexcan1grp { 792 fsl,pins = <IMX95_PAD_PDM_CLK__AONMIX_TOP_CAN1_TX 0x39e>, /* Aquila B48 */ 793 <IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_CAN1_RX 0x39e>; /* Aquila B49 */ 794 }; 795 796 /* Aquila CAN_2 */ 797 pinctrl_flexcan2: flexcan2grp { 798 fsl,pins = <IMX95_PAD_GPIO_IO25__CAN2_TX 0x39e>, /* Aquila B50 */ 799 <IMX95_PAD_GPIO_IO27__CAN2_RX 0x39e>; /* Aquila B51 */ 800 }; 801 802 /* Aquila CAN_3 */ 803 pinctrl_flexcan3: flexcan3grp { 804 fsl,pins = <IMX95_PAD_CCM_CLKO3__CAN3_TX 0x39e>, /* Aquila B53 */ 805 <IMX95_PAD_CCM_CLKO4__CAN3_RX 0x39e>; /* Aquila B54 */ 806 }; 807 808 /* Aquila CAN_4 */ 809 pinctrl_flexcan4: flexcan4grp { 810 fsl,pins = <IMX95_PAD_GPIO_IO04__CAN4_TX 0x39e>, /* Aquila B55 */ 811 <IMX95_PAD_GPIO_IO05__CAN4_RX 0x39e>; /* Aquila B56 */ 812 }; 813 814 /* Aquila QSPI_1 (4 bit) */ 815 pinctrl_flexspi1_4bit: flexspi14bitgrp { 816 fsl,pins = <IMX95_PAD_XSPI1_SCLK__FLEXSPI1_A_SCLK 0x3fe>, /* Aquila B65 */ 817 <IMX95_PAD_XSPI1_DATA0__FLEXSPI1_A_DATA_BIT0 0x3fe>, /* Aquila B68 */ 818 <IMX95_PAD_XSPI1_DATA1__FLEXSPI1_A_DATA_BIT1 0x3fe>, /* Aquila B67 */ 819 <IMX95_PAD_XSPI1_DATA2__FLEXSPI1_A_DATA_BIT2 0x3fe>, /* Aquila B61 */ 820 <IMX95_PAD_XSPI1_DATA3__FLEXSPI1_A_DATA_BIT3 0x3fe>, /* Aquila B60 */ 821 <IMX95_PAD_XSPI1_DQS__FLEXSPI1_A_DQS 0x3fe>; /* Aquila B63 */ 822 }; 823 824 /* Aquila QSPI_1 (8 bit) */ 825 pinctrl_flexspi1_8bit: flexspi18bitgrp { 826 fsl,pins = <IMX95_PAD_XSPI1_SCLK__FLEXSPI1_A_SCLK 0x3fe>, /* Aquila B65 */ 827 <IMX95_PAD_XSPI1_DATA0__FLEXSPI1_A_DATA_BIT0 0x3fe>, /* Aquila B68 */ 828 <IMX95_PAD_XSPI1_DATA1__FLEXSPI1_A_DATA_BIT1 0x3fe>, /* Aquila B67 */ 829 <IMX95_PAD_XSPI1_DATA2__FLEXSPI1_A_DATA_BIT2 0x3fe>, /* Aquila B61 */ 830 <IMX95_PAD_XSPI1_DATA3__FLEXSPI1_A_DATA_BIT3 0x3fe>, /* Aquila B60 */ 831 <IMX95_PAD_XSPI1_DATA4__FLEXSPI1_A_DATA_BIT4 0x3fe>, /* Aquila B70 */ 832 <IMX95_PAD_XSPI1_DATA5__FLEXSPI1_A_DATA_BIT5 0x3fe>, /* Aquila B71 */ 833 <IMX95_PAD_XSPI1_DATA6__FLEXSPI1_A_DATA_BIT6 0x3fe>, /* Aquila B72 */ 834 <IMX95_PAD_XSPI1_DATA7__FLEXSPI1_A_DATA_BIT7 0x3fe>, /* Aquila B73 */ 835 <IMX95_PAD_XSPI1_DQS__FLEXSPI1_A_DQS 0x3fe>; /* Aquila B63 */ 836 }; 837 838 /* Aquila GPIO_01 */ 839 pinctrl_gpio_1: gpio1grp { 840 fsl,pins = <IMX95_PAD_ENET2_RD0__GPIO4_IO_BIT24 0x31e>; /* Aquila D23 */ 841 }; 842 843 /* Aquila GPIO_02 */ 844 pinctrl_gpio_2: gpio2grp { 845 fsl,pins = <IMX95_PAD_ENET2_RD1__GPIO4_IO_BIT25 0x31e>; /* Aquila D24 */ 846 }; 847 848 /* Aquila GPIO_03 */ 849 pinctrl_gpio_3: gpio3grp { 850 fsl,pins = <IMX95_PAD_ENET2_RD3__GPIO4_IO_BIT27 0x31e>; /* Aquila D25 */ 851 }; 852 853 /* Aquila GPIO_04 */ 854 pinctrl_gpio_4: gpio4grp { 855 fsl,pins = <IMX95_PAD_ENET2_TD0__GPIO4_IO_BIT19 0x31e>; /* Aquila C20 */ 856 }; 857 858 /* Aquila GPIO_05 */ 859 pinctrl_gpio_5: gpio5grp { 860 fsl,pins = <IMX95_PAD_ENET2_TD1__GPIO4_IO_BIT18 0x31e>; /* Aquila C21 */ 861 }; 862 863 /* Aquila GPIO_06 */ 864 pinctrl_gpio_6: gpio6grp { 865 fsl,pins = <IMX95_PAD_ENET2_TD2__GPIO4_IO_BIT17 0x31e>; /* Aquila C22 */ 866 }; 867 868 /* Aquila GPIO_07 */ 869 pinctrl_gpio_7: gpio7grp { 870 fsl,pins = <IMX95_PAD_ENET2_RXC__GPIO4_IO_BIT23 0x31e>; /* Aquila C23 */ 871 }; 872 873 /* Aquila GPIO_08 */ 874 pinctrl_gpio_8: gpio8grp { 875 fsl,pins = <IMX95_PAD_PDM_BIT_STREAM1__AONMIX_TOP_GPIO1_IO_BIT10 0x31e>; /* Aquila C24 */ 876 }; 877 878 /* Aquila GPIO_09_CSI_1 */ 879 pinctrl_gpio_9_csi_1: gpio9csi1grp { 880 fsl,pins = <IMX95_PAD_SAI1_TXC__AONMIX_TOP_GPIO1_IO_BIT12 0x31e>; /* Aquila B17 */ 881 }; 882 883 /* Aquila GPIO_10_CSI_1 */ 884 pinctrl_gpio_10_csi_1: gpio10csi1grp { 885 fsl,pins = <IMX95_PAD_SAI1_RXD0__AONMIX_TOP_GPIO1_IO_BIT14 0x31e>; /* Aquila B18 */ 886 }; 887 888 /* Aquila GPIO_11_CSI_1 */ 889 pinctrl_gpio_11_csi_1: gpio11csi1grp { 890 fsl,pins = <IMX95_PAD_SD2_VSELECT__GPIO3_IO_BIT19 0x31e>; /* Aquila A11*/ 891 }; 892 893 /* Aquila GPIO_12_CSI_1 */ 894 pinctrl_gpio_12_csi_1: gpio12csi1grp { 895 fsl,pins = <IMX95_PAD_SD3_DATA0__GPIO3_IO_BIT22 0x31e>; /* Aquila B19 */ 896 }; 897 898 /* Aquila GPIO_17_DSI_1 */ 899 pinctrl_gpio_17_dsi_1: gpio17dsi1grp { 900 fsl,pins = <IMX95_PAD_GPIO_IO07__GPIO2_IO_BIT7 0x31e>; /* Aquila B42 */ 901 }; 902 903 /* Aquila GPIO_18_DSI_1 */ 904 pinctrl_gpio_18_dsi_1: gpio18dsi1grp { 905 fsl,pins = <IMX95_PAD_GPIO_IO09__GPIO2_IO_BIT9 0x31e>; /* Aquila B43 */ 906 }; 907 908 /* Aquila GPIO_19_DSI_1 */ 909 pinctrl_gpio_19_dsi_1: gpio19dsi1grp { 910 fsl,pins = <IMX95_PAD_GPIO_IO33__GPIO5_IO_BIT13 0x31e>; /* Aquila B44 */ 911 }; 912 913 /* Aquila GPIO_20_DSI_1 */ 914 pinctrl_gpio_20_dsi_1: gpio20dsi1grp { 915 fsl,pins = <IMX95_PAD_GPIO_IO34__GPIO5_IO_BIT14 0x31e>; /* Aquila B45 */ 916 }; 917 918 /* Aquila GPIO_21_DP */ 919 pinctrl_gpio_21_dp: gpio21dpgrp { 920 fsl,pins = <IMX95_PAD_SD3_CMD__GPIO3_IO_BIT21 0x31e>; /* Aquila B57 */ 921 }; 922 923 pinctrl_ctrl_gpio_exp_int: gpioexpintgrp { 924 fsl,pins = <IMX95_PAD_SAI1_TXD0__AONMIX_TOP_GPIO1_IO_BIT13 0x31e>; /* CTRL_GPIO_EXP_INT# */ 925 }; 926 927 /* Aquila I2C_2 */ 928 pinctrl_i3c2: i3c2cgrp { 929 fsl,pins = <IMX95_PAD_ENET1_MDC__I3C2_SCL 0x40001186>, /* Aquila C17 */ 930 <IMX95_PAD_ENET1_MDIO__I3C2_SDA 0x40001186>; /* Aquila C16 */ 931 }; 932 933 /* Aquila I2C_1 as GPIOs */ 934 pinctrl_lpi2c2_gpio: lpi2c2gpiogrp { 935 fsl,pins = <IMX95_PAD_I2C2_SCL__AONMIX_TOP_GPIO1_IO_BIT2 0x40001b9e>, /* Aquila D8 */ 936 <IMX95_PAD_I2C2_SDA__AONMIX_TOP_GPIO1_IO_BIT3 0x40001b9e>; /* Aquila D7 */ 937 }; 938 939 /* Aquila I2C_1 */ 940 pinctrl_lpi2c2: lpi2c2grp { 941 fsl,pins = <IMX95_PAD_I2C2_SCL__AONMIX_TOP_LPI2C2_SCL 0x40001b9e>, /* Aquila D8 */ 942 <IMX95_PAD_I2C2_SDA__AONMIX_TOP_LPI2C2_SDA 0x40001b9e>; /* Aquila D7 */ 943 }; 944 945 /* On-module I2C as GPIOs */ 946 pinctrl_lpi2c3_gpio: lpi2c3gpiogrp { 947 fsl,pins = <IMX95_PAD_GPIO_IO28__GPIO2_IO_BIT28 0x40001b9e>, /* I2C_SOM_SDA */ 948 <IMX95_PAD_GPIO_IO29__GPIO2_IO_BIT29 0x40001b9e>; /* I2C_SOM_SCL */ 949 }; 950 951 /* On-module I2C */ 952 pinctrl_lpi2c3: lpi2c3grp { 953 fsl,pins = <IMX95_PAD_GPIO_IO28__LPI2C3_SDA 0x40001b9e>, /* I2C_SOM_SDA */ 954 <IMX95_PAD_GPIO_IO29__LPI2C3_SCL 0x40001b9e>; /* I2C_SOM_SCL */ 955 }; 956 957 /* Aquila I2C_4_CSI1 as GPIO */ 958 pinctrl_lpi2c4_gpio: lpi2c4gpiogrp { 959 fsl,pins = <IMX95_PAD_GPIO_IO30__GPIO2_IO_BIT30 0x40001b9e>, /* Aquila A12 */ 960 <IMX95_PAD_GPIO_IO31__GPIO2_IO_BIT31 0x40001b9e>; /* Aquila A13 */ 961 }; 962 963 /* Aquila I2C_4_CSI1 */ 964 pinctrl_lpi2c4: lpi2c4grp { 965 fsl,pins = <IMX95_PAD_GPIO_IO30__LPI2C4_SDA 0x40001b9e>, /* Aquila A12 */ 966 <IMX95_PAD_GPIO_IO31__LPI2C4_SCL 0x40001b9e>; /* Aquila A13 */ 967 }; 968 969 /* Aquila I2C_6 as GPIO */ 970 pinctrl_lpi2c5_gpio: lpi2c5gpiogrp { 971 fsl,pins = <IMX95_PAD_GPIO_IO22__GPIO2_IO_BIT22 0x40001b9e>, /* Aquila C18 */ 972 <IMX95_PAD_GPIO_IO23__GPIO2_IO_BIT23 0x40001b9e>; /* Aquila C19 */ 973 }; 974 975 /* Aquila I2C_6 */ 976 pinctrl_lpi2c5: lpi2c5grp { 977 fsl,pins = <IMX95_PAD_GPIO_IO22__LPI2C5_SDA 0x40001b9e>, /* Aquila C18 */ 978 <IMX95_PAD_GPIO_IO23__LPI2C5_SCL 0x40001b9e>; /* Aquila C19 */ 979 }; 980 981 /* Aquila I2C_3_DSI1/I2C_5_CSI2 as GPIO */ 982 pinctrl_lpi2c8_gpio: lpi2c8gpiogrp { 983 fsl,pins = <IMX95_PAD_GPIO_IO12__GPIO2_IO_BIT12 0x40001b9e>, /* Aquila C5/B40 */ 984 <IMX95_PAD_GPIO_IO13__GPIO2_IO_BIT13 0x40001b9e>; /* Aquila C6/B41 */ 985 }; 986 987 /* Aquila I2C_3_DSI1/I2C_5_CSI2 */ 988 pinctrl_lpi2c8: lpi2c8grp { 989 fsl,pins = <IMX95_PAD_GPIO_IO12__LPI2C8_SDA 0x40001b9e>, /* Aquila C5/B40 */ 990 <IMX95_PAD_GPIO_IO13__LPI2C8_SCL 0x40001b9e>; /* Aquila C6/B41 */ 991 }; 992 993 /* Aquila SPI_2 */ 994 pinctrl_lpspi4: lpspi4grp { 995 fsl,pins = <IMX95_PAD_GPIO_IO18__GPIO2_IO_BIT18 0x3fe>, /* Aquila D16 */ 996 <IMX95_PAD_GPIO_IO19__LPSPI4_SIN 0x3fe>, /* Aquila D15 */ 997 <IMX95_PAD_GPIO_IO20__LPSPI4_SOUT 0x3fe>, /* Aquila D17 */ 998 <IMX95_PAD_GPIO_IO21__LPSPI4_SCK 0x3fe>; /* Aquila D14 */ 999 }; 1000 1001 /* Aquila SPI_1 */ 1002 pinctrl_lpspi6: lpspi6grp { 1003 fsl,pins = <IMX95_PAD_GPIO_IO00__GPIO2_IO_BIT0 0x3fe>, /* Aquila D9 */ 1004 <IMX95_PAD_GPIO_IO01__LPSPI6_SIN 0x3fe>, /* Aquila D10 */ 1005 <IMX95_PAD_GPIO_IO02__LPSPI6_SOUT 0x3fe>, /* Aquila D11 */ 1006 <IMX95_PAD_GPIO_IO03__LPSPI6_SCK 0x3fe>; /* Aquila D12 */ 1007 }; 1008 1009 /* Aquila PCIE_1 */ 1010 pinctrl_pcie0: pcie0grp { 1011 fsl,pins = <IMX95_PAD_GPIO_IO32__HSIOMIX_TOP_PCIE1_CLKREQ_B 0x40001b1e>; /* Aquila C37 */ 1012 }; 1013 1014 /* Aquila PCIE_2 */ 1015 pinctrl_pcie1: pcie1grp { 1016 fsl,pins = <IMX95_PAD_GPIO_IO35__HSIOMIX_TOP_PCIE2_CLKREQ_B 0x40001b1e>; /* Aquila C34 */ 1017 }; 1018 1019 /* Aquila QSPI_1_CS1# */ 1020 pinctrl_qspi_cs1: qspics1grp { 1021 fsl,pins = <IMX95_PAD_XSPI1_SS0_B__FLEXSPI1_A_SS0_B 0x3fe>; /* Aquila B66 */ 1022 }; 1023 1024 /* Aquila QSPI_1_CS2# as GPIO */ 1025 pinctrl_qspi_cs2_gpio: qspics2gpiogrp { 1026 fsl,pins = <IMX95_PAD_CCM_CLKO2__GPIO3_IO_BIT27 0x3fe>; /* Aquila B62 */ 1027 }; 1028 1029 /* Aquila I2S_1 */ 1030 pinctrl_sai2: sai2grp { 1031 fsl,pins = <IMX95_PAD_ENET2_TX_CTL__NETCMIX_TOP_SAI2_TX_SYNC 0x11e>, /* Aquila B21 */ 1032 <IMX95_PAD_ENET2_TXC__NETCMIX_TOP_SAI2_TX_BCLK 0x11e>, /* Aquila B20 */ 1033 <IMX95_PAD_ENET2_TD3__NETCMIX_TOP_SAI2_RX_DATA_BIT0 0x11e>, /* Aquila B23 */ 1034 <IMX95_PAD_ENET2_RX_CTL__NETCMIX_TOP_SAI2_TX_DATA_BIT0 0x11e>; /* Aquila B22 */ 1035 }; 1036 1037 pinctrl_sai2_mclk: sai2mclkgrp { 1038 fsl,pins = <IMX95_PAD_ENET2_RD2__NETCMIX_TOP_SAI2_MCLK 0x31e>; /* Aquila B24 */ 1039 }; 1040 1041 /* Aquila SD_1_CD# as GPIO */ 1042 pinctrl_sd1_cd_gpio: sd1cdgpiogrp { 1043 fsl,pins = <IMX95_PAD_SD2_CD_B__GPIO3_IO_BIT0 0x1100>; /* Aquila A1 */ 1044 }; 1045 1046 /* Aquila SD_1_PWR_EN */ 1047 pinctrl_sd1_pwr_en: sd1pwrengpiogrp { 1048 fsl,pins = <IMX95_PAD_SD2_RESET_B__GPIO3_IO_BIT7 0x11e>; /* Aquila A6 */ 1049 }; 1050 1051 /* Aquila PWM_1 */ 1052 pinctrl_pwm1: tpm3ch3grp { 1053 fsl,pins = <IMX95_PAD_GPIO_IO24__TPM3_CH3 0x11e>; /* Aquila C25 */ 1054 }; 1055 1056 /* Aquila PWM_3_DSI as GPIO */ 1057 pinctrl_pwm3_dsi_gpio: tpm5ch0gpiogrp { 1058 fsl,pins = <IMX95_PAD_GPIO_IO06__GPIO2_IO_BIT6 0x11e>; /* Aquila B46 */ 1059 }; 1060 1061 /* Aquila PWM_3_DSI */ 1062 pinctrl_pwm3_dsi: tpm5ch0grp { 1063 fsl,pins = <IMX95_PAD_GPIO_IO06__TPM5_CH0 0x11e>; /* Aquila B46 */ 1064 }; 1065 1066 /* Aquila PWM_4_DP */ 1067 pinctrl_pwm4_dp: tpm5ch3grp { 1068 fsl,pins = <IMX95_PAD_GPIO_IO26__TPM5_CH3 0x11e>; /* Aquila B58 */ 1069 }; 1070 1071 /* Aquila PWM_2 */ 1072 pinctrl_pwm2: tpm6ch0grp { 1073 fsl,pins = <IMX95_PAD_GPIO_IO08__TPM6_CH0 0x11e>; /* Aquila C26 */ 1074 }; 1075 1076 /* Aquila UART_3 */ 1077 pinctrl_uart1: uart1grp { 1078 fsl,pins = <IMX95_PAD_UART1_TXD__AONMIX_TOP_LPUART1_TX 0x31e>, /* Aquila D20 */ 1079 <IMX95_PAD_UART1_RXD__AONMIX_TOP_LPUART1_RX 0x31e>; /* Aquila D19 */ 1080 }; 1081 1082 /* Aquila UART_4 */ 1083 pinctrl_uart2: uart2grp { 1084 fsl,pins = <IMX95_PAD_UART2_TXD__AONMIX_TOP_LPUART2_TX 0x31e>, /* Aquila D22 */ 1085 <IMX95_PAD_UART2_RXD__AONMIX_TOP_LPUART2_RX 0x31e>; /* Aquila D21 */ 1086 }; 1087 1088 /* Aquila UART_1 */ 1089 pinctrl_uart3: uart3grp { 1090 fsl,pins = <IMX95_PAD_GPIO_IO14__LPUART3_TX 0x31e>, /* Aquila B37 */ 1091 <IMX95_PAD_GPIO_IO15__LPUART3_RX 0x31e>, /* Aquila B35 */ 1092 <IMX95_PAD_GPIO_IO16__LPUART3_CTS_B 0x31e>, /* Aquila B36 */ 1093 <IMX95_PAD_GPIO_IO17__LPUART3_RTS_B 0x31e>; /* Aquila B38 */ 1094 }; 1095 1096 /* Aquila UART_2 */ 1097 pinctrl_uart7: uart7grp { 1098 fsl,pins = <IMX95_PAD_GPIO_IO36__LPUART7_TX 0x31e>, /* Aquila B33 */ 1099 <IMX95_PAD_GPIO_IO37__LPUART7_RX 0x31e>, /* Aquila B31 */ 1100 <IMX95_PAD_GPIO_IO10__LPUART7_CTS_B 0x31e>, /* Aquila B32 */ 1101 <IMX95_PAD_GPIO_IO11__LPUART7_RTS_B 0x31e>; /* Aquila B34 */ 1102 }; 1103 1104 /* On-module eMMC */ 1105 pinctrl_usdhc1: usdhc1grp { 1106 fsl,pins = <IMX95_PAD_SD1_CLK__USDHC1_CLK 0x158e>, /* eMMC_CLK */ 1107 <IMX95_PAD_SD1_CMD__USDHC1_CMD 0x138e>, /* eMMC_CMD */ 1108 <IMX95_PAD_SD1_DATA0__USDHC1_DATA0 0x138e>, /* eMMC_DATA0 */ 1109 <IMX95_PAD_SD1_DATA1__USDHC1_DATA1 0x138e>, /* eMMC_DATA1 */ 1110 <IMX95_PAD_SD1_DATA2__USDHC1_DATA2 0x138e>, /* eMMC_DATA2 */ 1111 <IMX95_PAD_SD1_DATA3__USDHC1_DATA3 0x138e>, /* eMMC_DATA3 */ 1112 <IMX95_PAD_SD1_DATA4__USDHC1_DATA4 0x138e>, /* eMMC_DATA4 */ 1113 <IMX95_PAD_SD1_DATA5__USDHC1_DATA5 0x138e>, /* eMMC_DATA5 */ 1114 <IMX95_PAD_SD1_DATA6__USDHC1_DATA6 0x138e>, /* eMMC_DATA6 */ 1115 <IMX95_PAD_SD1_DATA7__USDHC1_DATA7 0x138e>, /* eMMC_DATA7 */ 1116 <IMX95_PAD_SD1_STROBE__USDHC1_STROBE 0x158e>; /* eMMC_STROBE */ 1117 }; 1118 1119 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 1120 fsl,pins = <IMX95_PAD_SD1_CLK__USDHC1_CLK 0x15fe>, /* eMMC_CLK */ 1121 <IMX95_PAD_SD1_CMD__USDHC1_CMD 0x13fe>, /* eMMC_CMD */ 1122 <IMX95_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe>, /* eMMC_DATA0 */ 1123 <IMX95_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe>, /* eMMC_DATA1 */ 1124 <IMX95_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe>, /* eMMC_DATA2 */ 1125 <IMX95_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe>, /* eMMC_DATA3 */ 1126 <IMX95_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe>, /* eMMC_DATA4 */ 1127 <IMX95_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe>, /* eMMC_DATA5 */ 1128 <IMX95_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe>, /* eMMC_DATA6 */ 1129 <IMX95_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe>, /* eMMC_DATA7 */ 1130 <IMX95_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe>; /* eMMC_STROBE */ 1131 }; 1132 1133 /* Aquila SD_1 */ 1134 pinctrl_usdhc2: usdhc2grp { 1135 fsl,pins = <IMX95_PAD_SD2_CLK__USDHC2_CLK 0x158e>, /* Aquila A5 */ 1136 <IMX95_PAD_SD2_CMD__USDHC2_CMD 0x138e>, /* Aquila A7 */ 1137 <IMX95_PAD_SD2_DATA0__USDHC2_DATA0 0x138e>, /* Aquila A3 */ 1138 <IMX95_PAD_SD2_DATA1__USDHC2_DATA1 0x138e>, /* Aquila A2 */ 1139 <IMX95_PAD_SD2_DATA2__USDHC2_DATA2 0x138e>, /* Aquila A10 */ 1140 <IMX95_PAD_SD2_DATA3__USDHC2_DATA3 0x138e>; /* Aquila A8 */ 1141 }; 1142 1143 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 1144 fsl,pins = <IMX95_PAD_SD2_CLK__USDHC2_CLK 0x15fe>, /* Aquila A5 */ 1145 <IMX95_PAD_SD2_CMD__USDHC2_CMD 0x13fe>, /* Aquila A7 */ 1146 <IMX95_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe>, /* Aquila A3 */ 1147 <IMX95_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe>, /* Aquila A2 */ 1148 <IMX95_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe>, /* Aquila A10 */ 1149 <IMX95_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe>; /* Aquila A8 */ 1150 }; 1151 1152 pinctrl_usdhc2_sleep: usdhc2-sleepgrp { 1153 fsl,pins = <IMX95_PAD_SD2_CLK__USDHC2_CLK 0x400>, /* Aquila A5 */ 1154 <IMX95_PAD_SD2_CMD__USDHC2_CMD 0x400>, /* Aquila A7 */ 1155 <IMX95_PAD_SD2_DATA0__USDHC2_DATA0 0x400>, /* Aquila A3 */ 1156 <IMX95_PAD_SD2_DATA1__USDHC2_DATA1 0x400>, /* Aquila A2 */ 1157 <IMX95_PAD_SD2_DATA2__USDHC2_DATA2 0x400>, /* Aquila A10 */ 1158 <IMX95_PAD_SD2_DATA3__USDHC2_DATA3 0x400>; /* Aquila A8 */ 1159 }; 1160}; 1161