1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright 2026 NXP 4 */ 5 6#include "imx93.dtsi" 7 8/ { 9 aliases { 10 mmc2 = &usdhc3; 11 }; 12 13 reg_usdhc3_vmmc: regulator-usdhc3 { 14 compatible = "regulator-fixed"; 15 pinctrl-names = "default"; 16 pinctrl-0 = <&pinctrl_reg_usdhc3_vmmc>; 17 regulator-name = "WLAN_EN"; 18 regulator-min-microvolt = <3300000>; 19 regulator-max-microvolt = <3300000>; 20 gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>; 21 enable-active-high; 22 }; 23 24 usdhc3_pwrseq: usdhc3_pwrseq { 25 compatible = "mmc-pwrseq-simple"; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&pinctrl_usdhc3_pwrseq>; 28 reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; 29 }; 30}; 31 32&usdhc3 { 33 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 34 pinctrl-0 = <&pinctrl_usdhc3>; 35 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 36 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 37 pinctrl-3 = <&pinctrl_usdhc3_sleep>; 38 mmc-pwrseq = <&usdhc3_pwrseq>; 39 vmmc-supply = <®_usdhc3_vmmc>; 40 bus-width = <4>; 41 keep-power-in-suspend; 42 non-removable; 43 wakeup-source; 44 status = "okay"; 45}; 46 47&iomuxc { 48 pinctrl_reg_usdhc3_vmmc: regusdhc3vmmcgrp { 49 fsl,pins = < 50 /* 51 * Enable open drain and internal pull-up to allow the IW610 JTAG 52 * connector to control the PDn status. 53 */ 54 MX93_PAD_GPIO_IO29__GPIO2_IO29 0xb9e 55 >; 56 }; 57 58 /* need to config the SION for data and cmd pad, refer to ERR052021 */ 59 pinctrl_usdhc3: usdhc3grp { 60 fsl,pins = < 61 MX93_PAD_SD3_CLK__USDHC3_CLK 0x1582 62 MX93_PAD_SD3_CMD__USDHC3_CMD 0x40001382 63 MX93_PAD_SD3_DATA0__USDHC3_DATA0 0x40001382 64 MX93_PAD_SD3_DATA1__USDHC3_DATA1 0x40001382 65 MX93_PAD_SD3_DATA2__USDHC3_DATA2 0x40001382 66 MX93_PAD_SD3_DATA3__USDHC3_DATA3 0x40001382 67 >; 68 }; 69 70 /* need to config the SION for data and cmd pad, refer to ERR052021 */ 71 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 72 fsl,pins = < 73 MX93_PAD_SD3_CLK__USDHC3_CLK 0x158e 74 MX93_PAD_SD3_CMD__USDHC3_CMD 0x4000138e 75 MX93_PAD_SD3_DATA0__USDHC3_DATA0 0x4000138e 76 MX93_PAD_SD3_DATA1__USDHC3_DATA1 0x4000138e 77 MX93_PAD_SD3_DATA2__USDHC3_DATA2 0x4000138e 78 MX93_PAD_SD3_DATA3__USDHC3_DATA3 0x4000138e 79 >; 80 }; 81 82 /* need to config the SION for data and cmd pad, refer to ERR052021 */ 83 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 84 fsl,pins = < 85 MX93_PAD_SD3_CLK__USDHC3_CLK 0x15fe 86 MX93_PAD_SD3_CMD__USDHC3_CMD 0x400013fe 87 MX93_PAD_SD3_DATA0__USDHC3_DATA0 0x400013fe 88 MX93_PAD_SD3_DATA1__USDHC3_DATA1 0x400013fe 89 MX93_PAD_SD3_DATA2__USDHC3_DATA2 0x400013fe 90 MX93_PAD_SD3_DATA3__USDHC3_DATA3 0x400013fe 91 >; 92 }; 93 94 pinctrl_usdhc3_sleep: usdhc3grpsleepgrp { 95 fsl,pins = < 96 MX93_PAD_SD3_CLK__GPIO3_IO20 0x31e 97 MX93_PAD_SD3_CMD__GPIO3_IO21 0x31e 98 MX93_PAD_SD3_DATA0__GPIO3_IO22 0x31e 99 MX93_PAD_SD3_DATA1__GPIO3_IO23 0x31e 100 MX93_PAD_SD3_DATA2__GPIO3_IO24 0x31e 101 MX93_PAD_SD3_DATA3__GPIO3_IO25 0x31e 102 >; 103 }; 104 105 pinctrl_usdhc3_pwrseq: usdhc3pwrseqgrp { 106 fsl,pins = < 107 MX93_PAD_PDM_BIT_STREAM1__GPIO1_IO10 0x39e 108 >; 109 }; 110}; 111