xref: /linux/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-enc-carrier-board.dts (revision ec71f661a572a770d7c861cd52a50cbbb0e1a8d1)
1*ab4d874cSMartyn Welch// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*ab4d874cSMartyn Welch/*
3*ab4d874cSMartyn Welch * Copyright 2020 Boundary Devices
4*ab4d874cSMartyn Welch * Copyright 2025 Collabora Ltd.
5*ab4d874cSMartyn Welch */
6*ab4d874cSMartyn Welch
7*ab4d874cSMartyn Welch/dts-v1/;
8*ab4d874cSMartyn Welch
9*ab4d874cSMartyn Welch#include "imx8mp-nitrogen-som.dtsi"
10*ab4d874cSMartyn Welch
11*ab4d874cSMartyn Welch/ {
12*ab4d874cSMartyn Welch	model = "Boundary Devices Nitrogen8M Plus ENC Carrier Board";
13*ab4d874cSMartyn Welch	compatible = "boundary,imx8mp-nitrogen-enc-carrier-board",
14*ab4d874cSMartyn Welch			"boundary,imx8mp-nitrogen-som", "fsl,imx8mp";
15*ab4d874cSMartyn Welch
16*ab4d874cSMartyn Welch	chosen {
17*ab4d874cSMartyn Welch		stdout-path = &uart2;
18*ab4d874cSMartyn Welch	};
19*ab4d874cSMartyn Welch
20*ab4d874cSMartyn Welch	connector {
21*ab4d874cSMartyn Welch		compatible = "usb-c-connector";
22*ab4d874cSMartyn Welch		data-role = "dual";
23*ab4d874cSMartyn Welch		label = "USB-C";
24*ab4d874cSMartyn Welch
25*ab4d874cSMartyn Welch		ports {
26*ab4d874cSMartyn Welch			#address-cells = <1>;
27*ab4d874cSMartyn Welch			#size-cells = <0>;
28*ab4d874cSMartyn Welch
29*ab4d874cSMartyn Welch			port@0 {
30*ab4d874cSMartyn Welch				reg = <0>;
31*ab4d874cSMartyn Welch
32*ab4d874cSMartyn Welch				hs_ep: endpoint {
33*ab4d874cSMartyn Welch					remote-endpoint = <&usb3_hs_ep>;
34*ab4d874cSMartyn Welch				};
35*ab4d874cSMartyn Welch			};
36*ab4d874cSMartyn Welch
37*ab4d874cSMartyn Welch			port@1 {
38*ab4d874cSMartyn Welch				reg = <1>;
39*ab4d874cSMartyn Welch
40*ab4d874cSMartyn Welch				ss_ep: endpoint {
41*ab4d874cSMartyn Welch					remote-endpoint = <&hd3ss3220_in_ep>;
42*ab4d874cSMartyn Welch				};
43*ab4d874cSMartyn Welch			};
44*ab4d874cSMartyn Welch		};
45*ab4d874cSMartyn Welch	};
46*ab4d874cSMartyn Welch
47*ab4d874cSMartyn Welch	hdmi-connector {
48*ab4d874cSMartyn Welch		compatible = "hdmi-connector";
49*ab4d874cSMartyn Welch		label = "hdmi";
50*ab4d874cSMartyn Welch		type = "a";
51*ab4d874cSMartyn Welch
52*ab4d874cSMartyn Welch		port {
53*ab4d874cSMartyn Welch			hdmi_connector_in: endpoint {
54*ab4d874cSMartyn Welch				remote-endpoint = <&hdmi_tx_out>;
55*ab4d874cSMartyn Welch			};
56*ab4d874cSMartyn Welch		};
57*ab4d874cSMartyn Welch	};
58*ab4d874cSMartyn Welch
59*ab4d874cSMartyn Welch	reg_usb_vbus: regulator {
60*ab4d874cSMartyn Welch		compatible = "regulator-fixed";
61*ab4d874cSMartyn Welch		enable-active-high;
62*ab4d874cSMartyn Welch		gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
63*ab4d874cSMartyn Welch		pinctrl-names = "default";
64*ab4d874cSMartyn Welch		pinctrl-0 = <&pinctrl_reg_usb_vbus>;
65*ab4d874cSMartyn Welch		regulator-name = "usb_vbus";
66*ab4d874cSMartyn Welch		regulator-min-microvolt = <5000000>;
67*ab4d874cSMartyn Welch		regulator-max-microvolt = <5000000>;
68*ab4d874cSMartyn Welch	};
69*ab4d874cSMartyn Welch};
70*ab4d874cSMartyn Welch
71*ab4d874cSMartyn Welch&ecspi2 {
72*ab4d874cSMartyn Welch	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
73*ab4d874cSMartyn Welch	pinctrl-0 = <&pinctrl_ecspi2>;
74*ab4d874cSMartyn Welch	pinctrl-names = "default";
75*ab4d874cSMartyn Welch	status = "okay";
76*ab4d874cSMartyn Welch};
77*ab4d874cSMartyn Welch
78*ab4d874cSMartyn Welch&gpio1 {
79*ab4d874cSMartyn Welch	usb-hub-reset-hog {
80*ab4d874cSMartyn Welch		gpio-hog;
81*ab4d874cSMartyn Welch		gpios = <6 GPIO_ACTIVE_LOW>;
82*ab4d874cSMartyn Welch		line-name = "usb-hub-reset";
83*ab4d874cSMartyn Welch		output-low;
84*ab4d874cSMartyn Welch	};
85*ab4d874cSMartyn Welch};
86*ab4d874cSMartyn Welch
87*ab4d874cSMartyn Welch&hdmi_pvi {
88*ab4d874cSMartyn Welch	status = "okay";
89*ab4d874cSMartyn Welch};
90*ab4d874cSMartyn Welch
91*ab4d874cSMartyn Welch&hdmi_tx {
92*ab4d874cSMartyn Welch	pinctrl-0 = <&pinctrl_hdmi>;
93*ab4d874cSMartyn Welch	pinctrl-names = "default";
94*ab4d874cSMartyn Welch	status = "okay";
95*ab4d874cSMartyn Welch
96*ab4d874cSMartyn Welch	ports {
97*ab4d874cSMartyn Welch		port@1 {
98*ab4d874cSMartyn Welch			hdmi_tx_out: endpoint {
99*ab4d874cSMartyn Welch				remote-endpoint = <&hdmi_connector_in>;
100*ab4d874cSMartyn Welch			};
101*ab4d874cSMartyn Welch		};
102*ab4d874cSMartyn Welch	};
103*ab4d874cSMartyn Welch};
104*ab4d874cSMartyn Welch
105*ab4d874cSMartyn Welch&hdmi_tx_phy {
106*ab4d874cSMartyn Welch	status = "okay";
107*ab4d874cSMartyn Welch};
108*ab4d874cSMartyn Welch
109*ab4d874cSMartyn Welch&i2c2 {
110*ab4d874cSMartyn Welch	i2c-mux@70 {
111*ab4d874cSMartyn Welch		compatible = "nxp,pca9546";
112*ab4d874cSMartyn Welch		reg = <0x70>;
113*ab4d874cSMartyn Welch		#address-cells = <1>;
114*ab4d874cSMartyn Welch		#size-cells = <0>;
115*ab4d874cSMartyn Welch		pinctrl-0 = <&pinctrl_i2c2_pca9546>;
116*ab4d874cSMartyn Welch		pinctrl-names = "default";
117*ab4d874cSMartyn Welch		reset-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
118*ab4d874cSMartyn Welch
119*ab4d874cSMartyn Welch		i2c@0 {
120*ab4d874cSMartyn Welch			reg = <0>;
121*ab4d874cSMartyn Welch			#address-cells = <1>;
122*ab4d874cSMartyn Welch			#size-cells = <0>;
123*ab4d874cSMartyn Welch			clock-frequency = <100000>;
124*ab4d874cSMartyn Welch		};
125*ab4d874cSMartyn Welch
126*ab4d874cSMartyn Welch		i2c@1 {
127*ab4d874cSMartyn Welch			reg = <1>;
128*ab4d874cSMartyn Welch			#address-cells = <1>;
129*ab4d874cSMartyn Welch			#size-cells = <0>;
130*ab4d874cSMartyn Welch			clock-frequency = <100000>;
131*ab4d874cSMartyn Welch		};
132*ab4d874cSMartyn Welch
133*ab4d874cSMartyn Welch		i2c@2 {
134*ab4d874cSMartyn Welch			reg = <2>;
135*ab4d874cSMartyn Welch			#address-cells = <1>;
136*ab4d874cSMartyn Welch			#size-cells = <0>;
137*ab4d874cSMartyn Welch			clock-frequency = <100000>;
138*ab4d874cSMartyn Welch		};
139*ab4d874cSMartyn Welch
140*ab4d874cSMartyn Welch		i2c@3 {
141*ab4d874cSMartyn Welch			reg = <3>;
142*ab4d874cSMartyn Welch			#address-cells = <1>;
143*ab4d874cSMartyn Welch			#size-cells = <0>;
144*ab4d874cSMartyn Welch			clock-frequency = <100000>;
145*ab4d874cSMartyn Welch
146*ab4d874cSMartyn Welch			rtc@52 {
147*ab4d874cSMartyn Welch				compatible = "microcrystal,rv3028";
148*ab4d874cSMartyn Welch				reg = <0x52>;
149*ab4d874cSMartyn Welch				interrupts-extended = <&gpio1 4 IRQ_TYPE_LEVEL_LOW>;
150*ab4d874cSMartyn Welch				pinctrl-names = "default";
151*ab4d874cSMartyn Welch				pinctrl-0 = <&pinctrl_rv3028>;
152*ab4d874cSMartyn Welch				wakeup-source;
153*ab4d874cSMartyn Welch			};
154*ab4d874cSMartyn Welch		};
155*ab4d874cSMartyn Welch	};
156*ab4d874cSMartyn Welch};
157*ab4d874cSMartyn Welch
158*ab4d874cSMartyn Welch&i2c4 {
159*ab4d874cSMartyn Welch	usb-mux@47 {
160*ab4d874cSMartyn Welch		compatible = "ti,hd3ss3220";
161*ab4d874cSMartyn Welch		reg = <0x47>;
162*ab4d874cSMartyn Welch		interrupts-extended = <&gpio1 8 IRQ_TYPE_LEVEL_LOW>;
163*ab4d874cSMartyn Welch		pinctrl-names = "default";
164*ab4d874cSMartyn Welch		pinctrl-0 = <&pinctrl_i2c4_hd3ss3220>;
165*ab4d874cSMartyn Welch
166*ab4d874cSMartyn Welch		ports {
167*ab4d874cSMartyn Welch			#address-cells = <1>;
168*ab4d874cSMartyn Welch			#size-cells = <0>;
169*ab4d874cSMartyn Welch
170*ab4d874cSMartyn Welch			port@0 {
171*ab4d874cSMartyn Welch				reg = <0>;
172*ab4d874cSMartyn Welch
173*ab4d874cSMartyn Welch				hd3ss3220_in_ep: endpoint {
174*ab4d874cSMartyn Welch					remote-endpoint = <&ss_ep>;
175*ab4d874cSMartyn Welch				};
176*ab4d874cSMartyn Welch			};
177*ab4d874cSMartyn Welch
178*ab4d874cSMartyn Welch			port@1 {
179*ab4d874cSMartyn Welch				reg = <1>;
180*ab4d874cSMartyn Welch
181*ab4d874cSMartyn Welch				hd3ss3220_out_ep: endpoint {
182*ab4d874cSMartyn Welch					remote-endpoint = <&usb3_role_switch>;
183*ab4d874cSMartyn Welch				};
184*ab4d874cSMartyn Welch			};
185*ab4d874cSMartyn Welch		};
186*ab4d874cSMartyn Welch	};
187*ab4d874cSMartyn Welch};
188*ab4d874cSMartyn Welch
189*ab4d874cSMartyn Welch&isp_0 {
190*ab4d874cSMartyn Welch	status = "okay";
191*ab4d874cSMartyn Welch};
192*ab4d874cSMartyn Welch
193*ab4d874cSMartyn Welch&lcdif3 {
194*ab4d874cSMartyn Welch	status = "okay";
195*ab4d874cSMartyn Welch};
196*ab4d874cSMartyn Welch
197*ab4d874cSMartyn Welch&pwm1 {
198*ab4d874cSMartyn Welch	pinctrl-names = "default";
199*ab4d874cSMartyn Welch	pinctrl-0 = <&pinctrl_pwm1>;
200*ab4d874cSMartyn Welch	status = "okay";
201*ab4d874cSMartyn Welch};
202*ab4d874cSMartyn Welch
203*ab4d874cSMartyn Welch&pwm2 {
204*ab4d874cSMartyn Welch	pinctrl-names = "default";
205*ab4d874cSMartyn Welch	pinctrl-0 = <&pinctrl_pwm2>;
206*ab4d874cSMartyn Welch	status = "okay";
207*ab4d874cSMartyn Welch};
208*ab4d874cSMartyn Welch
209*ab4d874cSMartyn Welch&pwm4 {
210*ab4d874cSMartyn Welch	pinctrl-names = "default";
211*ab4d874cSMartyn Welch	pinctrl-0 = <&pinctrl_pwm4>;
212*ab4d874cSMartyn Welch	status = "okay";
213*ab4d874cSMartyn Welch};
214*ab4d874cSMartyn Welch
215*ab4d874cSMartyn Welch&snvs_pwrkey {
216*ab4d874cSMartyn Welch	status = "okay";
217*ab4d874cSMartyn Welch};
218*ab4d874cSMartyn Welch
219*ab4d874cSMartyn Welch&uart2 {
220*ab4d874cSMartyn Welch	pinctrl-names = "default";
221*ab4d874cSMartyn Welch	pinctrl-0 = <&pinctrl_uart2>;
222*ab4d874cSMartyn Welch	status = "okay";
223*ab4d874cSMartyn Welch};
224*ab4d874cSMartyn Welch
225*ab4d874cSMartyn Welch&uart3 {
226*ab4d874cSMartyn Welch	assigned-clocks = <&clk IMX8MP_CLK_UART3>;
227*ab4d874cSMartyn Welch	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
228*ab4d874cSMartyn Welch	pinctrl-names = "default";
229*ab4d874cSMartyn Welch	pinctrl-0 = <&pinctrl_uart3>;
230*ab4d874cSMartyn Welch	status = "okay";
231*ab4d874cSMartyn Welch};
232*ab4d874cSMartyn Welch
233*ab4d874cSMartyn Welch&uart4 {
234*ab4d874cSMartyn Welch	assigned-clocks = <&clk IMX8MP_CLK_UART4>;
235*ab4d874cSMartyn Welch	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
236*ab4d874cSMartyn Welch	pinctrl-names = "default";
237*ab4d874cSMartyn Welch	pinctrl-0 = <&pinctrl_uart4>;
238*ab4d874cSMartyn Welch	status = "okay";
239*ab4d874cSMartyn Welch};
240*ab4d874cSMartyn Welch
241*ab4d874cSMartyn Welch&usb3_0 {
242*ab4d874cSMartyn Welch	fsl,over-current-active-low;
243*ab4d874cSMartyn Welch	status = "okay";
244*ab4d874cSMartyn Welch};
245*ab4d874cSMartyn Welch
246*ab4d874cSMartyn Welch&usb3_1 {
247*ab4d874cSMartyn Welch	status = "okay";
248*ab4d874cSMartyn Welch};
249*ab4d874cSMartyn Welch
250*ab4d874cSMartyn Welch&usb3_phy0 {
251*ab4d874cSMartyn Welch	vbus-supply = <&reg_usb_vbus>;
252*ab4d874cSMartyn Welch	status = "okay";
253*ab4d874cSMartyn Welch};
254*ab4d874cSMartyn Welch
255*ab4d874cSMartyn Welch&usb3_phy1 {
256*ab4d874cSMartyn Welch	vbus-supply = <&reg_usb_vbus>;
257*ab4d874cSMartyn Welch	status = "okay";
258*ab4d874cSMartyn Welch};
259*ab4d874cSMartyn Welch
260*ab4d874cSMartyn Welch&usb_dwc3_0 {
261*ab4d874cSMartyn Welch	dr_mode = "otg";
262*ab4d874cSMartyn Welch	pinctrl-names = "default";
263*ab4d874cSMartyn Welch	pinctrl-0 = <&pinctrl_usb3_0>;
264*ab4d874cSMartyn Welch	usb-role-switch;
265*ab4d874cSMartyn Welch	status = "okay";
266*ab4d874cSMartyn Welch
267*ab4d874cSMartyn Welch	ports {
268*ab4d874cSMartyn Welch		#address-cells = <1>;
269*ab4d874cSMartyn Welch		#size-cells = <0>;
270*ab4d874cSMartyn Welch
271*ab4d874cSMartyn Welch		port@0 {
272*ab4d874cSMartyn Welch			reg = <0>;
273*ab4d874cSMartyn Welch
274*ab4d874cSMartyn Welch			usb3_hs_ep: endpoint {
275*ab4d874cSMartyn Welch				remote-endpoint = <&hs_ep>;
276*ab4d874cSMartyn Welch			};
277*ab4d874cSMartyn Welch		};
278*ab4d874cSMartyn Welch
279*ab4d874cSMartyn Welch		port@1 {
280*ab4d874cSMartyn Welch			reg = <1>;
281*ab4d874cSMartyn Welch
282*ab4d874cSMartyn Welch			usb3_role_switch: endpoint {
283*ab4d874cSMartyn Welch				remote-endpoint = <&hd3ss3220_out_ep>;
284*ab4d874cSMartyn Welch			};
285*ab4d874cSMartyn Welch		};
286*ab4d874cSMartyn Welch	};
287*ab4d874cSMartyn Welch};
288*ab4d874cSMartyn Welch
289*ab4d874cSMartyn Welch&usb_dwc3_1 {
290*ab4d874cSMartyn Welch	dr_mode = "host";
291*ab4d874cSMartyn Welch	status = "okay";
292*ab4d874cSMartyn Welch};
293*ab4d874cSMartyn Welch
294*ab4d874cSMartyn Welch&usdhc1 {
295*ab4d874cSMartyn Welch	bus-width = <4>;
296*ab4d874cSMartyn Welch	cd-gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
297*ab4d874cSMartyn Welch	pinctrl-names = "default", "state_100mhz", "state_200mhz";
298*ab4d874cSMartyn Welch	pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
299*ab4d874cSMartyn Welch	pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
300*ab4d874cSMartyn Welch	pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
301*ab4d874cSMartyn Welch	status = "okay";
302*ab4d874cSMartyn Welch};
303*ab4d874cSMartyn Welch
304*ab4d874cSMartyn Welch&iomuxc {
305*ab4d874cSMartyn Welch	pinctrl-names = "default";
306*ab4d874cSMartyn Welch	pinctrl-0 = <&pinctrl_hog>;
307*ab4d874cSMartyn Welch
308*ab4d874cSMartyn Welch	pinctrl_ecspi2: ecspi2grp {
309*ab4d874cSMartyn Welch		fsl,pins = <
310*ab4d874cSMartyn Welch			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO		0x82
311*ab4d874cSMartyn Welch			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI		0x82
312*ab4d874cSMartyn Welch			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK		0x82
313*ab4d874cSMartyn Welch			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13		0x143
314*ab4d874cSMartyn Welch		>;
315*ab4d874cSMartyn Welch	};
316*ab4d874cSMartyn Welch
317*ab4d874cSMartyn Welch	pinctrl_hdmi: hdmigrp {
318*ab4d874cSMartyn Welch		fsl,pins = <
319*ab4d874cSMartyn Welch			MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC		0x40000019
320*ab4d874cSMartyn Welch			MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL	0x400001c3
321*ab4d874cSMartyn Welch			MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA	0x400001c3
322*ab4d874cSMartyn Welch			MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD		0x40000019
323*ab4d874cSMartyn Welch		>;
324*ab4d874cSMartyn Welch	};
325*ab4d874cSMartyn Welch
326*ab4d874cSMartyn Welch	pinctrl_hog: hoggrp {
327*ab4d874cSMartyn Welch		fsl,pins = <
328*ab4d874cSMartyn Welch			MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06		0x100
329*ab4d874cSMartyn Welch			MX8MP_IOMUXC_NAND_DATA01__GPIO3_IO07		0x119
330*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20		0x16
331*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19		0x1c4
332*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06		0x41
333*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07		0x41
334*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_DATA6__GPIO2_IO08		0x41
335*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10		0x41
336*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05		0x41
337*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04		0x41
338*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SPDIF_TX__GPIO5_IO03		0x41
339*ab4d874cSMartyn Welch		>;
340*ab4d874cSMartyn Welch	};
341*ab4d874cSMartyn Welch
342*ab4d874cSMartyn Welch	pinctrl_i2c2_pca9546: i2c2-pca9546grp {
343*ab4d874cSMartyn Welch		fsl,pins = <
344*ab4d874cSMartyn Welch			MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05		0x100
345*ab4d874cSMartyn Welch		>;
346*ab4d874cSMartyn Welch	};
347*ab4d874cSMartyn Welch
348*ab4d874cSMartyn Welch	pinctrl_i2c4_hd3ss3220: i2c4-hd3ss3220grp {
349*ab4d874cSMartyn Welch		fsl,pins = <
350*ab4d874cSMartyn Welch			MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08		0x16
351*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02		0x03
352*ab4d874cSMartyn Welch		>;
353*ab4d874cSMartyn Welch	};
354*ab4d874cSMartyn Welch
355*ab4d874cSMartyn Welch	pinctrl_pwm1: pwm1grp {
356*ab4d874cSMartyn Welch		fsl,pins = <
357*ab4d874cSMartyn Welch			MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT		0x100
358*ab4d874cSMartyn Welch		>;
359*ab4d874cSMartyn Welch	};
360*ab4d874cSMartyn Welch
361*ab4d874cSMartyn Welch	pinctrl_pwm2: pwm2grp {
362*ab4d874cSMartyn Welch		fsl,pins = <
363*ab4d874cSMartyn Welch			MX8MP_IOMUXC_GPIO1_IO09__PWM2_OUT		0xd6
364*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SAI5_RXD0__PWM2_OUT		0xd6
365*ab4d874cSMartyn Welch		>;
366*ab4d874cSMartyn Welch	};
367*ab4d874cSMartyn Welch
368*ab4d874cSMartyn Welch	pinctrl_pwm4: pwm4grp {
369*ab4d874cSMartyn Welch		fsl,pins = <
370*ab4d874cSMartyn Welch		MX8MP_IOMUXC_SAI5_RXFS__PWM4_OUT			0x116
371*ab4d874cSMartyn Welch		>;
372*ab4d874cSMartyn Welch	};
373*ab4d874cSMartyn Welch
374*ab4d874cSMartyn Welch	pinctrl_reg_usb_vbus: reg-usb-vbusgrp {
375*ab4d874cSMartyn Welch		fsl,pins = <
376*ab4d874cSMartyn Welch			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12		0x100
377*ab4d874cSMartyn Welch		>;
378*ab4d874cSMartyn Welch	};
379*ab4d874cSMartyn Welch
380*ab4d874cSMartyn Welch	pinctrl_rv3028: rv3028grp {
381*ab4d874cSMartyn Welch		fsl,pins = <
382*ab4d874cSMartyn Welch			MX8MP_IOMUXC_GPIO1_IO04__GPIO1_IO04		0x1c0
383*ab4d874cSMartyn Welch		>;
384*ab4d874cSMartyn Welch	};
385*ab4d874cSMartyn Welch
386*ab4d874cSMartyn Welch	pinctrl_uart2: uart2grp {
387*ab4d874cSMartyn Welch		fsl,pins = <
388*ab4d874cSMartyn Welch			MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX		0x140
389*ab4d874cSMartyn Welch			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX		0x140
390*ab4d874cSMartyn Welch		>;
391*ab4d874cSMartyn Welch	};
392*ab4d874cSMartyn Welch
393*ab4d874cSMartyn Welch	pinctrl_uart3: uart3grp {
394*ab4d874cSMartyn Welch		fsl,pins = <
395*ab4d874cSMartyn Welch			MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX		0x140
396*ab4d874cSMartyn Welch			MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX		0x140
397*ab4d874cSMartyn Welch		>;
398*ab4d874cSMartyn Welch	};
399*ab4d874cSMartyn Welch
400*ab4d874cSMartyn Welch	pinctrl_uart4: uart4grp {
401*ab4d874cSMartyn Welch		fsl,pins = <
402*ab4d874cSMartyn Welch			MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX		0x140
403*ab4d874cSMartyn Welch			MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX		0x140
404*ab4d874cSMartyn Welch		>;
405*ab4d874cSMartyn Welch	};
406*ab4d874cSMartyn Welch
407*ab4d874cSMartyn Welch	pinctrl_usb3_0: usb3-0grp {
408*ab4d874cSMartyn Welch		fsl,pins = <
409*ab4d874cSMartyn Welch			MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC		0x1c0
410*ab4d874cSMartyn Welch		>;
411*ab4d874cSMartyn Welch	};
412*ab4d874cSMartyn Welch
413*ab4d874cSMartyn Welch	pinctrl_usdhc1: usdhc1grp {
414*ab4d874cSMartyn Welch		fsl,pins = <
415*ab4d874cSMartyn Welch			MX8MP_IOMUXC_GPIO1_IO03__USDHC1_VSELECT		0x116
416*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK		0x190
417*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD		0x1d0
418*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0		0x1d0
419*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1		0x1d0
420*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2		0x1d0
421*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3		0x1d0
422*ab4d874cSMartyn Welch		>;
423*ab4d874cSMartyn Welch	};
424*ab4d874cSMartyn Welch
425*ab4d874cSMartyn Welch	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
426*ab4d874cSMartyn Welch		fsl,pins = <
427*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK		0x194
428*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD		0x1d4
429*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0		0x1d4
430*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1		0x1d4
431*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2		0x1d4
432*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3		0x1d4
433*ab4d874cSMartyn Welch		>;
434*ab4d874cSMartyn Welch	};
435*ab4d874cSMartyn Welch
436*ab4d874cSMartyn Welch	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
437*ab4d874cSMartyn Welch		fsl,pins = <
438*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK		0x196
439*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD		0x1d6
440*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0		0x1d6
441*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1		0x1d6
442*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2		0x1d6
443*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3		0x1d6
444*ab4d874cSMartyn Welch		>;
445*ab4d874cSMartyn Welch	};
446*ab4d874cSMartyn Welch
447*ab4d874cSMartyn Welch	pinctrl_usdhc1_gpio: usdhc1-gpiogrp {
448*ab4d874cSMartyn Welch		fsl,pins = <
449*ab4d874cSMartyn Welch			MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11		0x1c4
450*ab4d874cSMartyn Welch		>;
451*ab4d874cSMartyn Welch	};
452*ab4d874cSMartyn Welch};
453