1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright 2020 Boundary Devices 4 * Copyright 2025 Collabora Ltd. 5 */ 6 7/dts-v1/; 8 9#include "imx8mp-nitrogen-som.dtsi" 10 11/ { 12 model = "Boundary Devices Nitrogen8M Plus ENC Carrier Board"; 13 compatible = "boundary,imx8mp-nitrogen-enc-carrier-board", 14 "boundary,imx8mp-nitrogen-som", "fsl,imx8mp"; 15 16 chosen { 17 stdout-path = &uart2; 18 }; 19 20 connector { 21 compatible = "usb-c-connector"; 22 data-role = "dual"; 23 label = "USB-C"; 24 25 ports { 26 #address-cells = <1>; 27 #size-cells = <0>; 28 29 port@0 { 30 reg = <0>; 31 32 hs_ep: endpoint { 33 remote-endpoint = <&usb3_hs_ep>; 34 }; 35 }; 36 37 port@1 { 38 reg = <1>; 39 40 ss_ep: endpoint { 41 remote-endpoint = <&hd3ss3220_in_ep>; 42 }; 43 }; 44 }; 45 }; 46 47 hdmi-connector { 48 compatible = "hdmi-connector"; 49 label = "hdmi"; 50 type = "a"; 51 52 port { 53 hdmi_connector_in: endpoint { 54 remote-endpoint = <&hdmi_tx_out>; 55 }; 56 }; 57 }; 58 59 reg_usb_vbus: regulator { 60 compatible = "regulator-fixed"; 61 enable-active-high; 62 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; 63 pinctrl-names = "default"; 64 pinctrl-0 = <&pinctrl_reg_usb_vbus>; 65 regulator-name = "usb_vbus"; 66 regulator-min-microvolt = <5000000>; 67 regulator-max-microvolt = <5000000>; 68 }; 69}; 70 71&ecspi2 { 72 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 73 pinctrl-0 = <&pinctrl_ecspi2>; 74 pinctrl-names = "default"; 75 status = "okay"; 76}; 77 78&gpio1 { 79 usb-hub-reset-hog { 80 gpio-hog; 81 gpios = <6 GPIO_ACTIVE_LOW>; 82 line-name = "usb-hub-reset"; 83 output-low; 84 }; 85}; 86 87&hdmi_pvi { 88 status = "okay"; 89}; 90 91&hdmi_tx { 92 pinctrl-0 = <&pinctrl_hdmi>; 93 pinctrl-names = "default"; 94 status = "okay"; 95 96 ports { 97 port@1 { 98 hdmi_tx_out: endpoint { 99 remote-endpoint = <&hdmi_connector_in>; 100 }; 101 }; 102 }; 103}; 104 105&hdmi_tx_phy { 106 status = "okay"; 107}; 108 109&i2c2 { 110 i2c-mux@70 { 111 compatible = "nxp,pca9546"; 112 reg = <0x70>; 113 #address-cells = <1>; 114 #size-cells = <0>; 115 pinctrl-0 = <&pinctrl_i2c2_pca9546>; 116 pinctrl-names = "default"; 117 reset-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; 118 119 i2c@0 { 120 reg = <0>; 121 #address-cells = <1>; 122 #size-cells = <0>; 123 clock-frequency = <100000>; 124 }; 125 126 i2c@1 { 127 reg = <1>; 128 #address-cells = <1>; 129 #size-cells = <0>; 130 clock-frequency = <100000>; 131 }; 132 133 i2c@2 { 134 reg = <2>; 135 #address-cells = <1>; 136 #size-cells = <0>; 137 clock-frequency = <100000>; 138 }; 139 140 i2c@3 { 141 reg = <3>; 142 #address-cells = <1>; 143 #size-cells = <0>; 144 clock-frequency = <100000>; 145 146 rtc@52 { 147 compatible = "microcrystal,rv3028"; 148 reg = <0x52>; 149 interrupts-extended = <&gpio1 4 IRQ_TYPE_LEVEL_LOW>; 150 pinctrl-names = "default"; 151 pinctrl-0 = <&pinctrl_rv3028>; 152 wakeup-source; 153 }; 154 }; 155 }; 156}; 157 158&i2c4 { 159 usb-mux@47 { 160 compatible = "ti,hd3ss3220"; 161 reg = <0x47>; 162 interrupts-extended = <&gpio1 8 IRQ_TYPE_LEVEL_LOW>; 163 pinctrl-names = "default"; 164 pinctrl-0 = <&pinctrl_i2c4_hd3ss3220>; 165 166 ports { 167 #address-cells = <1>; 168 #size-cells = <0>; 169 170 port@0 { 171 reg = <0>; 172 173 hd3ss3220_in_ep: endpoint { 174 remote-endpoint = <&ss_ep>; 175 }; 176 }; 177 178 port@1 { 179 reg = <1>; 180 181 hd3ss3220_out_ep: endpoint { 182 remote-endpoint = <&usb3_role_switch>; 183 }; 184 }; 185 }; 186 }; 187}; 188 189&isp_0 { 190 status = "okay"; 191}; 192 193&lcdif3 { 194 status = "okay"; 195}; 196 197&pwm1 { 198 pinctrl-names = "default"; 199 pinctrl-0 = <&pinctrl_pwm1>; 200 status = "okay"; 201}; 202 203&pwm2 { 204 pinctrl-names = "default"; 205 pinctrl-0 = <&pinctrl_pwm2>; 206 status = "okay"; 207}; 208 209&pwm4 { 210 pinctrl-names = "default"; 211 pinctrl-0 = <&pinctrl_pwm4>; 212 status = "okay"; 213}; 214 215&snvs_pwrkey { 216 status = "okay"; 217}; 218 219&uart2 { 220 pinctrl-names = "default"; 221 pinctrl-0 = <&pinctrl_uart2>; 222 status = "okay"; 223}; 224 225&uart3 { 226 assigned-clocks = <&clk IMX8MP_CLK_UART3>; 227 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; 228 pinctrl-names = "default"; 229 pinctrl-0 = <&pinctrl_uart3>; 230 status = "okay"; 231}; 232 233&uart4 { 234 assigned-clocks = <&clk IMX8MP_CLK_UART4>; 235 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; 236 pinctrl-names = "default"; 237 pinctrl-0 = <&pinctrl_uart4>; 238 status = "okay"; 239}; 240 241&usb3_0 { 242 fsl,over-current-active-low; 243 status = "okay"; 244}; 245 246&usb3_1 { 247 status = "okay"; 248}; 249 250&usb3_phy0 { 251 vbus-supply = <®_usb_vbus>; 252 status = "okay"; 253}; 254 255&usb3_phy1 { 256 vbus-supply = <®_usb_vbus>; 257 status = "okay"; 258}; 259 260&usb_dwc3_0 { 261 dr_mode = "otg"; 262 pinctrl-names = "default"; 263 pinctrl-0 = <&pinctrl_usb3_0>; 264 usb-role-switch; 265 status = "okay"; 266 267 ports { 268 #address-cells = <1>; 269 #size-cells = <0>; 270 271 port@0 { 272 reg = <0>; 273 274 usb3_hs_ep: endpoint { 275 remote-endpoint = <&hs_ep>; 276 }; 277 }; 278 279 port@1 { 280 reg = <1>; 281 282 usb3_role_switch: endpoint { 283 remote-endpoint = <&hd3ss3220_out_ep>; 284 }; 285 }; 286 }; 287}; 288 289&usb_dwc3_1 { 290 dr_mode = "host"; 291 status = "okay"; 292}; 293 294&usdhc1 { 295 bus-width = <4>; 296 cd-gpios = <&gpio2 11 GPIO_ACTIVE_LOW>; 297 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 298 pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>; 299 pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>; 300 pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>; 301 status = "okay"; 302}; 303 304&iomuxc { 305 pinctrl-names = "default"; 306 pinctrl-0 = <&pinctrl_hog>; 307 308 pinctrl_ecspi2: ecspi2grp { 309 fsl,pins = < 310 MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82 311 MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82 312 MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82 313 MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x143 314 >; 315 }; 316 317 pinctrl_hdmi: hdmigrp { 318 fsl,pins = < 319 MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x40000019 320 MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x400001c3 321 MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x400001c3 322 MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x40000019 323 >; 324 }; 325 326 pinctrl_hog: hoggrp { 327 fsl,pins = < 328 MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x100 329 MX8MP_IOMUXC_NAND_DATA01__GPIO3_IO07 0x119 330 MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20 0x16 331 MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x1c4 332 MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x41 333 MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07 0x41 334 MX8MP_IOMUXC_SD1_DATA6__GPIO2_IO08 0x41 335 MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10 0x41 336 MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05 0x41 337 MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04 0x41 338 MX8MP_IOMUXC_SPDIF_TX__GPIO5_IO03 0x41 339 >; 340 }; 341 342 pinctrl_i2c2_pca9546: i2c2-pca9546grp { 343 fsl,pins = < 344 MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x100 345 >; 346 }; 347 348 pinctrl_i2c4_hd3ss3220: i2c4-hd3ss3220grp { 349 fsl,pins = < 350 MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08 0x16 351 MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x03 352 >; 353 }; 354 355 pinctrl_pwm1: pwm1grp { 356 fsl,pins = < 357 MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT 0x100 358 >; 359 }; 360 361 pinctrl_pwm2: pwm2grp { 362 fsl,pins = < 363 MX8MP_IOMUXC_GPIO1_IO09__PWM2_OUT 0xd6 364 MX8MP_IOMUXC_SAI5_RXD0__PWM2_OUT 0xd6 365 >; 366 }; 367 368 pinctrl_pwm4: pwm4grp { 369 fsl,pins = < 370 MX8MP_IOMUXC_SAI5_RXFS__PWM4_OUT 0x116 371 >; 372 }; 373 374 pinctrl_reg_usb_vbus: reg-usb-vbusgrp { 375 fsl,pins = < 376 MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x100 377 >; 378 }; 379 380 pinctrl_rv3028: rv3028grp { 381 fsl,pins = < 382 MX8MP_IOMUXC_GPIO1_IO04__GPIO1_IO04 0x1c0 383 >; 384 }; 385 386 pinctrl_uart2: uart2grp { 387 fsl,pins = < 388 MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140 389 MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140 390 >; 391 }; 392 393 pinctrl_uart3: uart3grp { 394 fsl,pins = < 395 MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140 396 MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140 397 >; 398 }; 399 400 pinctrl_uart4: uart4grp { 401 fsl,pins = < 402 MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x140 403 MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x140 404 >; 405 }; 406 407 pinctrl_usb3_0: usb3-0grp { 408 fsl,pins = < 409 MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x1c0 410 >; 411 }; 412 413 pinctrl_usdhc1: usdhc1grp { 414 fsl,pins = < 415 MX8MP_IOMUXC_GPIO1_IO03__USDHC1_VSELECT 0x116 416 MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190 417 MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0 418 MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0 419 MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0 420 MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0 421 MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0 422 >; 423 }; 424 425 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { 426 fsl,pins = < 427 MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x194 428 MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d4 429 MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d4 430 MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d4 431 MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d4 432 MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d4 433 >; 434 }; 435 436 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 437 fsl,pins = < 438 MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x196 439 MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d6 440 MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d6 441 MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d6 442 MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d6 443 MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d6 444 >; 445 }; 446 447 pinctrl_usdhc1_gpio: usdhc1-gpiogrp { 448 fsl,pins = < 449 MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11 0x1c4 450 >; 451 }; 452}; 453