xref: /linux/arch/arm64/boot/dts/exynos/exynos8855-pinctrl.dtsi (revision cbe8aadf1551f3f4a853f24b3b96d9f0eea49c53)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Samsung's S5E8855 SoC pin-mux and pin-config device tree source
4 *
5 * Copyright (c) 2023 Samsung Electronics Co., Ltd.
6 *		http://www.samsung.com
7 *
8 * Samsung's S5E8855 SoC pin-mux and pin-config options are listed as device
9 * tree nodes are listed in this file.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <dt-bindings/interrupt-controller/arm-gic.h>
17#include "exynos-pinctrl.h"
18
19&pinctrl_alive {
20	gpa0: gpa0-gpio-bank {
21		gpio-controller;
22		#gpio-cells = <2>;
23
24		interrupt-controller;
25		#interrupt-cells = <2>;
26		interrupt-parent = <&gic>;
27		interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
28			     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
29			     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
30			     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
31			     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
32			     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
33			     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
34			     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
35	};
36
37	gpa1: gpa1-gpio-bank {
38		gpio-controller;
39		#gpio-cells = <2>;
40
41		interrupt-controller;
42		#interrupt-cells = <2>;
43		interrupt-parent = <&gic>;
44		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
45			     <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
46			     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
47			     <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
48			     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
49	};
50
51	gpq0: gpq0-gpio-bank {
52		gpio-controller;
53		#gpio-cells = <2>;
54	};
55
56	gpq1: gpq1-gpio-bank {
57		gpio-controller;
58		#gpio-cells = <2>;
59	};
60
61	gpc0: gpc0-gpio-bank {
62		gpio-controller;
63		#gpio-cells = <2>;
64
65		interrupt-controller;
66		#interrupt-cells = <2>;
67		interrupt-parent = <&gic>;
68		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
69	};
70
71	gpc1: gpc1-gpio-bank {
72		gpio-controller;
73		#gpio-cells = <2>;
74
75		interrupt-controller;
76		#interrupt-cells = <2>;
77		interrupt-parent = <&gic>;
78		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
79	};
80
81	gpc2: gpc2-gpio-bank {
82		gpio-controller;
83		#gpio-cells = <2>;
84
85		interrupt-controller;
86		#interrupt-cells = <2>;
87		interrupt-parent = <&gic>;
88		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
89	};
90
91	gpc3: gpc3-gpio-bank {
92		gpio-controller;
93		#gpio-cells = <2>;
94
95		interrupt-controller;
96		#interrupt-cells = <2>;
97		interrupt-parent = <&gic>;
98		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
99	};
100
101	gpc4: gpc4-gpio-bank {
102		gpio-controller;
103		#gpio-cells = <2>;
104
105		interrupt-controller;
106		#interrupt-cells = <2>;
107		interrupt-parent = <&gic>;
108		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
109	};
110
111	gpc5: gpc5-gpio-bank {
112		gpio-controller;
113		#gpio-cells = <2>;
114
115		interrupt-controller;
116		#interrupt-cells = <2>;
117		interrupt-parent = <&gic>;
118		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
119	};
120
121	gpc6: gpc6-gpio-bank {
122		gpio-controller;
123		#gpio-cells = <2>;
124
125		interrupt-controller;
126		#interrupt-cells = <2>;
127		interrupt-parent = <&gic>;
128		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
129	};
130
131	gpc7: gpc7-gpio-bank {
132		gpio-controller;
133		#gpio-cells = <2>;
134
135		interrupt-controller;
136		#interrupt-cells = <2>;
137		interrupt-parent = <&gic>;
138		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
139	};
140
141	gpc8: gpc8-gpio-bank {
142		gpio-controller;
143		#gpio-cells = <2>;
144
145		interrupt-controller;
146		#interrupt-cells = <2>;
147		interrupt-parent = <&gic>;
148		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
149	};
150
151	gpc9: gpc9-gpio-bank {
152		gpio-controller;
153		#gpio-cells = <2>;
154
155		interrupt-controller;
156		#interrupt-cells = <2>;
157		interrupt-parent = <&gic>;
158		interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
159	};
160
161	gpc10: gpc10-gpio-bank {
162		gpio-controller;
163		#gpio-cells = <2>;
164
165		interrupt-controller;
166		#interrupt-cells = <2>;
167		interrupt-parent = <&gic>;
168		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
169	};
170
171	gpc11: gpc11-gpio-bank {
172		gpio-controller;
173		#gpio-cells = <2>;
174
175		interrupt-controller;
176		#interrupt-cells = <2>;
177		interrupt-parent = <&gic>;
178		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
179	};
180
181	gpc12: gpc12-gpio-bank {
182		gpio-controller;
183		#gpio-cells = <2>;
184
185		interrupt-controller;
186		#interrupt-cells = <2>;
187		interrupt-parent = <&gic>;
188		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
189	};
190
191	gpc13: gpc13-gpio-bank {
192		gpio-controller;
193		#gpio-cells = <2>;
194
195		interrupt-controller;
196		#interrupt-cells = <2>;
197		interrupt-parent = <&gic>;
198		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
199	};
200
201	gpc14: gpc14-gpio-bank {
202		gpio-controller;
203		#gpio-cells = <2>;
204
205		interrupt-controller;
206		#interrupt-cells = <2>;
207		interrupt-parent = <&gic>;
208		interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
209	};
210
211	gpj0: gpj0-gpio-bank {
212		gpio-controller;
213		#gpio-cells = <2>;
214
215		interrupt-controller;
216		#interrupt-cells = <2>;
217		interrupt-parent = <&gic>;
218		interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
219	};
220
221	gpj1: gpj1-gpio-bank {
222		gpio-controller;
223		#gpio-cells = <2>;
224
225		interrupt-controller;
226		#interrupt-cells = <2>;
227		interrupt-parent = <&gic>;
228		interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
229	};
230
231	gpj2: gpj2-gpio-bank {
232		gpio-controller;
233		#gpio-cells = <2>;
234
235		interrupt-controller;
236		#interrupt-cells = <2>;
237		interrupt-parent = <&gic>;
238		interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
239	};
240};
241
242&pinctrl_cmgp {
243	gpm0: gpm0-gpio-bank {
244		gpio-controller;
245		#gpio-cells = <2>;
246
247		interrupt-controller;
248		#interrupt-cells = <2>;
249		interrupt-parent = <&gic>;
250		interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
251	};
252
253	gpm1: gpm1-gpio-bank {
254		gpio-controller;
255		#gpio-cells = <2>;
256
257		interrupt-controller;
258		#interrupt-cells = <2>;
259		interrupt-parent = <&gic>;
260		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
261	};
262
263	gpm2: gpm2-gpio-bank {
264		gpio-controller;
265		#gpio-cells = <2>;
266
267		interrupt-controller;
268		#interrupt-cells = <2>;
269		interrupt-parent = <&gic>;
270		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
271	};
272
273	gpm3: gpm3-gpio-bank {
274		gpio-controller;
275		#gpio-cells = <2>;
276
277		interrupt-controller;
278		#interrupt-cells = <2>;
279		interrupt-parent = <&gic>;
280		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
281	};
282
283	gpm4: gpm4-gpio-bank {
284		gpio-controller;
285		#gpio-cells = <2>;
286
287		interrupt-controller;
288		#interrupt-cells = <2>;
289		interrupt-parent = <&gic>;
290		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
291	};
292
293	gpm5: gpm5-gpio-bank {
294		gpio-controller;
295		#gpio-cells = <2>;
296
297		interrupt-controller;
298		#interrupt-cells = <2>;
299		interrupt-parent = <&gic>;
300		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
301	};
302
303	gpm6: gpm6-gpio-bank {
304		gpio-controller;
305		#gpio-cells = <2>;
306
307		interrupt-controller;
308		#interrupt-cells = <2>;
309		interrupt-parent = <&gic>;
310		interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
311	};
312
313	gpm7: gpm7-gpio-bank {
314		gpio-controller;
315		#gpio-cells = <2>;
316
317		interrupt-controller;
318		#interrupt-cells = <2>;
319		interrupt-parent = <&gic>;
320		interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
321	};
322
323	gpm8: gpm8-gpio-bank {
324		gpio-controller;
325		#gpio-cells = <2>;
326
327		interrupt-controller;
328		#interrupt-cells = <2>;
329		interrupt-parent = <&gic>;
330		interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
331	};
332
333	gpm9: gpm9-gpio-bank {
334		gpio-controller;
335		#gpio-cells = <2>;
336
337		interrupt-controller;
338		#interrupt-cells = <2>;
339		interrupt-parent = <&gic>;
340		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
341	};
342
343	gpm10: gpm10-gpio-bank {
344		gpio-controller;
345		#gpio-cells = <2>;
346
347		interrupt-controller;
348		#interrupt-cells = <2>;
349		interrupt-parent = <&gic>;
350		interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
351	};
352
353	gpm11: gpm11-gpio-bank {
354		gpio-controller;
355		#gpio-cells = <2>;
356
357		interrupt-controller;
358		#interrupt-cells = <2>;
359		interrupt-parent = <&gic>;
360		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
361	};
362
363	gpm12: gpm12-gpio-bank {
364		gpio-controller;
365		#gpio-cells = <2>;
366
367		interrupt-controller;
368		#interrupt-cells = <2>;
369		interrupt-parent = <&gic>;
370		interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
371	};
372
373	gpm13: gpm13-gpio-bank {
374		gpio-controller;
375		#gpio-cells = <2>;
376
377		interrupt-controller;
378		#interrupt-cells = <2>;
379		interrupt-parent = <&gic>;
380		interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
381	};
382
383	gpm14: gpm14-gpio-bank {
384		gpio-controller;
385		#gpio-cells = <2>;
386
387		interrupt-controller;
388		#interrupt-cells = <2>;
389		interrupt-parent = <&gic>;
390		interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
391	};
392
393	gpm15: gpm15-gpio-bank {
394		gpio-controller;
395		#gpio-cells = <2>;
396
397		interrupt-controller;
398		#interrupt-cells = <2>;
399		interrupt-parent = <&gic>;
400		interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
401	};
402
403	gpm16: gpm16-gpio-bank {
404		gpio-controller;
405		#gpio-cells = <2>;
406
407		interrupt-controller;
408		#interrupt-cells = <2>;
409		interrupt-parent = <&gic>;
410		interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
411	};
412
413	gpm17: gpm17-gpio-bank {
414		gpio-controller;
415		#gpio-cells = <2>;
416
417		interrupt-controller;
418		#interrupt-cells = <2>;
419		interrupt-parent = <&gic>;
420		interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
421	};
422
423	gpm18: gpm18-gpio-bank {
424		gpio-controller;
425		#gpio-cells = <2>;
426
427		interrupt-controller;
428		#interrupt-cells = <2>;
429		interrupt-parent = <&gic>;
430		interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
431	};
432
433	gpm19: gpm19-gpio-bank {
434		gpio-controller;
435		#gpio-cells = <2>;
436
437		interrupt-controller;
438		#interrupt-cells = <2>;
439		interrupt-parent = <&gic>;
440		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
441	};
442
443	gpm20: gpm20-gpio-bank {
444		gpio-controller;
445		#gpio-cells = <2>;
446
447		interrupt-controller;
448		#interrupt-cells = <2>;
449		interrupt-parent = <&gic>;
450		interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
451	};
452
453	gpm21: gpm21-gpio-bank {
454		gpio-controller;
455		#gpio-cells = <2>;
456
457		interrupt-controller;
458		#interrupt-cells = <2>;
459		interrupt-parent = <&gic>;
460		interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
461	};
462};
463
464&pinctrl_hsi_ufs {
465	gpf3: gpf3-gpio-bank {
466		gpio-controller;
467		#gpio-cells = <2>;
468
469		interrupt-controller;
470		#interrupt-cells = <2>;
471	};
472};
473
474&pinctrl_peric {
475	gpp0: gpp0-gpio-bank {
476		gpio-controller;
477		#gpio-cells = <2>;
478
479		interrupt-controller;
480		#interrupt-cells = <2>;
481	};
482
483	gpp1: gpp1-gpio-bank {
484		gpio-controller;
485		#gpio-cells = <2>;
486
487		interrupt-controller;
488		#interrupt-cells = <2>;
489	};
490
491	gpp2: gpp2-gpio-bank {
492		gpio-controller;
493		#gpio-cells = <2>;
494
495		interrupt-controller;
496		#interrupt-cells = <2>;
497	};
498
499	gpg0: gpg0-gpio-bank {
500		gpio-controller;
501		#gpio-cells = <2>;
502
503		interrupt-controller;
504		#interrupt-cells = <2>;
505	};
506
507	gpg1: gpg1-gpio-bank {
508		gpio-controller;
509		#gpio-cells = <2>;
510
511		interrupt-controller;
512		#interrupt-cells = <2>;
513	};
514
515	gpb0: gpb0-gpio-bank {
516		gpio-controller;
517		#gpio-cells = <2>;
518
519		interrupt-controller;
520		#interrupt-cells = <2>;
521	};
522
523	gpb1: gpb1-gpio-bank {
524		gpio-controller;
525		#gpio-cells = <2>;
526
527		interrupt-controller;
528		#interrupt-cells = <2>;
529	};
530};
531
532&pinctrl_pericmmc {
533	gpf2: gpf2-gpio-bank {
534		gpio-controller;
535		#gpio-cells = <2>;
536
537		interrupt-controller;
538		#interrupt-cells = <2>;
539	};
540};
541
542&pinctrl_usi {
543	gpp3: gpp3-gpio-bank {
544		gpio-controller;
545		#gpio-cells = <2>;
546
547		interrupt-controller;
548		#interrupt-cells = <2>;
549	};
550
551	gpp4: gpp4-gpio-bank {
552		gpio-controller;
553		#gpio-cells = <2>;
554
555		interrupt-controller;
556		#interrupt-cells = <2>;
557	};
558
559	gpg2: gpg2-gpio-bank {
560		gpio-controller;
561		#gpio-cells = <2>;
562
563		interrupt-controller;
564		#interrupt-cells = <2>;
565	};
566
567	gpg3: gpg3-gpio-bank {
568		gpio-controller;
569		#gpio-cells = <2>;
570
571		interrupt-controller;
572		#interrupt-cells = <2>;
573	};
574};
575