1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright 2025 Cix Technology Group Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include "sky1.dtsi" 10#include "sky1-pinfunc.h" 11 12/ { 13 model = "Xunlong,OrangePi 6 Plus"; 14 compatible = "xunlong,orangepi-6-plus", "cix,sky1"; 15 16 aliases { 17 serial2 = &uart2; 18 }; 19 20 chosen { 21 stdout-path = &uart2; 22 }; 23 24 reserved-memory { 25 #address-cells = <2>; 26 #size-cells = <2>; 27 ranges; 28 29 linux,cma { 30 compatible = "shared-dma-pool"; 31 reusable; 32 size = <0x0 0x28000000>; 33 linux,cma-default; 34 }; 35 }; 36 37}; 38 39&iomuxc { 40 pinctrl-names = "default"; 41 pinctrl-0 = <&pinctrl_hog>; 42 43 pinctrl_hog: hog-cfg { 44 pins { 45 pinmux = <CIX_PAD_GPIO144_FUNC_GPIO144>, 46 <CIX_PAD_GPIO145_FUNC_GPIO145>, 47 <CIX_PAD_GPIO146_FUNC_GPIO146>, 48 <CIX_PAD_GPIO147_FUNC_GPIO147>; 49 bias-pull-down; 50 drive-strength = <8>; 51 }; 52 }; 53}; 54 55&iomuxc_s5 { 56 pinctrl-names = "default"; 57 pinctrl-0 = <&pinctrl_hog_s5>; 58 59 pinctrl_hog_s5: hog-s5-cfg { 60 pins { 61 pinmux = <CIX_PAD_GPIO014_FUNC_GPIO014>; 62 bias-pull-up; 63 drive-strength = <8>; 64 65 }; 66 }; 67}; 68 69&pcie_x8_rc { 70 status = "okay"; 71}; 72 73&pcie_x2_rc { 74 status = "okay"; 75}; 76 77&pcie_x1_1_rc { 78 status = "okay"; 79}; 80 81&uart2 { 82 status = "okay"; 83}; 84