xref: /linux/arch/arm64/boot/dts/arm/corstone1000-fvp.dtsi (revision 0fc8f6200d2313278fbf4539bbab74677c685531)
1// SPDX-License-Identifier: GPL-2.0 OR MIT
2/*
3 * Copyright (c) 2022, Arm Limited. All rights reserved.
4 * Copyright (c) 2022, Linaro Limited. All rights reserved.
5 *
6 */
7
8/ {
9	smsc: ethernet@4010000 {
10		compatible = "smsc,lan91c111";
11		reg = <0x40100000 0x10000>;
12		phy-mode = "mii";
13		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
14		reg-io-width = <2>;
15	};
16
17	vmmc_v3_3d: regulator-vmmc {
18		compatible = "regulator-fixed";
19		regulator-name = "vmmc_supply";
20		regulator-min-microvolt = <3300000>;
21		regulator-max-microvolt = <3300000>;
22		regulator-always-on;
23	};
24
25	sdmmc0: mmc@40300000 {
26		compatible = "arm,pl18x", "arm,primecell";
27		reg = <0x40300000 0x1000>;
28		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
29		max-frequency = <12000000>;
30		vmmc-supply = <&vmmc_v3_3d>;
31		clocks = <&smbclk>, <&refclk100mhz>;
32		clock-names = "smclk", "apb_pclk";
33	};
34
35	sdmmc1: mmc@50000000 {
36		compatible = "arm,pl18x", "arm,primecell";
37		reg = <0x50000000 0x10000>;
38		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
39		max-frequency = <12000000>;
40		vmmc-supply = <&vmmc_v3_3d>;
41		clocks = <&smbclk>, <&refclk100mhz>;
42		clock-names = "smclk", "apb_pclk";
43	};
44};
45