1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2/* 3 * PMGR Power domains for the Apple T8015 "A11" SoC 4 * 5 * Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com> 6 */ 7 8&pmgr { 9 ps_cpu0: power-controller@80000 { 10 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 11 reg = <0x80000 4>; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 14 label = "cpu0"; 15 apple,always-on; /* Core device */ 16 }; 17 18 ps_cpu1: power-controller@80008 { 19 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 20 reg = <0x80008 4>; 21 #power-domain-cells = <0>; 22 #reset-cells = <0>; 23 label = "cpu1"; 24 apple,always-on; /* Core device */ 25 }; 26 27 ps_cpu2: power-controller@80010 { 28 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 29 reg = <0x80010 4>; 30 #power-domain-cells = <0>; 31 #reset-cells = <0>; 32 label = "cpu2"; 33 apple,always-on; /* Core device */ 34 }; 35 36 ps_cpu3: power-controller@80018 { 37 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 38 reg = <0x80018 4>; 39 #power-domain-cells = <0>; 40 #reset-cells = <0>; 41 label = "cpu3"; 42 apple,always-on; /* Core device */ 43 }; 44 45 ps_cpu4: power-controller@80020 { 46 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 47 reg = <0x80020 4>; 48 #power-domain-cells = <0>; 49 #reset-cells = <0>; 50 label = "cpu4"; 51 apple,always-on; /* Core device */ 52 }; 53 54 ps_cpu5: power-controller@80028 { 55 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 56 reg = <0x80028 4>; 57 #power-domain-cells = <0>; 58 #reset-cells = <0>; 59 label = "cpu5"; 60 apple,always-on; /* Core device */ 61 }; 62 63 ps_cpm: power-controller@80040 { 64 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 65 reg = <0x80040 4>; 66 #power-domain-cells = <0>; 67 #reset-cells = <0>; 68 label = "cpm"; 69 apple,always-on; /* Core device */ 70 }; 71 72 ps_sio_busif: power-controller@80158 { 73 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 74 reg = <0x80158 4>; 75 #power-domain-cells = <0>; 76 #reset-cells = <0>; 77 label = "sio_busif"; 78 }; 79 80 ps_sio_p: power-controller@80160 { 81 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 82 reg = <0x80160 4>; 83 #power-domain-cells = <0>; 84 #reset-cells = <0>; 85 label = "sio_p"; 86 power-domains = <&ps_sio_busif>; 87 }; 88 89 ps_sbr: power-controller@80100 { 90 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 91 reg = <0x80100 4>; 92 #power-domain-cells = <0>; 93 #reset-cells = <0>; 94 label = "sbr"; 95 apple,always-on; /* Apple fabric, critical block */ 96 }; 97 98 ps_aic: power-controller@80108 { 99 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 100 reg = <0x80108 4>; 101 #power-domain-cells = <0>; 102 #reset-cells = <0>; 103 label = "aic"; 104 apple,always-on; /* Core device */ 105 }; 106 107 ps_dwi: power-controller@80110 { 108 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 109 reg = <0x80110 4>; 110 #power-domain-cells = <0>; 111 #reset-cells = <0>; 112 label = "dwi"; 113 }; 114 115 ps_gpio: power-controller@80118 { 116 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 117 reg = <0x80118 4>; 118 #power-domain-cells = <0>; 119 #reset-cells = <0>; 120 label = "gpio"; 121 }; 122 123 ps_pms: power-controller@80120 { 124 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 125 reg = <0x80120 4>; 126 #power-domain-cells = <0>; 127 #reset-cells = <0>; 128 label = "pms"; 129 apple,always-on; /* Core device */ 130 }; 131 132 ps_pcie_ref: power-controller@80148 { 133 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 134 reg = <0x80148 4>; 135 #power-domain-cells = <0>; 136 #reset-cells = <0>; 137 label = "pcie_ref"; 138 }; 139 140 ps_mca0: power-controller@80170 { 141 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 142 reg = <0x80170 4>; 143 #power-domain-cells = <0>; 144 #reset-cells = <0>; 145 label = "mca0"; 146 power-domains = <&ps_sio_p>; 147 }; 148 149 ps_mca1: power-controller@80178 { 150 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 151 reg = <0x80178 4>; 152 #power-domain-cells = <0>; 153 #reset-cells = <0>; 154 label = "mca1"; 155 power-domains = <&ps_sio_p>; 156 }; 157 158 ps_mca2: power-controller@80180 { 159 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 160 reg = <0x80180 4>; 161 #power-domain-cells = <0>; 162 #reset-cells = <0>; 163 label = "mca2"; 164 power-domains = <&ps_sio_p>; 165 }; 166 167 ps_mca3: power-controller@80188 { 168 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 169 reg = <0x80188 4>; 170 #power-domain-cells = <0>; 171 #reset-cells = <0>; 172 label = "mca3"; 173 power-domains = <&ps_sio_p>; 174 }; 175 176 ps_mca4: power-controller@80190 { 177 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 178 reg = <0x80190 4>; 179 #power-domain-cells = <0>; 180 #reset-cells = <0>; 181 label = "mca4"; 182 power-domains = <&ps_sio_p>; 183 }; 184 185 ps_pwm0: power-controller@801a0 { 186 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 187 reg = <0x801a0 4>; 188 #power-domain-cells = <0>; 189 #reset-cells = <0>; 190 label = "pwm0"; 191 power-domains = <&ps_sio_p>; 192 }; 193 194 ps_i2c0: power-controller@801a8 { 195 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 196 reg = <0x801a8 4>; 197 #power-domain-cells = <0>; 198 #reset-cells = <0>; 199 label = "i2c0"; 200 power-domains = <&ps_sio_p>; 201 }; 202 203 ps_i2c1: power-controller@801b0 { 204 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 205 reg = <0x801b0 4>; 206 #power-domain-cells = <0>; 207 #reset-cells = <0>; 208 label = "i2c1"; 209 power-domains = <&ps_sio_p>; 210 }; 211 212 ps_i2c2: power-controller@801b8 { 213 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 214 reg = <0x801b8 4>; 215 #power-domain-cells = <0>; 216 #reset-cells = <0>; 217 label = "i2c2"; 218 power-domains = <&ps_sio_p>; 219 }; 220 221 ps_i2c3: power-controller@801c0 { 222 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 223 reg = <0x801c0 4>; 224 #power-domain-cells = <0>; 225 #reset-cells = <0>; 226 label = "i2c3"; 227 power-domains = <&ps_sio_p>; 228 }; 229 230 ps_spi0: power-controller@801c8 { 231 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 232 reg = <0x801c8 4>; 233 #power-domain-cells = <0>; 234 #reset-cells = <0>; 235 label = "spi0"; 236 power-domains = <&ps_sio_p>; 237 }; 238 239 ps_spi1: power-controller@801d0 { 240 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 241 reg = <0x801d0 4>; 242 #power-domain-cells = <0>; 243 #reset-cells = <0>; 244 label = "spi1"; 245 power-domains = <&ps_sio_p>; 246 }; 247 248 ps_spi2: power-controller@801d8 { 249 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 250 reg = <0x801d8 4>; 251 #power-domain-cells = <0>; 252 #reset-cells = <0>; 253 label = "spi2"; 254 power-domains = <&ps_sio_p>; 255 }; 256 257 ps_spi3: power-controller@801e0 { 258 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 259 reg = <0x801e0 4>; 260 #power-domain-cells = <0>; 261 #reset-cells = <0>; 262 label = "spi3"; 263 power-domains = <&ps_sio_p>; 264 }; 265 266 ps_uart0: power-controller@801e8 { 267 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 268 reg = <0x801e8 4>; 269 #power-domain-cells = <0>; 270 #reset-cells = <0>; 271 label = "uart0"; 272 power-domains = <&ps_sio_p>; 273 }; 274 275 ps_uart1: power-controller@801f0 { 276 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 277 reg = <0x801f0 4>; 278 #power-domain-cells = <0>; 279 #reset-cells = <0>; 280 label = "uart1"; 281 power-domains = <&ps_sio_p>; 282 }; 283 284 ps_uart2: power-controller@801f8 { 285 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 286 reg = <0x801f8 4>; 287 #power-domain-cells = <0>; 288 #reset-cells = <0>; 289 label = "uart2"; 290 power-domains = <&ps_sio_p>; 291 }; 292 293 ps_sio: power-controller@80168 { 294 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 295 reg = <0x80168 4>; 296 #power-domain-cells = <0>; 297 #reset-cells = <0>; 298 label = "sio"; 299 power-domains = <&ps_sio_p>; 300 apple,always-on; /* Core device */ 301 }; 302 303 ps_hsicphy: power-controller@80128 { 304 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 305 reg = <0x80128 4>; 306 #power-domain-cells = <0>; 307 #reset-cells = <0>; 308 label = "hsicphy"; 309 power-domains = <&ps_usb2host1>; 310 }; 311 312 ps_ispsens0: power-controller@80130 { 313 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 314 reg = <0x80130 4>; 315 #power-domain-cells = <0>; 316 #reset-cells = <0>; 317 label = "ispsens0"; 318 }; 319 320 ps_ispsens1: power-controller@80138 { 321 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 322 reg = <0x80138 4>; 323 #power-domain-cells = <0>; 324 #reset-cells = <0>; 325 label = "ispsens1"; 326 }; 327 328 ps_ispsens2: power-controller@80140 { 329 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 330 reg = <0x80140 4>; 331 #power-domain-cells = <0>; 332 #reset-cells = <0>; 333 label = "ispsens2"; 334 }; 335 336 ps_mca5: power-controller@80198 { 337 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 338 reg = <0x80198 4>; 339 #power-domain-cells = <0>; 340 #reset-cells = <0>; 341 label = "mca5"; 342 power-domains = <&ps_sio_p>; 343 }; 344 345 ps_usb: power-controller@80270 { 346 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 347 reg = <0x80270 4>; 348 #power-domain-cells = <0>; 349 #reset-cells = <0>; 350 label = "usb"; 351 }; 352 353 ps_usbctlreg: power-controller@80278 { 354 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 355 reg = <0x80278 4>; 356 #power-domain-cells = <0>; 357 #reset-cells = <0>; 358 label = "usbctlreg"; 359 power-domains = <&ps_usb>; 360 }; 361 362 ps_usb2host0: power-controller@80280 { 363 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 364 reg = <0x80280 4>; 365 #power-domain-cells = <0>; 366 #reset-cells = <0>; 367 label = "usb2host0"; 368 power-domains = <&ps_usbctlreg>; 369 }; 370 371 ps_usb2host1: power-controller@80290 { 372 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 373 reg = <0x80290 4>; 374 #power-domain-cells = <0>; 375 #reset-cells = <0>; 376 label = "usb2host1"; 377 power-domains = <&ps_usbctlreg>; 378 }; 379 380 ps_rtmux: power-controller@802b0 { 381 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 382 reg = <0x802b0 4>; 383 #power-domain-cells = <0>; 384 #reset-cells = <0>; 385 label = "rtmux"; 386 }; 387 388 ps_media: power-controller@802f0 { 389 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 390 reg = <0x802f0 4>; 391 #power-domain-cells = <0>; 392 #reset-cells = <0>; 393 label = "media"; 394 }; 395 396 ps_jpg: power-controller@802f8 { 397 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 398 reg = <0x802f8 4>; 399 #power-domain-cells = <0>; 400 #reset-cells = <0>; 401 label = "jpg"; 402 power-domains = <&ps_media>; 403 }; 404 405 ps_disp0_fe: power-controller@802b8 { 406 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 407 reg = <0x802b8 4>; 408 #power-domain-cells = <0>; 409 #reset-cells = <0>; 410 label = "disp0_fe"; 411 power-domains = <&ps_rtmux>; 412 }; 413 414 ps_disp0_be: power-controller@802c0 { 415 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 416 reg = <0x802c0 4>; 417 #power-domain-cells = <0>; 418 #reset-cells = <0>; 419 label = "disp0_be"; 420 power-domains = <&ps_disp0_fe>; 421 }; 422 423 ps_disp0_gp: power-controller@802c8 { 424 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 425 reg = <0x802c8 4>; 426 #power-domain-cells = <0>; 427 #reset-cells = <0>; 428 label = "disp0_gp"; 429 power-domains = <&ps_disp0_be>; 430 status = "disabled"; 431 }; 432 433 ps_uart3: power-controller@80200 { 434 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 435 reg = <0x80200 4>; 436 #power-domain-cells = <0>; 437 #reset-cells = <0>; 438 label = "uart3"; 439 power-domains = <&ps_sio_p>; 440 }; 441 442 ps_uart4: power-controller@80208 { 443 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 444 reg = <0x80208 4>; 445 #power-domain-cells = <0>; 446 #reset-cells = <0>; 447 label = "uart4"; 448 power-domains = <&ps_sio_p>; 449 }; 450 451 ps_uart5: power-controller@80210 { 452 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 453 reg = <0x80210 4>; 454 #power-domain-cells = <0>; 455 #reset-cells = <0>; 456 label = "uart5"; 457 power-domains = <&ps_sio_p>; 458 }; 459 460 ps_uart6: power-controller@80218 { 461 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 462 reg = <0x80218 4>; 463 #power-domain-cells = <0>; 464 #reset-cells = <0>; 465 label = "uart6"; 466 power-domains = <&ps_sio_p>; 467 }; 468 469 ps_uart7: power-controller@80220 { 470 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 471 reg = <0x80220 4>; 472 #power-domain-cells = <0>; 473 #reset-cells = <0>; 474 label = "uart7"; 475 power-domains = <&ps_sio_p>; 476 }; 477 478 ps_uart8: power-controller@80228 { 479 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 480 reg = <0x80228 4>; 481 #power-domain-cells = <0>; 482 #reset-cells = <0>; 483 label = "uart8"; 484 power-domains = <&ps_sio_p>; 485 }; 486 487 ps_hfd0: power-controller@80238 { 488 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 489 reg = <0x80238 4>; 490 #power-domain-cells = <0>; 491 #reset-cells = <0>; 492 label = "hfd0"; 493 power-domains = <&ps_sio_p>; 494 }; 495 496 ps_mcc: power-controller@80248 { 497 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 498 reg = <0x80248 4>; 499 #power-domain-cells = <0>; 500 #reset-cells = <0>; 501 label = "mcc"; 502 apple,always-on; /* Memory cache controller */ 503 }; 504 505 ps_dcs0: power-controller@80250 { 506 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 507 reg = <0x80250 4>; 508 #power-domain-cells = <0>; 509 #reset-cells = <0>; 510 label = "dcs0"; 511 apple,always-on; /* LPDDR4X interface */ 512 }; 513 514 ps_dcs1: power-controller@80258 { 515 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 516 reg = <0x80258 4>; 517 #power-domain-cells = <0>; 518 #reset-cells = <0>; 519 label = "dcs1"; 520 apple,always-on; /* LPDDR4X interface */ 521 }; 522 523 ps_dcs2: power-controller@80260 { 524 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 525 reg = <0x80260 4>; 526 #power-domain-cells = <0>; 527 #reset-cells = <0>; 528 label = "dcs2"; 529 apple,always-on; /* LPDDR4X interface */ 530 }; 531 532 ps_dcs3: power-controller@80268 { 533 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 534 reg = <0x80268 4>; 535 #power-domain-cells = <0>; 536 #reset-cells = <0>; 537 label = "dcs3"; 538 apple,always-on; /* LPDDR4X interface */ 539 }; 540 541 ps_usb2host0_ohci: power-controller@80288 { 542 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 543 reg = <0x80288 4>; 544 #power-domain-cells = <0>; 545 #reset-cells = <0>; 546 label = "usb2host0_ohci"; 547 power-domains = <&ps_usb2host0>; 548 }; 549 550 ps_usb2dev: power-controller@80298 { 551 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 552 reg = <0x80298 4>; 553 #power-domain-cells = <0>; 554 #reset-cells = <0>; 555 label = "usb2dev"; 556 power-domains = <&ps_usbctlreg>; 557 }; 558 559 ps_smx: power-controller@802a0 { 560 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 561 reg = <0x802a0 4>; 562 #power-domain-cells = <0>; 563 #reset-cells = <0>; 564 label = "smx"; 565 apple,always-on; /* Apple fabric, critical block */ 566 }; 567 568 ps_sf: power-controller@802a8 { 569 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 570 reg = <0x802a8 4>; 571 #power-domain-cells = <0>; 572 #reset-cells = <0>; 573 label = "sf"; 574 apple,always-on; /* Apple fabric, critical block */ 575 }; 576 577 ps_mipi_dsi: power-controller@802d8 { 578 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 579 reg = <0x802d8 4>; 580 #power-domain-cells = <0>; 581 #reset-cells = <0>; 582 label = "mipi_dsi"; 583 power-domains = <&ps_rtmux>; 584 }; 585 586 ps_dp: power-controller@802e0 { 587 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 588 reg = <0x802e0 4>; 589 #power-domain-cells = <0>; 590 #reset-cells = <0>; 591 label = "dp"; 592 power-domains = <&ps_disp0_be>; 593 }; 594 595 ps_dpa: power-controller@80230 { 596 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 597 reg = <0x80230 4>; 598 #power-domain-cells = <0>; 599 #reset-cells = <0>; 600 label = "dpa"; 601 }; 602 603 ps_disp0_be_2x: power-controller@802d0 { 604 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 605 reg = <0x802d0 4>; 606 #power-domain-cells = <0>; 607 #reset-cells = <0>; 608 label = "disp0_be_2x"; 609 power-domains = <&ps_disp0_be>; 610 }; 611 612 ps_isp_sys: power-controller@80350 { 613 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 614 reg = <0x80350 4>; 615 #power-domain-cells = <0>; 616 #reset-cells = <0>; 617 label = "isp_sys"; 618 power-domains = <&ps_rtmux>; 619 }; 620 621 ps_msr: power-controller@80300 { 622 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 623 reg = <0x80300 4>; 624 #power-domain-cells = <0>; 625 #reset-cells = <0>; 626 label = "msr"; 627 power-domains = <&ps_media>; 628 }; 629 630 ps_venc_sys: power-controller@80398 { 631 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 632 reg = <0x80398 4>; 633 #power-domain-cells = <0>; 634 #reset-cells = <0>; 635 label = "venc_sys"; 636 power-domains = <&ps_media>; 637 }; 638 639 ps_pmp: power-controller@80308 { 640 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 641 reg = <0x80308 4>; 642 #power-domain-cells = <0>; 643 #reset-cells = <0>; 644 label = "pmp"; 645 }; 646 647 ps_pms_sram: power-controller@80310 { 648 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 649 reg = <0x80310 4>; 650 #power-domain-cells = <0>; 651 #reset-cells = <0>; 652 label = "pms_sram"; 653 }; 654 655 ps_pcie: power-controller@80318 { 656 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 657 reg = <0x80318 4>; 658 #power-domain-cells = <0>; 659 #reset-cells = <0>; 660 label = "pcie"; 661 }; 662 663 ps_pcie_aux: power-controller@80320 { 664 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 665 reg = <0x80320 4>; 666 #power-domain-cells = <0>; 667 #reset-cells = <0>; 668 label = "pcie_aux"; 669 }; 670 671 ps_vdec0: power-controller@80388 { 672 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 673 reg = <0x80388 4>; 674 #power-domain-cells = <0>; 675 #reset-cells = <0>; 676 label = "vdec0"; 677 power-domains = <&ps_media>; 678 }; 679 680 ps_gfx: power-controller@80338 { 681 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 682 reg = <0x80338 4>; 683 #power-domain-cells = <0>; 684 #reset-cells = <0>; 685 label = "gfx"; 686 }; 687 688 ps_ans2: power-controller@80328 { 689 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 690 reg = <0x80328 4>; 691 #power-domain-cells = <0>; 692 #reset-cells = <0>; 693 label = "ans2"; 694 apple,always-on; 695 }; 696 697 ps_pcie_direct: power-controller@80330 { 698 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 699 reg = <0x80330 4>; 700 #power-domain-cells = <0>; 701 #reset-cells = <0>; 702 label = "pcie_direct"; 703 apple,always-on; 704 }; 705 706 ps_avd_sys: power-controller@803a8 { 707 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 708 reg = <0x803a8 4>; 709 #power-domain-cells = <0>; 710 #reset-cells = <0>; 711 label = "avd_sys"; 712 power-domains = <&ps_media>; 713 }; 714 715 ps_sep: power-controller@80400 { 716 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 717 reg = <0x80400 4>; 718 #power-domain-cells = <0>; 719 #reset-cells = <0>; 720 label = "sep"; 721 apple,always-on; /* Locked on */ 722 }; 723 724 ps_disp0_gp0: power-controller@80830 { 725 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 726 reg = <0x80830 4>; 727 #power-domain-cells = <0>; 728 #reset-cells = <0>; 729 label = "disp0_gp0"; 730 power-domains = <&ps_disp0_gp>; 731 status = "disabled"; 732 }; 733 734 ps_disp0_gp1: power-controller@80838 { 735 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 736 reg = <0x80838 4>; 737 #power-domain-cells = <0>; 738 #reset-cells = <0>; 739 label = "disp0_gp1"; 740 status = "disabled"; 741 }; 742 743 ps_disp0_ppp: power-controller@80840 { 744 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 745 reg = <0x80840 4>; 746 #power-domain-cells = <0>; 747 #reset-cells = <0>; 748 label = "disp0_ppp"; 749 }; 750 751 ps_disp0_hilo: power-controller@80848 { 752 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 753 reg = <0x80848 4>; 754 #power-domain-cells = <0>; 755 #reset-cells = <0>; 756 label = "disp0_hilo"; 757 }; 758 759 ps_isp_rsts0: power-controller@84000 { 760 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 761 reg = <0x84000 4>; 762 #power-domain-cells = <0>; 763 #reset-cells = <0>; 764 label = "isp_rsts0"; 765 power-domains = <&ps_isp_sys>; 766 }; 767 768 ps_isp_rsts1: power-controller@84008 { 769 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 770 reg = <0x84008 4>; 771 #power-domain-cells = <0>; 772 #reset-cells = <0>; 773 label = "isp_rsts1"; 774 power-domains = <&ps_isp_sys>; 775 }; 776 777 ps_isp_vis: power-controller@84010 { 778 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 779 reg = <0x84010 4>; 780 #power-domain-cells = <0>; 781 #reset-cells = <0>; 782 label = "isp_vis"; 783 power-domains = <&ps_isp_sys>; 784 }; 785 786 ps_isp_be: power-controller@84018 { 787 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 788 reg = <0x84018 4>; 789 #power-domain-cells = <0>; 790 #reset-cells = <0>; 791 label = "isp_be"; 792 power-domains = <&ps_isp_sys>; 793 }; 794 795 ps_isp_pearl: power-controller@84020 { 796 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 797 reg = <0x84020 4>; 798 #power-domain-cells = <0>; 799 #reset-cells = <0>; 800 label = "isp_pearl"; 801 power-domains = <&ps_isp_sys>; 802 }; 803 804 ps_dprx: power-controller@84028 { 805 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 806 reg = <0x84028 4>; 807 #power-domain-cells = <0>; 808 #reset-cells = <0>; 809 label = "dprx"; 810 power-domains = <&ps_isp_sys>; 811 }; 812 813 ps_isp_cnv: power-controller@84030 { 814 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 815 reg = <0x84030 4>; 816 #power-domain-cells = <0>; 817 #reset-cells = <0>; 818 label = "isp_cnv"; 819 power-domains = <&ps_isp_sys>; 820 }; 821 822 ps_venc_dma: power-controller@88000 { 823 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 824 reg = <0x88000 4>; 825 #power-domain-cells = <0>; 826 #reset-cells = <0>; 827 label = "venc_dma"; 828 }; 829 830 ps_venc_pipe4: power-controller@88010 { 831 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 832 reg = <0x88010 4>; 833 #power-domain-cells = <0>; 834 #reset-cells = <0>; 835 label = "venc_pipe4"; 836 }; 837 838 ps_venc_pipe5: power-controller@88018 { 839 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 840 reg = <0x88018 4>; 841 #power-domain-cells = <0>; 842 #reset-cells = <0>; 843 label = "venc_pipe5"; 844 }; 845 846 ps_venc_me0: power-controller@88020 { 847 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 848 reg = <0x88020 4>; 849 #power-domain-cells = <0>; 850 #reset-cells = <0>; 851 label = "venc_me0"; 852 }; 853 854 ps_venc_me1: power-controller@88028 { 855 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 856 reg = <0x88028 4>; 857 #power-domain-cells = <0>; 858 #reset-cells = <0>; 859 label = "venc_me1"; 860 }; 861}; 862 863&pmgr_mini { 864 ps_aop_base: power-controller@80008 { 865 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 866 reg = <0x80008 4>; 867 #power-domain-cells = <0>; 868 #reset-cells = <0>; 869 label = "aop_base"; 870 power-domains = <&ps_aop_cpu &ps_aop_filter>; 871 apple,always-on; /* Always on processor */ 872 }; 873 874 ps_debug: power-controller@80050 { 875 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 876 reg = <0x80050 4>; 877 #power-domain-cells = <0>; 878 #reset-cells = <0>; 879 label = "debug"; 880 }; 881 882 ps_aop_cpu: power-controller@80020 { 883 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 884 reg = <0x80020 4>; 885 #power-domain-cells = <0>; 886 #reset-cells = <0>; 887 label = "aop_cpu"; 888 }; 889 890 ps_aop_filter: power-controller@80000 { 891 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 892 reg = <0x80000 4>; 893 #power-domain-cells = <0>; 894 #reset-cells = <0>; 895 label = "aop_filter"; 896 }; 897 898 ps_spmi: power-controller@80058 { 899 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 900 reg = <0x80058 4>; 901 #power-domain-cells = <0>; 902 #reset-cells = <0>; 903 label = "spmi"; 904 apple,always-on; /* System Power Management Interface */ 905 }; 906 907 ps_smc_i2cm1: power-controller@800a8 { 908 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 909 reg = <0x800a8 4>; 910 #power-domain-cells = <0>; 911 #reset-cells = <0>; 912 label = "smc_i2cm1"; 913 }; 914 915 ps_smc_fabric: power-controller@80030 { 916 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 917 reg = <0x80030 4>; 918 #power-domain-cells = <0>; 919 #reset-cells = <0>; 920 label = "smc_fabric"; 921 }; 922 923 ps_smc_cpu: power-controller@80140 { 924 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate"; 925 reg = <0x80140 4>; 926 #power-domain-cells = <0>; 927 #reset-cells = <0>; 928 label = "smc_cpu"; 929 power-domains = <&ps_smc_fabric &ps_smc_i2cm1>; 930 }; 931}; 932