1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2/* 3 * Devices used on die 0 on the Apple T6032 "M3 Ultra" SoC and present on 4 * Apple T6030 ("M3 Pro") and T6031 / T6034 ("M3 Max"). 5 * 6 * Copyright The Asahi Linux Contributors 7 */ 8 9 aic: interrupt-controller@292400000 { 10 compatible = "apple,t6031-aic3", "apple,t8122-aic3"; 11 #interrupt-cells = <4>; 12 interrupt-controller; 13 14 reg = <0x00000002 0x92400000 0x00000000 0x1cc000>, 15 <0x00000002 0x92440000 0x00000000 0x4000>; 16 reg-names = "core", "event"; 17 power-domains = <&ps_aic>; 18 }; 19 20 wdt: watchdog@2a02d4000 { 21 compatible = "apple,t6031-wdt", "apple,t8103-wdt"; 22 reg = <0x2 0xa02d4000 0x0 0x4000>; 23 clocks = <&clkref>; 24 interrupt-parent = <&aic>; 25 interrupts = <AIC_IRQ 0 718 IRQ_TYPE_LEVEL_HIGH>; 26 }; 27 28 pinctrl_smc: pinctrl@2a4820000 { 29 compatible = "apple,t6031-pinctrl", "apple,t8103-pinctrl"; 30 reg = <0x2 0xa4820000 0x0 0x4000>; 31 32 gpio-controller; 33 #gpio-cells = <2>; 34 gpio-ranges = <&pinctrl_smc 0 0 30>; 35 apple,npins = <30>; 36 37 interrupt-controller; 38 #interrupt-cells = <2>; 39 interrupt-parent = <&aic>; 40 interrupts = <AIC_IRQ 0 904 IRQ_TYPE_LEVEL_HIGH>, 41 <AIC_IRQ 0 905 IRQ_TYPE_LEVEL_HIGH>, 42 <AIC_IRQ 0 906 IRQ_TYPE_LEVEL_HIGH>, 43 <AIC_IRQ 0 907 IRQ_TYPE_LEVEL_HIGH>, 44 <AIC_IRQ 0 908 IRQ_TYPE_LEVEL_HIGH>, 45 <AIC_IRQ 0 909 IRQ_TYPE_LEVEL_HIGH>, 46 <AIC_IRQ 0 910 IRQ_TYPE_LEVEL_HIGH>; 47 }; 48 49 i2c0: i2c@391010000 { 50 compatible = "apple,t6031-i2c", "apple,t8103-i2c"; 51 reg = <0x3 0x91010000 0x0 0x4000>; 52 clocks = <&clkref>; 53 interrupt-parent = <&aic>; 54 interrupts = <AIC_IRQ 0 1326 IRQ_TYPE_LEVEL_HIGH>; 55 pinctrl-0 = <&i2c0_pins>; 56 pinctrl-names = "default"; 57 power-domains = <&ps_i2c0>; 58 #address-cells = <0x1>; 59 #size-cells = <0x0>; 60 }; 61 62 i2c1: i2c@391014000 { 63 compatible = "apple,t6031-i2c", "apple,t8103-i2c"; 64 reg = <0x3 0x91014000 0x0 0x4000>; 65 clocks = <&clkref>; 66 interrupt-parent = <&aic>; 67 interrupts = <AIC_IRQ 0 1327 IRQ_TYPE_LEVEL_HIGH>; 68 pinctrl-0 = <&i2c1_pins>; 69 pinctrl-names = "default"; 70 power-domains = <&ps_i2c1>; 71 #address-cells = <0x1>; 72 #size-cells = <0x0>; 73 status = "disabled"; 74 }; 75 76 i2c2: i2c@391018000 { 77 compatible = "apple,t6031-i2c", "apple,t8103-i2c"; 78 reg = <0x3 0x91018000 0x0 0x4000>; 79 clocks = <&clkref>; 80 interrupt-parent = <&aic>; 81 interrupts = <AIC_IRQ 0 1328 IRQ_TYPE_LEVEL_HIGH>; 82 pinctrl-0 = <&i2c2_pins>; 83 pinctrl-names = "default"; 84 power-domains = <&ps_i2c2>; 85 #address-cells = <0x1>; 86 #size-cells = <0x0>; 87 status = "disabled"; 88 }; 89 90 i2c3: i2c@39101c000 { 91 compatible = "apple,t6031-i2c", "apple,t8103-i2c"; 92 reg = <0x3 0x9101c000 0x0 0x4000>; 93 clocks = <&clkref>; 94 interrupt-parent = <&aic>; 95 interrupts = <AIC_IRQ 0 1329 IRQ_TYPE_LEVEL_HIGH>; 96 pinctrl-0 = <&i2c3_pins>; 97 pinctrl-names = "default"; 98 power-domains = <&ps_i2c3>; 99 #address-cells = <0x1>; 100 #size-cells = <0x0>; 101 status = "disabled"; 102 }; 103 104 i2c4: i2c@391020000 { 105 compatible = "apple,t6031-i2c", "apple,t8103-i2c"; 106 reg = <0x3 0x91020000 0x0 0x4000>; 107 clocks = <&clkref>; 108 interrupt-parent = <&aic>; 109 interrupts = <AIC_IRQ 0 1330 IRQ_TYPE_LEVEL_HIGH>; 110 pinctrl-0 = <&i2c4_pins>; 111 pinctrl-names = "default"; 112 power-domains = <&ps_i2c4>; 113 #address-cells = <0x1>; 114 #size-cells = <0x0>; 115 status = "disabled"; 116 }; 117 118 i2c5: i2c@391024000 { 119 compatible = "apple,t6031-i2c", "apple,t8103-i2c"; 120 reg = <0x3 0x91024000 0x0 0x4000>; 121 clocks = <&clkref>; 122 interrupt-parent = <&aic>; 123 interrupts = <AIC_IRQ 0 1331 IRQ_TYPE_LEVEL_HIGH>; 124 pinctrl-0 = <&i2c5_pins>; 125 pinctrl-names = "default"; 126 power-domains = <&ps_i2c5>; 127 #address-cells = <0x1>; 128 #size-cells = <0x0>; 129 status = "disabled"; 130 }; 131 132 i2c6: i2c@391028000 { 133 compatible = "apple,t6031-i2c", "apple,t8103-i2c"; 134 reg = <0x3 0x91028000 0x0 0x4000>; 135 clocks = <&clkref>; 136 interrupt-parent = <&aic>; 137 interrupts = <AIC_IRQ 0 1332 IRQ_TYPE_LEVEL_HIGH>; 138 pinctrl-0 = <&i2c6_pins>; 139 pinctrl-names = "default"; 140 power-domains = <&ps_i2c6>; 141 #address-cells = <0x1>; 142 #size-cells = <0x0>; 143 status = "disabled"; 144 }; 145 146 i2c7: i2c@39102c000 { 147 compatible = "apple,t6031-i2c", "apple,t8103-i2c"; 148 reg = <0x3 0x9102c000 0x0 0x4000>; 149 clocks = <&clkref>; 150 interrupt-parent = <&aic>; 151 interrupts = <AIC_IRQ 0 1333 IRQ_TYPE_LEVEL_HIGH>; 152 pinctrl-0 = <&i2c7_pins>; 153 pinctrl-names = "default"; 154 power-domains = <&ps_i2c7>; 155 #address-cells = <0x1>; 156 #size-cells = <0x0>; 157 status = "disabled"; 158 }; 159 160 i2c8: i2c@391030000 { 161 compatible = "apple,t6031-i2c", "apple,t8103-i2c"; 162 reg = <0x3 0x91030000 0x0 0x4000>; 163 clocks = <&clkref>; 164 interrupt-parent = <&aic>; 165 interrupts = <AIC_IRQ 0 1334 IRQ_TYPE_LEVEL_HIGH>; 166 pinctrl-0 = <&i2c8_pins>; 167 pinctrl-names = "default"; 168 power-domains = <&ps_i2c8>; 169 #address-cells = <0x1>; 170 #size-cells = <0x0>; 171 status = "disabled"; 172 }; 173 174 fpwm0: pwm@391040000 { 175 compatible = "apple,t6031-fpwm", "apple,s5l-fpwm"; 176 reg = <0x3 0x91040000 0x0 0x4000>; 177 power-domains = <&ps_fpwm0>; 178 clocks = <&clkref>; 179 #pwm-cells = <2>; 180 status = "disabled"; 181 }; 182 183 serial0: serial@391200000 { 184 compatible = "apple,s5l-uart"; 185 reg = <0x3 0x91200000 0x0 0x4000>; 186 reg-io-width = <4>; 187 interrupt-parent = <&aic>; 188 interrupts = <AIC_IRQ 0 1303 IRQ_TYPE_LEVEL_HIGH>; 189 /* 190 * TODO: figure out the clocking properly, there may 191 * be a third selectable clock. 192 */ 193 clocks = <&clkref>, <&clkref>; 194 clock-names = "uart", "clk_uart_baud0"; 195 power-domains = <&ps_uart0>; 196 status = "disabled"; 197 }; 198