1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2/* 3 * Nodes common for T6031, T6032 and T6034 family SoCs (M3 Max/Ultra) 4 * 5 * Other names: H15J, H15S, "Palma" 6 * 7 * Copyright The Asahi Linux Contributors 8 */ 9 10/ { 11 #address-cells = <2>; 12 #size-cells = <2>; 13 14 cpus { 15 #address-cells = <2>; 16 #size-cells = <0>; 17 18 cpu-map { 19 cluster0 { 20 core0 { 21 cpu = <&cpu_e00>; 22 }; 23 core1 { 24 cpu = <&cpu_e01>; 25 }; 26 core2 { 27 cpu = <&cpu_e02>; 28 }; 29 core3 { 30 cpu = <&cpu_e03>; 31 }; 32 }; 33 34 cluster1 { 35 core0 { 36 cpu = <&cpu_p00>; 37 }; 38 core1 { 39 cpu = <&cpu_p01>; 40 }; 41 core2 { 42 cpu = <&cpu_p02>; 43 }; 44 core3 { 45 cpu = <&cpu_p03>; 46 }; 47 core4 { 48 cpu = <&cpu_p04>; 49 }; 50 core5 { 51 cpu = <&cpu_p05>; 52 }; 53 }; 54 55 cluster2 { 56 core0 { 57 cpu = <&cpu_p10>; 58 }; 59 core1 { 60 cpu = <&cpu_p11>; 61 }; 62 core2 { 63 cpu = <&cpu_p12>; 64 }; 65 core3 { 66 cpu = <&cpu_p13>; 67 }; 68 core4 { 69 cpu = <&cpu_p14>; 70 }; 71 core5 { 72 cpu = <&cpu_p15>; 73 }; 74 }; 75 }; 76 77 cpu_e00: cpu@0 { 78 compatible = "apple,sawtooth"; 79 device_type = "cpu"; 80 reg = <0x0 0x0>; 81 enable-method = "spin-table"; 82 cpu-release-addr = <0 0>; /* to be filled by loader */ 83 next-level-cache = <&l2_cache_0>; 84 i-cache-size = <0x20000>; 85 d-cache-size = <0x10000>; 86 }; 87 88 cpu_e01: cpu@1 { 89 compatible = "apple,sawtooth"; 90 device_type = "cpu"; 91 reg = <0x0 0x1>; 92 enable-method = "spin-table"; 93 cpu-release-addr = <0 0>; /* to be filled by loader */ 94 next-level-cache = <&l2_cache_0>; 95 i-cache-size = <0x20000>; 96 d-cache-size = <0x10000>; 97 }; 98 99 cpu_e02: cpu@2 { 100 compatible = "apple,sawtooth"; 101 device_type = "cpu"; 102 reg = <0x0 0x2>; 103 enable-method = "spin-table"; 104 cpu-release-addr = <0 0>; /* to be filled by loader */ 105 next-level-cache = <&l2_cache_0>; 106 i-cache-size = <0x20000>; 107 d-cache-size = <0x10000>; 108 }; 109 110 cpu_e03: cpu@3 { 111 compatible = "apple,sawtooth"; 112 device_type = "cpu"; 113 reg = <0x0 0x3>; 114 enable-method = "spin-table"; 115 cpu-release-addr = <0 0>; /* to be filled by loader */ 116 next-level-cache = <&l2_cache_0>; 117 i-cache-size = <0x20000>; 118 d-cache-size = <0x10000>; 119 }; 120 121 cpu_p00: cpu@10100 { 122 compatible = "apple,everest"; 123 device_type = "cpu"; 124 reg = <0x0 0x10100>; 125 enable-method = "spin-table"; 126 cpu-release-addr = <0 0>; /* To be filled by loader */ 127 next-level-cache = <&l2_cache_1>; 128 i-cache-size = <0x30000>; 129 d-cache-size = <0x20000>; 130 }; 131 132 cpu_p01: cpu@10101 { 133 compatible = "apple,everest"; 134 device_type = "cpu"; 135 reg = <0x0 0x10101>; 136 enable-method = "spin-table"; 137 cpu-release-addr = <0 0>; /* To be filled by loader */ 138 next-level-cache = <&l2_cache_1>; 139 i-cache-size = <0x30000>; 140 d-cache-size = <0x20000>; 141 }; 142 143 cpu_p02: cpu@10102 { 144 compatible = "apple,everest"; 145 device_type = "cpu"; 146 reg = <0x0 0x10102>; 147 enable-method = "spin-table"; 148 cpu-release-addr = <0 0>; /* To be filled by loader */ 149 next-level-cache = <&l2_cache_1>; 150 i-cache-size = <0x30000>; 151 d-cache-size = <0x20000>; 152 }; 153 154 cpu_p03: cpu@10103 { 155 compatible = "apple,everest"; 156 device_type = "cpu"; 157 reg = <0x0 0x10103>; 158 enable-method = "spin-table"; 159 cpu-release-addr = <0 0>; /* To be filled by loader */ 160 next-level-cache = <&l2_cache_1>; 161 i-cache-size = <0x30000>; 162 d-cache-size = <0x20000>; 163 }; 164 165 cpu_p04: cpu@10104 { 166 compatible = "apple,everest"; 167 device_type = "cpu"; 168 reg = <0x0 0x10104>; 169 enable-method = "spin-table"; 170 cpu-release-addr = <0 0>; /* To be filled by loader */ 171 next-level-cache = <&l2_cache_1>; 172 i-cache-size = <0x30000>; 173 d-cache-size = <0x20000>; 174 }; 175 176 cpu_p05: cpu@10105 { 177 compatible = "apple,everest"; 178 device_type = "cpu"; 179 reg = <0x0 0x10105>; 180 enable-method = "spin-table"; 181 cpu-release-addr = <0 0>; /* To be filled by loader */ 182 next-level-cache = <&l2_cache_1>; 183 i-cache-size = <0x30000>; 184 d-cache-size = <0x20000>; 185 }; 186 187 cpu_p10: cpu@10200 { 188 compatible = "apple,everest"; 189 device_type = "cpu"; 190 reg = <0x0 0x10200>; 191 enable-method = "spin-table"; 192 cpu-release-addr = <0 0>; /* To be filled by loader */ 193 next-level-cache = <&l2_cache_2>; 194 i-cache-size = <0x30000>; 195 d-cache-size = <0x20000>; 196 }; 197 198 cpu_p11: cpu@10201 { 199 compatible = "apple,everest"; 200 device_type = "cpu"; 201 reg = <0x0 0x10201>; 202 enable-method = "spin-table"; 203 cpu-release-addr = <0 0>; /* To be filled by loader */ 204 next-level-cache = <&l2_cache_2>; 205 i-cache-size = <0x30000>; 206 d-cache-size = <0x20000>; 207 }; 208 209 cpu_p12: cpu@10202 { 210 compatible = "apple,everest"; 211 device_type = "cpu"; 212 reg = <0x0 0x10202>; 213 enable-method = "spin-table"; 214 cpu-release-addr = <0 0>; /* To be filled by loader */ 215 next-level-cache = <&l2_cache_2>; 216 i-cache-size = <0x30000>; 217 d-cache-size = <0x20000>; 218 }; 219 220 cpu_p13: cpu@10203 { 221 compatible = "apple,everest"; 222 device_type = "cpu"; 223 reg = <0x0 0x10203>; 224 enable-method = "spin-table"; 225 cpu-release-addr = <0 0>; /* To be filled by loader */ 226 next-level-cache = <&l2_cache_2>; 227 i-cache-size = <0x30000>; 228 d-cache-size = <0x20000>; 229 }; 230 231 cpu_p14: cpu@10204 { 232 compatible = "apple,everest"; 233 device_type = "cpu"; 234 reg = <0x0 0x10204>; 235 enable-method = "spin-table"; 236 cpu-release-addr = <0 0>; /* To be filled by loader */ 237 next-level-cache = <&l2_cache_2>; 238 i-cache-size = <0x30000>; 239 d-cache-size = <0x20000>; 240 }; 241 242 cpu_p15: cpu@10205 { 243 compatible = "apple,everest"; 244 device_type = "cpu"; 245 reg = <0x0 0x10205>; 246 enable-method = "spin-table"; 247 cpu-release-addr = <0 0>; /* To be filled by loader */ 248 next-level-cache = <&l2_cache_2>; 249 i-cache-size = <0x30000>; 250 d-cache-size = <0x20000>; 251 }; 252 253 l2_cache_0: l2-cache-0 { 254 compatible = "cache"; 255 cache-level = <2>; 256 cache-unified; 257 cache-size = <0x400000>; 258 }; 259 260 l2_cache_1: l2-cache-1 { 261 compatible = "cache"; 262 cache-level = <2>; 263 cache-unified; 264 cache-size = <0x1000000>; 265 }; 266 267 l2_cache_2: l2-cache-2 { 268 compatible = "cache"; 269 cache-level = <2>; 270 cache-unified; 271 cache-size = <0x1000000>; 272 }; 273 }; 274 275 timer { 276 compatible = "arm,armv8-timer"; 277 interrupt-parent = <&aic>; 278 interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt"; 279 interrupts = <AIC_FIQ 0 AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>, 280 <AIC_FIQ 0 AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>, 281 <AIC_FIQ 0 AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>, 282 <AIC_FIQ 0 AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>; 283 }; 284 285 clkref: clock-ref { 286 compatible = "fixed-clock"; 287 #clock-cells = <0>; 288 clock-frequency = <24000000>; 289 clock-output-names = "clkref"; 290 }; 291 292 reserved-memory { 293 #address-cells = <2>; 294 #size-cells = <2>; 295 ranges; 296 }; 297}; 298