1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2026 Amlogic, Inc. All rights reserved. 4 */ 5 6#include <dt-bindings/interrupt-controller/irq.h> 7#include <dt-bindings/interrupt-controller/arm-gic.h> 8#include <dt-bindings/gpio/gpio.h> 9 10/ { 11 interrupt-parent = <&gic>; 12 13 cpus { 14 #address-cells = <2>; 15 #size-cells = <0>; 16 17 cpu0: cpu@0 { 18 device_type = "cpu"; 19 compatible = "arm,cortex-a55"; 20 reg = <0x0 0x0>; 21 enable-method = "psci"; 22 }; 23 24 cpu1: cpu@100 { 25 device_type = "cpu"; 26 compatible = "arm,cortex-a55"; 27 reg = <0x0 0x100>; 28 enable-method = "psci"; 29 }; 30 31 cpu2: cpu@200 { 32 device_type = "cpu"; 33 compatible = "arm,cortex-a55"; 34 reg = <0x0 0x200>; 35 enable-method = "psci"; 36 }; 37 38 cpu3: cpu@300 { 39 device_type = "cpu"; 40 compatible = "arm,cortex-a55"; 41 reg = <0x0 0x300>; 42 enable-method = "psci"; 43 }; 44 45 cpu4: cpu@400 { 46 device_type = "cpu"; 47 compatible = "arm,cortex-a55"; 48 reg = <0x0 0x400>; 49 enable-method = "psci"; 50 }; 51 52 cpu5: cpu@500 { 53 device_type = "cpu"; 54 compatible = "arm,cortex-a55"; 55 reg = <0x0 0x500>; 56 enable-method = "psci"; 57 }; 58 59 cpu6: cpu@600 { 60 device_type = "cpu"; 61 compatible = "arm,cortex-a78"; 62 reg = <0x0 0x600>; 63 enable-method = "psci"; 64 }; 65 66 cpu7: cpu@700 { 67 device_type = "cpu"; 68 compatible = "arm,cortex-a78"; 69 reg = <0x0 0x700>; 70 enable-method = "psci"; 71 }; 72 }; 73 74 timer { 75 compatible = "arm,armv8-timer"; 76 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 77 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 78 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 79 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; 80 }; 81 82 psci { 83 compatible = "arm,psci-1.0"; 84 method = "smc"; 85 }; 86 87 xtal: xtal-clk { 88 compatible = "fixed-clock"; 89 clock-frequency = <24000000>; 90 clock-output-names = "xtal"; 91 #clock-cells = <0>; 92 }; 93 94 soc { 95 compatible = "simple-bus"; 96 #address-cells = <2>; 97 #size-cells = <2>; 98 ranges; 99 100 gic: interrupt-controller@ff800000 { 101 compatible = "arm,gic-v3"; 102 #interrupt-cells = <3>; 103 #address-cells = <0>; 104 interrupt-controller; 105 reg = <0x0 0xff800000 0 0x10000>, 106 <0x0 0xff840000 0 0x100000>; 107 interrupts = <GIC_PPI 9 0xf04>; 108 }; 109 110 aobus: bus@ffa00000 { 111 compatible = "simple-bus"; 112 reg = <0x0 0xffa00000 0x0 0x100000>; 113 #address-cells = <2>; 114 #size-cells = <2>; 115 ranges = <0x0 0x0 0x0 0xffa00000 0x0 0x100000>; 116 117 uart_b: serial@1e000 { 118 compatible = "amlogic,a9-uart", 119 "amlogic,meson-s4-uart"; 120 reg = <0x0 0x1e000 0x0 0x18>; 121 interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>; 122 clocks = <&xtal>, <&xtal>, <&xtal>; 123 clock-names = "xtal", "pclk", "baud"; 124 status = "disabled"; 125 }; 126 }; 127 }; 128}; 129