xref: /linux/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts (revision ec71f661a572a770d7c861cd52a50cbbb0e1a8d1) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the RZN1D-EB Board
4 *
5 * Copyright (C) 2023 Schneider-Electric
6 *
7 */
8
9#include <dt-bindings/leds/common.h>
10#include "r9a06g032-rzn1d400-db.dts"
11
12/ {
13	model = "RZN1D-EB Board";
14	compatible = "renesas,rzn1d400-eb", "renesas,rzn1d400-db",
15		     "renesas,r9a06g032";
16};
17
18&gmac1 {
19	pinctrl-0 = <&pins_eth0>, <&pins_mdio0>;
20	pinctrl-names = "default";
21
22	status = "okay";
23	phy-mode = "rgmii-id";
24	phy-handle = <&phy_mii0>;
25
26	mdio {
27		#address-cells = <1>;
28		#size-cells = <0>;
29		compatible = "snps,dwmac-mdio";
30
31		phy_mii0: ethernet-phy@8 {
32			reg = <8>;
33
34			leds {
35				#address-cells = <1>;
36				#size-cells = <0>;
37
38				led@0 {
39					reg = <0>;
40					color = <LED_COLOR_ID_GREEN>;
41					function = LED_FUNCTION_LAN;
42					default-state = "keep";
43				};
44
45				led@1 {
46					reg = <1>;
47					color = <LED_COLOR_ID_ORANGE>;
48					function = LED_FUNCTION_ACTIVITY;
49					default-state = "keep";
50				};
51			};
52		};
53	};
54};
55
56&i2c2 {
57	/* Sensors are different across revisions. All are LM75B compatible */
58	sensor@49 {
59		compatible = "national,lm75b";
60		reg = <0x49>;
61	};
62};
63
64&mii_conv1 {
65	renesas,miic-input = <MIIC_GMAC1_PORT>;
66	status = "okay";
67};
68
69&mii_conv2 {
70	renesas,miic-input = <MIIC_SWITCH_PORTD>;
71	status = "okay";
72};
73
74&mii_conv3 {
75	renesas,miic-input = <MIIC_SWITCH_PORTC>;
76	status = "okay";
77};
78
79&pci_usb {
80	status = "okay";
81};
82
83&pinctrl {
84	pins_eth0: pins-eth0 {
85		pinmux = <RZN1_PINMUX(0, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
86			 <RZN1_PINMUX(1, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
87			 <RZN1_PINMUX(2, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
88			 <RZN1_PINMUX(3, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
89			 <RZN1_PINMUX(4, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
90			 <RZN1_PINMUX(5, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
91			 <RZN1_PINMUX(6, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
92			 <RZN1_PINMUX(7, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
93			 <RZN1_PINMUX(8, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
94			 <RZN1_PINMUX(9, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
95			 <RZN1_PINMUX(10, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
96			 <RZN1_PINMUX(11, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
97		drive-strength = <6>;
98		bias-disable;
99	};
100
101	pins_eth1: pins-eth1 {
102		pinmux = <RZN1_PINMUX(12, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
103			 <RZN1_PINMUX(13, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
104			 <RZN1_PINMUX(14, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
105			 <RZN1_PINMUX(15, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
106			 <RZN1_PINMUX(16, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
107			 <RZN1_PINMUX(17, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
108			 <RZN1_PINMUX(18, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
109			 <RZN1_PINMUX(19, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
110			 <RZN1_PINMUX(20, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
111			 <RZN1_PINMUX(21, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
112			 <RZN1_PINMUX(22, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
113			 <RZN1_PINMUX(23, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
114		drive-strength = <6>;
115		bias-disable;
116	};
117
118	pins_eth2: pins-eth2 {
119		pinmux = <RZN1_PINMUX(24, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
120			 <RZN1_PINMUX(25, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
121			 <RZN1_PINMUX(26, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
122			 <RZN1_PINMUX(27, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
123			 <RZN1_PINMUX(28, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
124			 <RZN1_PINMUX(29, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
125			 <RZN1_PINMUX(30, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
126			 <RZN1_PINMUX(31, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
127			 <RZN1_PINMUX(32, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
128			 <RZN1_PINMUX(33, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
129			 <RZN1_PINMUX(34, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
130			 <RZN1_PINMUX(35, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
131		drive-strength = <6>;
132		bias-disable;
133	};
134
135	pins_mdio0: pins-mdio0 {
136		pinmux = <RZN1_PINMUX(150, RZN1_FUNC_MDIO0_GMAC0)>,
137			 <RZN1_PINMUX(151, RZN1_FUNC_MDIO0_GMAC0)>;
138	};
139
140	pins_sdio1: pins-sdio1 {
141		pinmux = <RZN1_PINMUX(95, RZN1_FUNC_SDIO)>,
142			 <RZN1_PINMUX(97, RZN1_FUNC_SDIO)>,
143			 <RZN1_PINMUX(98, RZN1_FUNC_SDIO)>,
144			 <RZN1_PINMUX(99, RZN1_FUNC_SDIO)>,
145			 <RZN1_PINMUX(100, RZN1_FUNC_SDIO)>,
146			 <RZN1_PINMUX(101, RZN1_FUNC_SDIO_E)>,
147			 <RZN1_PINMUX(102, RZN1_FUNC_SDIO_E)>;
148	};
149
150	pins_sdio1_clk: pins-sdio1-clk {
151		pinmux = <RZN1_PINMUX(96, RZN1_FUNC_SDIO)>;
152		drive-strength = <12>;
153	};
154
155	pins_uart2: pins-uart2 {
156		pinmux = <RZN1_PINMUX(105, RZN1_FUNC_UART2)>,
157			 <RZN1_PINMUX(106, RZN1_FUNC_UART2)>,
158			 <RZN1_PINMUX(107, RZN1_FUNC_UART2)>,
159			 <RZN1_PINMUX(108, RZN1_FUNC_UART2)>;
160		bias-disable;
161	};
162};
163
164&sdio1 {
165	pinctrl-0 = <&pins_sdio1>, <&pins_sdio1_clk>;
166	pinctrl-names = "default";
167
168	status = "okay";
169};
170
171&switch {
172	pinctrl-0 = <&pins_eth1>, <&pins_eth2>, <&pins_eth3>, <&pins_eth4>,
173		    <&pins_mdio1>;
174
175	mdio {
176		/* CN15 and CN16 switches must be configured in MDIO2 mode */
177		switch0phy1: ethernet-phy@1 {
178			reg = <1>;
179
180			leds {
181				#address-cells = <1>;
182				#size-cells = <0>;
183
184				led@0 {
185					reg = <0>;
186					color = <LED_COLOR_ID_GREEN>;
187					function = LED_FUNCTION_LAN;
188					default-state = "keep";
189				};
190
191				led@1 {
192					reg = <1>;
193					color = <LED_COLOR_ID_ORANGE>;
194					function = LED_FUNCTION_ACTIVITY;
195					default-state = "keep";
196				};
197			};
198		};
199
200		switch0phy10: ethernet-phy@10 {
201			reg = <10>;
202
203			leds {
204				#address-cells = <1>;
205				#size-cells = <0>;
206
207				led@0 {
208					reg = <0>;
209					color = <LED_COLOR_ID_GREEN>;
210					function = LED_FUNCTION_LAN;
211					default-state = "keep";
212				};
213
214				led@1 {
215					reg = <1>;
216					color = <LED_COLOR_ID_ORANGE>;
217					function = LED_FUNCTION_ACTIVITY;
218					default-state = "keep";
219				};
220			};
221		};
222	};
223};
224
225&switch_port2 {
226	label = "lan2";
227	phy-mode = "rgmii-id";
228	phy-handle = <&switch0phy10>;
229	status = "okay";
230};
231
232&switch_port3 {
233	label = "lan3";
234	phy-mode = "rgmii-id";
235	phy-handle = <&switch0phy1>;
236	status = "okay";
237};
238
239&uart2 {
240	pinctrl-0 = <&pins_uart2>;
241	pinctrl-names = "default";
242	status = "okay";
243	uart-has-rtscts;
244};
245