xref: /linux/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi (revision b2128290c29902315e632ea59e0504d6bc9e9b42)
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Support for Variscite Concerto Carrier board with the VAR-SOM-6UL
4 * Variscite SoM mounted on it (all CPU variants)
5 *
6 * Copyright 2019 Variscite Ltd.
7 * Copyright 2025 Bootlin
8 */
9
10#include <dt-bindings/leds/common.h>
11
12/ {
13	chosen {
14		stdout-path = &uart1;
15	};
16
17	gpio-keys {
18		compatible = "gpio-keys";
19		pinctrl-names = "default";
20		pinctrl-0 = <&pinctrl_gpio_key_back>, <&pinctrl_gpio_key_wakeup>;
21
22		key-back {
23			gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
24			linux,code = <KEY_BACK>;
25		};
26
27		key-wakeup {
28			gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
29			linux,code = <KEY_WAKEUP>;
30			wakeup-source;
31		};
32	};
33
34	leds {
35		compatible = "gpio-leds";
36		pinctrl-names = "default";
37		pinctrl-0 = <&pinctrl_gpio_leds>;
38
39		led-0 {
40			function = LED_FUNCTION_STATUS;
41			color = <LED_COLOR_ID_GREEN>;
42			label = "gpled2";
43			gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
44			linux,default-trigger = "heartbeat";
45		};
46	};
47
48	lvds_panel: lvds-panel {
49		compatible = "sgd,gktw70sdae4se", "panel-lvds";
50		data-mapping = "jeida-18";
51		width-mm = <153>;
52		height-mm = <86>;
53
54		panel-timing {
55			clock-frequency = <35000000>;
56			hactive = <800>;
57			vactive = <480>;
58			hback-porch = <40>;
59			hfront-porch = <40>;
60			vback-porch = <29>;
61			vfront-porch = <13>;
62			hsync-len = <48>;
63			vsync-len = <3>;
64			hsync-active = <0>;
65			vsync-active = <0>;
66			de-active = <1>;
67			pixelclk-active = <0>;
68		};
69	};
70};
71
72&can1 {
73	pinctrl-names = "default";
74	pinctrl-0 = <&pinctrl_flexcan1>;
75	status = "okay";
76};
77
78&i2c1 {
79	clock-frequency = <100000>;
80	pinctrl-names = "default";
81	pinctrl-0 = <&pinctrl_i2c1>;
82	status = "okay";
83
84	rtc@68 {
85		/*
86		 * To actually use this interrupt
87		 * connect pins J14.8 & J14.10 on the Concerto-Board.
88		 */
89		compatible = "dallas,ds1337";
90		reg = <0x68>;
91		pinctrl-names = "default";
92		pinctrl-0 = <&pinctrl_rtc>;
93		interrupt-parent = <&gpio1>;
94		interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
95	};
96};
97
98&iomuxc {
99	pinctrl_flexcan1: flexcan1grp {
100		fsl,pins = <
101			MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX	0x1b020
102			MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX	0x1b020
103		>;
104	};
105
106	pinctrl_gpio_key_back: gpio-key-backgrp {
107		fsl,pins = <
108			MX6UL_PAD_NAND_CE1_B__GPIO4_IO14	0x17059
109		>;
110	};
111
112	pinctrl_gpio_key_wakeup: gpio-keys-wakeupgrp {
113		fsl,pins = <
114			MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08	0x17059
115		>;
116	};
117
118	pinctrl_gpio_leds: gpio-ledsgrp {
119		fsl,pins = <
120			MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25	0x1b0b0	/* GPLED2 */
121		>;
122	};
123
124	pinctrl_rtc: rtcgrp {
125		fsl,pins = <
126			MX6UL_PAD_JTAG_MOD__GPIO1_IO10		0x1b0b0 /* RTC alarm IRQ */
127		>;
128	};
129
130	pinctrl_uart1: uart1grp {
131		fsl,pins = <
132			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	0x1b0b1
133			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	0x1b0b1
134		>;
135	};
136
137	pinctrl_uart5: uart5grp {
138		fsl,pins = <
139			MX6UL_PAD_CSI_DATA00__UART5_DCE_TX	0x1b0b1
140			MX6UL_PAD_CSI_DATA01__UART5_DCE_RX	0x1b0b1
141			MX6UL_PAD_GPIO1_IO09__UART5_DCE_CTS	0x1b0b1
142			MX6UL_PAD_GPIO1_IO08__UART5_DCE_RTS	0x1b0b1
143		>;
144	};
145
146	pinctrl_usb_otg1_id: usbotg1idgrp {
147		fsl,pins = <
148			MX6UL_PAD_UART3_TX_DATA__ANATOP_OTG1_ID	0x17059
149		>;
150	};
151
152	pinctrl_wdog: wdoggrp {
153		fsl,pins = <
154			MX6UL_PAD_GPIO1_IO01__WDOG1_WDOG_B	0x78b0
155		>;
156	};
157};
158
159&snvs_pwrkey {
160	status = "disabled";
161};
162
163&snvs_rtc {
164	status = "disabled";
165};
166
167&tsc {
168	/*
169	 * Conflics with wdog1 ext-reset-output & SD CD pins,
170	 * so we keep it disabled by default.
171	 */
172	status = "disabled";
173};
174
175/* Console UART */
176&uart1 {
177	pinctrl-names = "default";
178	pinctrl-0 = <&pinctrl_uart1>;
179	status = "okay";
180};
181
182/* ttymxc4 UART */
183&uart5 {
184	pinctrl-names = "default";
185	pinctrl-0 = <&pinctrl_uart5>;
186	uart-has-rtscts;
187	status = "okay";
188};
189
190&usbotg1 {
191	pinctrl-names = "default";
192	pinctrl-0 = <&pinctrl_usb_otg1_id>;
193	dr_mode = "otg";
194	disable-over-current;
195	srp-disable;
196	hnp-disable;
197	adp-disable;
198	status = "okay";
199};
200
201&usbotg2 {
202	dr_mode = "host";
203	disable-over-current;
204	status = "okay";
205};
206
207&wdog1 {
208	pinctrl-names = "default";
209	pinctrl-0 = <&pinctrl_wdog>;
210	/*
211	 * To actually use ext-reset-output
212	 * connect pins J17.3 & J17.8 on the Concerto-Board
213	 */
214	fsl,ext-reset-output;
215};
216