1// SPDX-License-Identifier: GPL-2.0 OR X11 2/* 3 * Copyright 2013 Boundary Devices, Inc. 4 * Copyright 2011 Freescale Semiconductor, Inc. 5 * Copyright 2011 Linaro Ltd. 6 */ 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/input/input.h> 9 10/ { 11 chosen { 12 stdout-path = &uart2; 13 }; 14 15 memory@10000000 { 16 device_type = "memory"; 17 reg = <0x10000000 0x40000000>; 18 }; 19 20 regulators { 21 compatible = "simple-bus"; 22 #address-cells = <1>; 23 #size-cells = <0>; 24 25 reg_2p5v: regulator@0 { 26 compatible = "regulator-fixed"; 27 reg = <0>; 28 regulator-name = "2P5V"; 29 regulator-min-microvolt = <2500000>; 30 regulator-max-microvolt = <2500000>; 31 regulator-always-on; 32 }; 33 34 reg_3p3v: regulator@1 { 35 compatible = "regulator-fixed"; 36 reg = <1>; 37 regulator-name = "3P3V"; 38 regulator-min-microvolt = <3300000>; 39 regulator-max-microvolt = <3300000>; 40 regulator-always-on; 41 }; 42 43 reg_usb_otg_vbus: regulator@2 { 44 compatible = "regulator-fixed"; 45 reg = <2>; 46 regulator-name = "usb_otg_vbus"; 47 regulator-min-microvolt = <5000000>; 48 regulator-max-microvolt = <5000000>; 49 gpio = <&gpio3 22 0>; 50 enable-active-high; 51 }; 52 53 reg_can_xcvr: regulator@3 { 54 compatible = "regulator-fixed"; 55 reg = <3>; 56 regulator-name = "CAN XCVR"; 57 regulator-min-microvolt = <3300000>; 58 regulator-max-microvolt = <3300000>; 59 pinctrl-names = "default"; 60 pinctrl-0 = <&pinctrl_can_xcvr>; 61 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; 62 }; 63 64 reg_wlan_vmmc: regulator@4 { 65 compatible = "regulator-fixed"; 66 reg = <4>; 67 pinctrl-names = "default"; 68 pinctrl-0 = <&pinctrl_wlan_vmmc>; 69 regulator-name = "reg_wlan_vmmc"; 70 regulator-min-microvolt = <3300000>; 71 regulator-max-microvolt = <3300000>; 72 gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>; 73 startup-delay-us = <70000>; 74 enable-active-high; 75 }; 76 77 reg_usb_h1_vbus: regulator@5 { 78 compatible = "regulator-fixed"; 79 reg = <5>; 80 pinctrl-names = "default"; 81 pinctrl-0 = <&pinctrl_usbh1>; 82 regulator-name = "usb_h1_vbus"; 83 regulator-min-microvolt = <3300000>; 84 regulator-max-microvolt = <3300000>; 85 gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; 86 enable-active-high; 87 }; 88 }; 89 90 gpio-keys { 91 compatible = "gpio-keys"; 92 pinctrl-names = "default"; 93 pinctrl-0 = <&pinctrl_gpio_keys>; 94 95 power { 96 label = "Power Button"; 97 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; 98 linux,code = <KEY_POWER>; 99 wakeup-source; 100 }; 101 102 menu { 103 label = "Menu"; 104 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; 105 linux,code = <KEY_MENU>; 106 }; 107 108 home { 109 label = "Home"; 110 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; 111 linux,code = <KEY_HOME>; 112 }; 113 114 back { 115 label = "Back"; 116 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; 117 linux,code = <KEY_BACK>; 118 }; 119 120 volume-up { 121 label = "Volume Up"; 122 gpios = <&gpio7 13 GPIO_ACTIVE_LOW>; 123 linux,code = <KEY_VOLUMEUP>; 124 }; 125 126 volume-down { 127 label = "Volume Down"; 128 gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; 129 linux,code = <KEY_VOLUMEDOWN>; 130 }; 131 }; 132 133 sound { 134 compatible = "fsl,imx6q-nitrogen6x-sgtl5000", 135 "fsl,imx-audio-sgtl5000"; 136 model = "imx6q-nitrogen6x-sgtl5000"; 137 ssi-controller = <&ssi1>; 138 audio-codec = <&codec>; 139 audio-routing = 140 "MIC_IN", "Mic Jack", 141 "Mic Jack", "Mic Bias", 142 "Headphone Jack", "HP_OUT"; 143 mux-int-port = <1>; 144 mux-ext-port = <3>; 145 }; 146 147 backlight_lcd: backlight-lcd { 148 compatible = "pwm-backlight"; 149 pwms = <&pwm1 0 5000000>; 150 brightness-levels = <0 4 8 16 32 64 128 255>; 151 default-brightness-level = <7>; 152 power-supply = <®_3p3v>; 153 status = "okay"; 154 }; 155 156 backlight_lvds: backlight-lvds { 157 compatible = "pwm-backlight"; 158 pwms = <&pwm4 0 5000000>; 159 brightness-levels = <0 4 8 16 32 64 128 255>; 160 default-brightness-level = <7>; 161 power-supply = <®_3p3v>; 162 status = "okay"; 163 }; 164 165 lcd_display: disp0 { 166 compatible = "fsl,imx-parallel-display"; 167 #address-cells = <1>; 168 #size-cells = <0>; 169 interface-pix-fmt = "bgr666"; 170 pinctrl-names = "default"; 171 pinctrl-0 = <&pinctrl_j15>; 172 status = "okay"; 173 174 port@0 { 175 reg = <0>; 176 177 lcd_display_in: endpoint { 178 remote-endpoint = <&ipu1_di0_disp0>; 179 }; 180 }; 181 182 port@1 { 183 reg = <1>; 184 185 lcd_display_out: endpoint { 186 remote-endpoint = <&lcd_panel_in>; 187 }; 188 }; 189 }; 190 191 panel-lcd { 192 compatible = "okaya,rs800480t-7x0gp"; 193 backlight = <&backlight_lcd>; 194 195 port { 196 lcd_panel_in: endpoint { 197 remote-endpoint = <&lcd_display_out>; 198 }; 199 }; 200 }; 201 202 panel-lvds0 { 203 compatible = "hannstar,hsd100pxn1"; 204 backlight = <&backlight_lvds>; 205 206 port { 207 panel_in: endpoint { 208 remote-endpoint = <&lvds0_out>; 209 }; 210 }; 211 }; 212}; 213 214&audmux { 215 pinctrl-names = "default"; 216 pinctrl-0 = <&pinctrl_audmux>; 217 status = "okay"; 218}; 219 220&can1 { 221 pinctrl-names = "default"; 222 pinctrl-0 = <&pinctrl_can1>; 223 xceiver-supply = <®_can_xcvr>; 224 status = "okay"; 225}; 226 227&clks { 228 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, 229 <&clks IMX6QDL_CLK_LDB_DI1_SEL>; 230 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, 231 <&clks IMX6QDL_CLK_PLL3_USB_OTG>; 232}; 233 234&ecspi1 { 235 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; 236 pinctrl-names = "default"; 237 pinctrl-0 = <&pinctrl_ecspi1>; 238 status = "okay"; 239 240 flash: flash@0 { 241 compatible = "sst,sst25vf016b", "jedec,spi-nor"; 242 spi-max-frequency = <20000000>; 243 reg = <0>; 244 #address-cells = <1>; 245 #size-cells = <1>; 246 247 partition@0 { 248 label = "bootloader"; 249 reg = <0x0 0xc0000>; 250 }; 251 252 partition@c0000 { 253 label = "env"; 254 reg = <0xc0000 0x2000>; 255 }; 256 257 partition@c2000 { 258 label = "splash"; 259 reg = <0xc2000 0x13e000>; 260 }; 261 }; 262}; 263 264&fec { 265 pinctrl-names = "default"; 266 pinctrl-0 = <&pinctrl_enet>; 267 phy-mode = "rgmii"; 268 phy-handle = <ðphy>; 269 phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; 270 /delete-property/ interrupts; 271 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 272 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 273 fsl,err006687-workaround-present; 274 status = "okay"; 275 276 mdio { 277 #address-cells = <1>; 278 #size-cells = <0>; 279 280 ethphy: ethernet-phy { 281 compatible = "ethernet-phy-ieee802.3-c22"; 282 txen-skew-ps = <0>; 283 txc-skew-ps = <3000>; 284 rxdv-skew-ps = <0>; 285 rxc-skew-ps = <3000>; 286 rxd0-skew-ps = <0>; 287 rxd1-skew-ps = <0>; 288 rxd2-skew-ps = <0>; 289 rxd3-skew-ps = <0>; 290 txd0-skew-ps = <0>; 291 txd1-skew-ps = <0>; 292 txd2-skew-ps = <0>; 293 txd3-skew-ps = <0>; 294 }; 295 }; 296}; 297 298&hdmi { 299 ddc-i2c-bus = <&i2c2>; 300 status = "okay"; 301}; 302 303&i2c1 { 304 clock-frequency = <100000>; 305 pinctrl-names = "default"; 306 pinctrl-0 = <&pinctrl_i2c1>; 307 status = "okay"; 308 309 codec: sgtl5000@a { 310 compatible = "fsl,sgtl5000"; 311 reg = <0x0a>; 312 clocks = <&clks IMX6QDL_CLK_CKO>; 313 VDDA-supply = <®_2p5v>; 314 VDDIO-supply = <®_3p3v>; 315 }; 316 317 rtc: rtc@6f { 318 compatible = "isil,isl1208"; 319 reg = <0x6f>; 320 }; 321}; 322 323&i2c2 { 324 clock-frequency = <100000>; 325 pinctrl-names = "default"; 326 pinctrl-0 = <&pinctrl_i2c2>; 327 status = "okay"; 328}; 329 330&i2c3 { 331 clock-frequency = <100000>; 332 pinctrl-names = "default"; 333 pinctrl-0 = <&pinctrl_i2c3>; 334 status = "okay"; 335 336 touchscreen@4 { 337 compatible = "eeti,egalax_ts"; 338 reg = <0x04>; 339 interrupt-parent = <&gpio1>; 340 interrupts = <9 IRQ_TYPE_EDGE_FALLING>; 341 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; 342 }; 343 344 touchscreen@38 { 345 compatible = "edt,edt-ft5x06"; 346 reg = <0x38>; 347 interrupt-parent = <&gpio1>; 348 interrupts = <9 IRQ_TYPE_EDGE_FALLING>; 349 wakeup-source; 350 }; 351}; 352 353&iomuxc { 354 pinctrl-names = "default"; 355 pinctrl-0 = <&pinctrl_hog>; 356 357 imx6q-nitrogen6x { 358 pinctrl_hog: hoggrp { 359 fsl,pins = < 360 /* SGTL5000 sys_mclk */ 361 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0 362 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 363 >; 364 }; 365 366 pinctrl_audmux: audmuxgrp { 367 fsl,pins = < 368 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 369 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 370 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 371 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 372 >; 373 }; 374 375 pinctrl_can1: can1grp { 376 fsl,pins = < 377 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0 378 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0 379 >; 380 }; 381 382 pinctrl_can_xcvr: can-xcvrgrp { 383 fsl,pins = < 384 /* Flexcan XCVR enable */ 385 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 386 >; 387 }; 388 389 pinctrl_ecspi1: ecspi1grp { 390 fsl,pins = < 391 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 392 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 393 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 394 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */ 395 >; 396 }; 397 398 pinctrl_enet: enetgrp { 399 fsl,pins = < 400 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 401 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 402 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 403 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 404 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 405 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 406 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 407 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 408 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 409 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 410 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 411 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 412 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 413 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 414 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 415 /* Phy reset */ 416 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0 417 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 418 >; 419 }; 420 421 pinctrl_gpio_keys: gpio-keysgrp { 422 fsl,pins = < 423 /* Power Button */ 424 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 425 /* Menu Button */ 426 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 427 /* Home Button */ 428 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 429 /* Back Button */ 430 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 431 /* Volume Up Button */ 432 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 433 /* Volume Down Button */ 434 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 435 >; 436 }; 437 438 pinctrl_i2c1: i2c1grp { 439 fsl,pins = < 440 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 441 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 442 >; 443 }; 444 445 pinctrl_i2c2: i2c2grp { 446 fsl,pins = < 447 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 448 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 449 >; 450 }; 451 452 pinctrl_i2c3: i2c3grp { 453 fsl,pins = < 454 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 455 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 456 >; 457 }; 458 459 pinctrl_j15: j15grp { 460 fsl,pins = < 461 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 462 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 463 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 464 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 465 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 466 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 467 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 468 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 469 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 470 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 471 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 472 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 473 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 474 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 475 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 476 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 477 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 478 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 479 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 480 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 481 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 482 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 483 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 484 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 485 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 486 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 487 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 488 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 489 >; 490 }; 491 492 pinctrl_pwm1: pwm1grp { 493 fsl,pins = < 494 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 495 >; 496 }; 497 498 pinctrl_pwm3: pwm3grp { 499 fsl,pins = < 500 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 501 >; 502 }; 503 504 pinctrl_pwm4: pwm4grp { 505 fsl,pins = < 506 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 507 >; 508 }; 509 510 pinctrl_uart1: uart1grp { 511 fsl,pins = < 512 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 513 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 514 >; 515 }; 516 517 pinctrl_uart2: uart2grp { 518 fsl,pins = < 519 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 520 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 521 >; 522 }; 523 524 pinctrl_usbh1: usbh1grp { 525 fsl,pins = < 526 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x030b0 527 >; 528 }; 529 530 pinctrl_usbotg: usbotggrp { 531 fsl,pins = < 532 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 533 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0 534 /* power enable, high active */ 535 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0 536 >; 537 }; 538 539 pinctrl_usdhc2: usdhc2grp { 540 fsl,pins = < 541 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17071 542 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071 543 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17071 544 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071 545 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071 546 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071 547 >; 548 }; 549 550 pinctrl_usdhc3: usdhc3grp { 551 fsl,pins = < 552 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 553 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 554 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 555 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 556 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 557 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 558 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */ 559 >; 560 }; 561 562 pinctrl_usdhc4: usdhc4grp { 563 fsl,pins = < 564 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 565 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 566 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 567 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 568 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 569 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 570 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */ 571 >; 572 }; 573 574 pinctrl_wlan_vmmc: wlan-vmmcgrp { 575 fsl,pins = < 576 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x100b0 577 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x000b0 578 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x000b0 579 MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0 580 >; 581 }; 582 }; 583}; 584 585&ipu1_di0_disp0 { 586 remote-endpoint = <&lcd_display_in>; 587}; 588 589&ldb { 590 status = "okay"; 591 592 lvds-channel@0 { 593 status = "okay"; 594 595 port@4 { 596 reg = <4>; 597 598 lvds0_out: endpoint { 599 remote-endpoint = <&panel_in>; 600 }; 601 }; 602 }; 603}; 604 605&pcie { 606 status = "okay"; 607}; 608 609&pwm1 { 610 #pwm-cells = <2>; 611 pinctrl-names = "default"; 612 pinctrl-0 = <&pinctrl_pwm1>; 613 status = "okay"; 614}; 615 616&pwm3 { 617 pinctrl-names = "default"; 618 pinctrl-0 = <&pinctrl_pwm3>; 619 status = "okay"; 620}; 621 622&pwm4 { 623 #pwm-cells = <2>; 624 pinctrl-names = "default"; 625 pinctrl-0 = <&pinctrl_pwm4>; 626 status = "okay"; 627}; 628 629&ssi1 { 630 status = "okay"; 631}; 632 633&uart1 { 634 pinctrl-names = "default"; 635 pinctrl-0 = <&pinctrl_uart1>; 636 status = "okay"; 637}; 638 639&uart2 { 640 pinctrl-names = "default"; 641 pinctrl-0 = <&pinctrl_uart2>; 642 status = "okay"; 643}; 644 645&usbh1 { 646 vbus-supply = <®_usb_h1_vbus>; 647 status = "okay"; 648}; 649 650&usbotg { 651 vbus-supply = <®_usb_otg_vbus>; 652 pinctrl-names = "default"; 653 pinctrl-0 = <&pinctrl_usbotg>; 654 disable-over-current; 655 status = "okay"; 656}; 657 658&usdhc2 { 659 pinctrl-names = "default"; 660 pinctrl-0 = <&pinctrl_usdhc2>; 661 bus-width = <4>; 662 non-removable; 663 vmmc-supply = <®_wlan_vmmc>; 664 cap-power-off-card; 665 keep-power-in-suspend; 666 status = "okay"; 667 668 #address-cells = <1>; 669 #size-cells = <0>; 670 wlcore: wlcore@2 { 671 compatible = "ti,wl1271"; 672 reg = <2>; 673 interrupt-parent = <&gpio6>; 674 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; 675 ref-clock-frequency = <38400000>; 676 }; 677}; 678 679&usdhc3 { 680 pinctrl-names = "default"; 681 pinctrl-0 = <&pinctrl_usdhc3>; 682 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; 683 vmmc-supply = <®_3p3v>; 684 status = "okay"; 685}; 686 687&usdhc4 { 688 pinctrl-names = "default"; 689 pinctrl-0 = <&pinctrl_usdhc4>; 690 cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; 691 vmmc-supply = <®_3p3v>; 692 status = "okay"; 693}; 694