1/* 2 * Copyright 2013 CompuLab Ltd. 3 * 4 * Author: Valentin Raevsky <valentin@compulab.co.il> 5 * 6 * This file is dual-licensed: you can use it either under the terms 7 * of the GPL or the X11 license, at your option. Note that this dual 8 * licensing only applies to this file, and not this project as a 9 * whole. 10 * 11 * a) This file is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License 13 * version 2 as published by the Free Software Foundation. 14 * 15 * This file is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * Or, alternatively, 21 * 22 * b) Permission is hereby granted, free of charge, to any person 23 * obtaining a copy of this software and associated documentation 24 * files (the "Software"), to deal in the Software without 25 * restriction, including without limitation the rights to use, 26 * copy, modify, merge, publish, distribute, sublicense, and/or 27 * sell copies of the Software, and to permit persons to whom the 28 * Software is furnished to do so, subject to the following 29 * conditions: 30 * 31 * The above copyright notice and this permission notice shall be 32 * included in all copies or substantial portions of the Software. 33 * 34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 41 * OTHER DEALINGS IN THE SOFTWARE. 42 */ 43 44/dts-v1/; 45#include <dt-bindings/gpio/gpio.h> 46#include <dt-bindings/sound/fsl-imx-audmux.h> 47#include "imx6q.dtsi" 48 49/ { 50 model = "CompuLab CM-FX6"; 51 compatible = "compulab,cm-fx6", "fsl,imx6q"; 52 53 memory@10000000 { 54 device_type = "memory"; 55 reg = <0x10000000 0x80000000>; 56 }; 57 58 leds { 59 compatible = "gpio-leds"; 60 61 heartbeat-led { 62 label = "Heartbeat"; 63 gpios = <&gpio2 31 0>; 64 linux,default-trigger = "heartbeat"; 65 }; 66 }; 67 68 awnh387_pwrseq: pwrseq { 69 pinctrl-names = "default"; 70 pinctrl-0 = <&pinctrl_pwrseq>; 71 compatible = "mmc-pwrseq-sd8787"; 72 powerdown-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>; 73 reset-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; 74 }; 75 76 reg_pcie_power_on_gpio: regulator-pcie-power-on-gpio { 77 compatible = "regulator-fixed"; 78 regulator-name = "regulator-pcie-power-on-gpio"; 79 regulator-min-microvolt = <3300000>; 80 regulator-max-microvolt = <3300000>; 81 gpio = <&gpio2 24 GPIO_ACTIVE_LOW>; 82 }; 83 84 reg_usb_h1_vbus: usb_h1_vbus { 85 compatible = "regulator-fixed"; 86 regulator-name = "usb_h1_vbus"; 87 regulator-min-microvolt = <5000000>; 88 regulator-max-microvolt = <5000000>; 89 gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>; 90 enable-active-high; 91 }; 92 93 reg_usb_otg_vbus: usb_otg_vbus { 94 compatible = "regulator-fixed"; 95 regulator-name = "usb_otg_vbus"; 96 regulator-min-microvolt = <5000000>; 97 regulator-max-microvolt = <5000000>; 98 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 99 enable-active-high; 100 }; 101 102 sound-analog { 103 compatible = "simple-audio-card"; 104 simple-audio-card,name = "On-board analog audio"; 105 simple-audio-card,widgets = 106 "Headphone", "Headphone Jack", 107 "Line", "Line Out", 108 "Microphone", "Mic Jack", 109 "Line", "Line In"; 110 simple-audio-card,routing = 111 "Headphone Jack", "RHPOUT", 112 "Headphone Jack", "LHPOUT", 113 "MICIN", "Mic Bias", 114 "Mic Bias", "Mic Jack"; 115 simple-audio-card,format = "i2s"; 116 simple-audio-card,bitclock-master = <&sound_master>; 117 simple-audio-card,frame-master = <&sound_master>; 118 simple-audio-card,bitclock-inversion; 119 120 sound_master: simple-audio-card,cpu { 121 sound-dai = <&ssi2>; 122 system-clock-frequency = <2822400>; 123 }; 124 125 simple-audio-card,codec { 126 sound-dai = <&wm8731>; 127 }; 128 }; 129 130 spdif_out: spdif-out { 131 compatible = "linux,spdif-dit"; 132 #sound-dai-cells = <0>; 133 }; 134 135 spdif_in: spdif-in { 136 compatible = "linux,spdif-dir"; 137 #sound-dai-cells = <0>; 138 }; 139 140 sound-spdif { 141 compatible = "fsl,imx-audio-spdif"; 142 model = "imx-spdif"; 143 audio-cpu = <&spdif>; 144 audio-codec = <&spdif_out>, <&spdif_in>; 145 }; 146}; 147 148&audmux { 149 pinctrl-names = "default"; 150 pinctrl-0 = <&pinctrl_audmux>; 151 status = "okay"; 152 153 mux-ssi2 { 154 fsl,audmux-port = <1>; 155 fsl,port-config = < 156 (IMX_AUDMUX_V2_PTCR_RCLKDIR | 157 IMX_AUDMUX_V2_PTCR_RCSEL(3 | 0x8) | 158 IMX_AUDMUX_V2_PTCR_TCLKDIR | 159 IMX_AUDMUX_V2_PTCR_TCSEL(3)) 160 IMX_AUDMUX_V2_PDCR_RXDSEL(3) 161 >; 162 }; 163 164 mux-audmux4 { 165 fsl,audmux-port = <3>; 166 fsl,port-config = < 167 (IMX_AUDMUX_V2_PTCR_TFSDIR | 168 IMX_AUDMUX_V2_PTCR_TFSEL(1) | 169 IMX_AUDMUX_V2_PTCR_RCLKDIR | 170 IMX_AUDMUX_V2_PTCR_RCSEL(1 | 0x8) | 171 IMX_AUDMUX_V2_PTCR_TCLKDIR | 172 IMX_AUDMUX_V2_PTCR_TCSEL(1)) 173 IMX_AUDMUX_V2_PDCR_RXDSEL(1) 174 >; 175 }; 176}; 177 178&cpu0 { 179 /* 180 * Although the imx6q fuse indicates that 1.2GHz operation is possible, 181 * the module behaves unstable at this frequency. Hence, remove the 182 * 1.2GHz operation point here. 183 */ 184 operating-points = < 185 /* kHz uV */ 186 996000 1250000 187 852000 1250000 188 792000 1175000 189 396000 975000 190 >; 191 fsl,soc-operating-points = < 192 /* ARM kHz SOC-PU uV */ 193 996000 1250000 194 852000 1250000 195 792000 1175000 196 396000 1175000 197 >; 198}; 199 200&cpu1 { 201 /* 202 * Although the imx6q fuse indicates that 1.2GHz operation is possible, 203 * the module behaves unstable at this frequency. Hence, remove the 204 * 1.2GHz operation point here. 205 */ 206 operating-points = < 207 /* kHz uV */ 208 996000 1250000 209 852000 1250000 210 792000 1175000 211 396000 975000 212 >; 213 fsl,soc-operating-points = < 214 /* ARM kHz SOC-PU uV */ 215 996000 1250000 216 852000 1250000 217 792000 1175000 218 396000 1175000 219 >; 220}; 221 222&cpu2 { 223 /* 224 * Although the imx6q fuse indicates that 1.2GHz operation is possible, 225 * the module behaves unstable at this frequency. Hence, remove the 226 * 1.2GHz operation point here. 227 */ 228 operating-points = < 229 /* kHz uV */ 230 996000 1250000 231 852000 1250000 232 792000 1175000 233 396000 975000 234 >; 235 fsl,soc-operating-points = < 236 /* ARM kHz SOC-PU uV */ 237 996000 1250000 238 852000 1250000 239 792000 1175000 240 396000 1175000 241 >; 242}; 243 244&cpu3 { 245 /* 246 * Although the imx6q fuse indicates that 1.2GHz operation is possible, 247 * the module behaves unstable at this frequency. Hence, remove the 248 * 1.2GHz operation point here. 249 */ 250 operating-points = < 251 /* kHz uV */ 252 996000 1250000 253 852000 1250000 254 792000 1175000 255 396000 975000 256 >; 257 fsl,soc-operating-points = < 258 /* ARM kHz SOC-PU uV */ 259 996000 1250000 260 852000 1250000 261 792000 1175000 262 396000 1175000 263 >; 264}; 265 266&ecspi1 { 267 cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio3 19 GPIO_ACTIVE_LOW>; 268 pinctrl-names = "default"; 269 pinctrl-0 = <&pinctrl_ecspi1>; 270 status = "okay"; 271 272 flash@0 { 273 #address-cells = <1>; 274 #size-cells = <1>; 275 compatible = "jedec,spi-nor"; 276 spi-max-frequency = <20000000>; 277 reg = <0>; 278 }; 279}; 280 281&fec { 282 pinctrl-names = "default"; 283 pinctrl-0 = <&pinctrl_enet>; 284 phy-mode = "rgmii"; 285 status = "okay"; 286}; 287 288&gpmi { 289 pinctrl-names = "default"; 290 pinctrl-0 = <&pinctrl_gpmi_nand>; 291 status = "okay"; 292}; 293 294&i2c3 { 295 pinctrl-names = "default"; 296 pinctrl-0 = <&pinctrl_i2c3>; 297 status = "okay"; 298 clock-frequency = <100000>; 299 300 eeprom@50 { 301 compatible = "atmel,24c02"; 302 reg = <0x50>; 303 pagesize = <16>; 304 }; 305 306 wm8731: codec@1a { 307 #sound-dai-cells = <0>; 308 compatible = "wlf,wm8731"; 309 reg = <0x1a>; 310 }; 311}; 312 313&iomuxc { 314 pinctrl_audmux: audmuxgrp { 315 fsl,pins = < 316 MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 317 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 318 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 319 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 320 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 321 >; 322 }; 323 324 pinctrl_ecspi1: ecspi1grp { 325 fsl,pins = < 326 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 327 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 328 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 329 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 330 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 331 >; 332 }; 333 334 pinctrl_enet: enetgrp { 335 fsl,pins = < 336 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 337 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 338 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 339 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 340 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 341 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 342 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 343 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 344 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 345 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 346 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 347 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 348 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 349 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 350 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 351 >; 352 }; 353 354 pinctrl_gpmi_nand: gpminandgrp { 355 fsl,pins = < 356 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 357 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 358 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 359 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 360 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 361 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 362 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 363 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 364 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 365 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 366 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 367 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 368 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 369 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 370 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 371 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 372 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 373 >; 374 }; 375 376 pinctrl_i2c3: i2c3grp { 377 fsl,pins = < 378 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 379 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 380 >; 381 }; 382 383 pinctrl_pcie: pciegrp { 384 fsl,pins = < 385 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 386 MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1 387 >; 388 }; 389 390 pinctrl_pwrseq: pwrseqgrp { 391 fsl,pins = < 392 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 393 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0 394 >; 395 }; 396 397 pinctrl_spdif: spdifgrp { 398 fsl,pins = < 399 MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 400 MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 401 >; 402 }; 403 404 pinctrl_uart4: uart4grp { 405 fsl,pins = < 406 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 407 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 408 >; 409 }; 410 411 pinctrl_usbh1: usbh1grp { 412 fsl,pins = < 413 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b1 414 >; 415 }; 416 417 pinctrl_usbotg: usbotggrp { 418 fsl,pins = < 419 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 420 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0 421 >; 422 }; 423 424 pinctrl_usdhc1: usdhc1grp { 425 fsl,pins = < 426 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 427 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 428 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 429 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 430 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 431 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 432 >; 433 }; 434}; 435 436&pcie { 437 pinctrl-names = "default"; 438 pinctrl-0 = <&pinctrl_pcie>; 439 reset-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>; 440 vpcie-supply = <®_pcie_power_on_gpio>; 441 status = "okay"; 442}; 443 444&sata { 445 status = "okay"; 446}; 447 448&snvs_poweroff { 449 status = "okay"; 450}; 451 452&spdif { 453 pinctrl-names = "default"; 454 pinctrl-0 = <&pinctrl_spdif>; 455 status = "okay"; 456}; 457 458&ssi2 { 459 assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>, 460 <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>; 461 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>; 462 assigned-clock-rates = <0>, <786432000>; 463 status = "okay"; 464}; 465 466&uart4 { 467 pinctrl-names = "default"; 468 pinctrl-0 = <&pinctrl_uart4>; 469 status = "okay"; 470}; 471 472&usbh1 { 473 vbus-supply = <®_usb_h1_vbus>; 474 pinctrl-names = "default"; 475 pinctrl-0 = <&pinctrl_usbh1>; 476 status = "okay"; 477}; 478 479&usbotg { 480 vbus-supply = <®_usb_otg_vbus>; 481 pinctrl-names = "default"; 482 pinctrl-0 = <&pinctrl_usbotg>; 483 dr_mode = "otg"; 484 status = "okay"; 485}; 486 487&usdhc1 { 488 pinctrl-names = "default"; 489 pinctrl-0 = <&pinctrl_usdhc1>; 490 mmc-pwrseq = <&awnh387_pwrseq>; 491 non-removable; 492 /* 493 * If the OS probes the Bluetooth AMP function advertised on this bus 494 * but the firmware in place does not support it, the WiFi/BT module 495 * gets unresponsive. 496 * Users who configured their OS properly can enable this node to gain 497 * WiFi and/or plain Bluetooth support. 498 */ 499 status = "disabled"; 500}; 501