1# SPDX-License-Identifier: GPL-2.0 2dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ 3 socfpga_arria5_socdk.dtb \ 4 socfpga_arria10_chameleonv3.dtb \ 5 socfpga_arria10_mercury_aa1_pe1_emmc.dtb \ 6 socfpga_arria10_mercury_aa1_pe1_qspi.dtb \ 7 socfpga_arria10_mercury_aa1_pe1_sdmmc.dtb \ 8 socfpga_arria10_mercury_aa1_pe3_emmc.dtb \ 9 socfpga_arria10_mercury_aa1_pe3_qspi.dtb \ 10 socfpga_arria10_mercury_aa1_pe3_sdmmc.dtb \ 11 socfpga_arria10_mercury_aa1_st1_emmc.dtb \ 12 socfpga_arria10_mercury_aa1_st1_qspi.dtb \ 13 socfpga_arria10_mercury_aa1_st1_sdmmc.dtb \ 14 socfpga_cyclone5_mercury_sa1_pe1_emmc.dtb \ 15 socfpga_cyclone5_mercury_sa1_pe1_qspi.dtb \ 16 socfpga_cyclone5_mercury_sa1_pe1_sdmmc.dtb \ 17 socfpga_cyclone5_mercury_sa1_pe3_emmc.dtb \ 18 socfpga_cyclone5_mercury_sa1_pe3_qspi.dtb \ 19 socfpga_cyclone5_mercury_sa1_pe3_sdmmc.dtb \ 20 socfpga_cyclone5_mercury_sa1_st1_emmc.dtb \ 21 socfpga_cyclone5_mercury_sa1_st1_qspi.dtb \ 22 socfpga_cyclone5_mercury_sa1_st1_sdmmc.dtb \ 23 socfpga_cyclone5_mercury_sa2_pe1_qspi.dtb \ 24 socfpga_cyclone5_mercury_sa2_pe1_sdmmc.dtb \ 25 socfpga_cyclone5_mercury_sa2_pe3_qspi.dtb \ 26 socfpga_cyclone5_mercury_sa2_pe3_sdmmc.dtb \ 27 socfpga_cyclone5_mercury_sa2_st1_qspi.dtb \ 28 socfpga_cyclone5_mercury_sa2_st1_sdmmc.dtb \ 29 socfpga_arria10_socdk_nand.dtb \ 30 socfpga_arria10_socdk_qspi.dtb \ 31 socfpga_arria10_socdk_sdmmc.dtb \ 32 socfpga_cyclone5_chameleon96.dtb \ 33 socfpga_cyclone5_mcvevk.dtb \ 34 socfpga_cyclone5_socdk.dtb \ 35 socfpga_cyclone5_de0_nano_soc.dtb \ 36 socfpga_cyclone5_de10nano.dtb \ 37 socfpga_cyclone5_sockit.dtb \ 38 socfpga_cyclone5_socrates.dtb \ 39 socfpga_cyclone5_sodia.dtb \ 40 socfpga_cyclone5_vining_fpga.dtb \ 41 socfpga_vt.dtb 42