1// SPDX-License-Identifier: GPL-2.0+ 2/dts-v1/; 3#include "aspeed-g5.dtsi" 4#include <dt-bindings/gpio/aspeed-gpio.h> 5#include <dt-bindings/leds/leds-pca955x.h> 6 7/ { 8 model = "Swift BMC"; 9 compatible = "ibm,swift-bmc", "aspeed,ast2500"; 10 11 chosen { 12 stdout-path = &uart5; 13 bootargs = "console=ttyS4,115200 earlycon"; 14 }; 15 16 memory@80000000 { 17 reg = <0x80000000 0x20000000>; 18 }; 19 20 reserved-memory { 21 #address-cells = <1>; 22 #size-cells = <1>; 23 ranges; 24 25 flash_memory: region@98000000 { 26 no-map; 27 reg = <0x98000000 0x04000000>; /* 64M */ 28 }; 29 30 gfx_memory: framebuffer { 31 size = <0x01000000>; 32 alignment = <0x01000000>; 33 compatible = "shared-dma-pool"; 34 reusable; 35 }; 36 }; 37 38 gpio-keys { 39 compatible = "gpio-keys"; 40 41 event-air-water { 42 label = "air-water"; 43 gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>; 44 linux,code = <ASPEED_GPIO(B, 5)>; 45 }; 46 47 event-checkstop { 48 label = "checkstop"; 49 gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>; 50 linux,code = <ASPEED_GPIO(J, 2)>; 51 }; 52 53 event-ps0-presence { 54 label = "ps0-presence"; 55 gpios = <&gpio ASPEED_GPIO(R, 7) GPIO_ACTIVE_LOW>; 56 linux,code = <ASPEED_GPIO(R, 7)>; 57 }; 58 59 event-ps1-presence { 60 label = "ps1-presence"; 61 gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>; 62 linux,code = <ASPEED_GPIO(N, 0)>; 63 }; 64 65 event-oppanel-presence { 66 label = "oppanel-presence"; 67 gpios = <&gpio ASPEED_GPIO(A, 7) GPIO_ACTIVE_LOW>; 68 linux,code = <ASPEED_GPIO(A, 7)>; 69 }; 70 71 event-opencapi-riser-presence { 72 label = "opencapi-riser-presence"; 73 gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>; 74 linux,code = <ASPEED_GPIO(I, 0)>; 75 }; 76 }; 77 78 iio-hwmon-battery { 79 compatible = "iio-hwmon"; 80 io-channels = <&adc 12>; 81 }; 82 83 gpio-keys-polled { 84 compatible = "gpio-keys-polled"; 85 poll-interval = <1000>; 86 87 event-scm0-presence { 88 label = "scm0-presence"; 89 gpios = <&pca9552 6 GPIO_ACTIVE_LOW>; 90 linux,code = <6>; 91 }; 92 93 event-scm1-presence { 94 label = "scm1-presence"; 95 gpios = <&pca9552 7 GPIO_ACTIVE_LOW>; 96 linux,code = <7>; 97 }; 98 99 event-cpu0vrm-presence { 100 label = "cpu0vrm-presence"; 101 gpios = <&pca9552 12 GPIO_ACTIVE_LOW>; 102 linux,code = <12>; 103 }; 104 105 event-cpu1vrm-presence { 106 label = "cpu1vrm-presence"; 107 gpios = <&pca9552 13 GPIO_ACTIVE_LOW>; 108 linux,code = <13>; 109 }; 110 111 event-fan0-presence { 112 label = "fan0-presence"; 113 gpios = <&pca0 5 GPIO_ACTIVE_LOW>; 114 linux,code = <5>; 115 }; 116 117 event-fan1-presence { 118 label = "fan1-presence"; 119 gpios = <&pca0 6 GPIO_ACTIVE_LOW>; 120 linux,code = <6>; 121 }; 122 123 event-fan2-presence { 124 label = "fan2-presence"; 125 gpios = <&pca0 7 GPIO_ACTIVE_LOW>; 126 linux,code = <7>; 127 }; 128 129 event-fan3-presence { 130 label = "fan3-presence"; 131 gpios = <&pca0 8 GPIO_ACTIVE_LOW>; 132 linux,code = <8>; 133 }; 134 135 event-fanboost-presence { 136 label = "fanboost-presence"; 137 gpios = <&pca0 9 GPIO_ACTIVE_LOW>; 138 linux,code = <9>; 139 }; 140 }; 141 142 leds { 143 compatible = "gpio-leds"; 144 145 fan0 { 146 retain-state-shutdown; 147 default-state = "keep"; 148 gpios = <&pca0 0 GPIO_ACTIVE_LOW>; 149 }; 150 151 fan1 { 152 retain-state-shutdown; 153 default-state = "keep"; 154 gpios = <&pca0 1 GPIO_ACTIVE_LOW>; 155 }; 156 157 fan2 { 158 retain-state-shutdown; 159 default-state = "keep"; 160 gpios = <&pca0 2 GPIO_ACTIVE_LOW>; 161 }; 162 163 fan3 { 164 retain-state-shutdown; 165 default-state = "keep"; 166 gpios = <&pca0 3 GPIO_ACTIVE_LOW>; 167 }; 168 169 fanboost { 170 retain-state-shutdown; 171 default-state = "keep"; 172 gpios = <&pca0 4 GPIO_ACTIVE_LOW>; 173 }; 174 175 front-fault { 176 retain-state-shutdown; 177 default-state = "keep"; 178 gpios = <&pca1 2 GPIO_ACTIVE_LOW>; 179 }; 180 181 front-power { 182 retain-state-shutdown; 183 default-state = "keep"; 184 gpios = <&pca1 3 GPIO_ACTIVE_LOW>; 185 }; 186 187 front-id { 188 retain-state-shutdown; 189 default-state = "keep"; 190 gpios = <&pca1 0 GPIO_ACTIVE_LOW>; 191 }; 192 193 rear-fault { 194 gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>; 195 }; 196 197 rear-id { 198 gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>; 199 }; 200 }; 201 202 fsi: gpio-fsi { 203 compatible = "fsi-master-gpio", "fsi-master"; 204 #address-cells = <2>; 205 #size-cells = <0>; 206 no-gpio-delays; 207 208 clock-gpios = <&gpio ASPEED_GPIO(P, 1) GPIO_ACTIVE_HIGH>; 209 data-gpios = <&gpio ASPEED_GPIO(P, 2) GPIO_ACTIVE_HIGH>; 210 mux-gpios = <&gpio ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>; 211 enable-gpios = <&gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>; 212 trans-gpios = <&gpio ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>; 213 }; 214 215 iio-hwmon-dps310 { 216 compatible = "iio-hwmon"; 217 io-channels = <&dps 0>; 218 }; 219 220}; 221 222&fmc { 223 status = "okay"; 224 225 flash@0 { 226 status = "okay"; 227 label = "bmc"; 228 m25p,fast-read; 229 spi-max-frequency = <100000000>; 230 partitions { 231 #address-cells = < 1 >; 232 #size-cells = < 1 >; 233 compatible = "fixed-partitions"; 234 u-boot@0 { 235 reg = < 0 0x60000 >; 236 label = "u-boot"; 237 }; 238 u-boot-env@60000 { 239 reg = < 0x60000 0x20000 >; 240 label = "u-boot-env"; 241 }; 242 obmc-ubi@80000 { 243 reg = < 0x80000 0x7F80000>; 244 label = "obmc-ubi"; 245 }; 246 }; 247 }; 248 249 flash@1 { 250 status = "okay"; 251 label = "alt-bmc"; 252 m25p,fast-read; 253 spi-max-frequency = <100000000>; 254 partitions { 255 #address-cells = < 1 >; 256 #size-cells = < 1 >; 257 compatible = "fixed-partitions"; 258 u-boot@0 { 259 reg = < 0 0x60000 >; 260 label = "alt-u-boot"; 261 }; 262 u-boot-env@60000 { 263 reg = < 0x60000 0x20000 >; 264 label = "alt-u-boot-env"; 265 }; 266 obmc-ubi@80000 { 267 reg = < 0x80000 0x7F80000>; 268 label = "alt-obmc-ubi"; 269 }; 270 }; 271 }; 272}; 273 274&spi1 { 275 status = "okay"; 276 pinctrl-names = "default"; 277 pinctrl-0 = <&pinctrl_spi1_default>; 278 279 flash@0 { 280 status = "okay"; 281 label = "pnor"; 282 m25p,fast-read; 283 spi-max-frequency = <100000000>; 284 }; 285}; 286 287&uart1 { 288 /* Rear RS-232 connector */ 289 status = "okay"; 290 pinctrl-names = "default"; 291 pinctrl-0 = <&pinctrl_txd1_default 292 &pinctrl_rxd1_default 293 &pinctrl_nrts1_default 294 &pinctrl_ndtr1_default 295 &pinctrl_ndsr1_default 296 &pinctrl_ncts1_default 297 &pinctrl_ndcd1_default 298 &pinctrl_nri1_default>; 299}; 300 301&uart2 { 302 /* APSS */ 303 status = "okay"; 304 pinctrl-names = "default"; 305 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; 306}; 307 308&uart5 { 309 status = "okay"; 310}; 311 312&lpc_ctrl { 313 status = "okay"; 314 memory-region = <&flash_memory>; 315 flash = <&spi1>; 316}; 317 318&mac0 { 319 status = "okay"; 320 pinctrl-names = "default"; 321 pinctrl-0 = <&pinctrl_rmii1_default>; 322 use-ncsi; 323 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>, 324 <&syscon ASPEED_CLK_MAC1RCLK>; 325 clock-names = "MACCLK", "RCLK"; 326}; 327 328&i2c2 { 329 status = "okay"; 330 331 /* MUX -> 332 * Samtec 1 333 * Samtec 2 334 */ 335}; 336 337&i2c3 { 338 status = "okay"; 339 340 max31785@52 { 341 compatible = "maxim,max31785a"; 342 reg = <0x52>; 343 #address-cells = <1>; 344 #size-cells = <0>; 345 346 fan@0 { 347 compatible = "pmbus-fan"; 348 reg = <0>; 349 tach-pulses = <2>; 350 maxim,fan-rotor-input = "tach"; 351 maxim,fan-pwm-freq = <25000>; 352 maxim,fan-no-watchdog; 353 maxim,fan-no-fault-ramp; 354 maxim,fan-ramp = <2>; 355 maxim,fan-fault-pin-mon; 356 }; 357 358 fan@1 { 359 compatible = "pmbus-fan"; 360 reg = <1>; 361 tach-pulses = <2>; 362 maxim,fan-rotor-input = "tach"; 363 maxim,fan-pwm-freq = <25000>; 364 maxim,fan-no-watchdog; 365 maxim,fan-no-fault-ramp; 366 maxim,fan-ramp = <2>; 367 maxim,fan-fault-pin-mon; 368 }; 369 370 fan@2 { 371 compatible = "pmbus-fan"; 372 reg = <2>; 373 tach-pulses = <2>; 374 maxim,fan-rotor-input = "tach"; 375 maxim,fan-pwm-freq = <25000>; 376 maxim,fan-no-watchdog; 377 maxim,fan-no-fault-ramp; 378 maxim,fan-ramp = <2>; 379 maxim,fan-fault-pin-mon; 380 }; 381 382 fan@3 { 383 compatible = "pmbus-fan"; 384 reg = <3>; 385 tach-pulses = <2>; 386 maxim,fan-rotor-input = "tach"; 387 maxim,fan-pwm-freq = <25000>; 388 maxim,fan-no-watchdog; 389 maxim,fan-no-fault-ramp; 390 maxim,fan-ramp = <2>; 391 maxim,fan-fault-pin-mon; 392 }; 393 394 fan@4 { 395 compatible = "pmbus-fan"; 396 reg = <4>; 397 tach-pulses = <2>; 398 maxim,fan-rotor-input = "tach"; 399 maxim,fan-pwm-freq = <25000>; 400 maxim,fan-no-watchdog; 401 maxim,fan-no-fault-ramp; 402 maxim,fan-ramp = <2>; 403 maxim,fan-fault-pin-mon; 404 }; 405 }; 406 407 pca0: pca9552@60 { 408 compatible = "nxp,pca9552"; 409 reg = <0x60>; 410 #address-cells = <1>; 411 #size-cells = <0>; 412 413 gpio-controller; 414 #gpio-cells = <2>; 415 416 gpio@0 { 417 reg = <0>; 418 type = <PCA955X_TYPE_GPIO>; 419 }; 420 421 gpio@1 { 422 reg = <1>; 423 type = <PCA955X_TYPE_GPIO>; 424 }; 425 426 gpio@2 { 427 reg = <2>; 428 type = <PCA955X_TYPE_GPIO>; 429 }; 430 431 gpio@3 { 432 reg = <3>; 433 type = <PCA955X_TYPE_GPIO>; 434 }; 435 436 gpio@4 { 437 reg = <4>; 438 type = <PCA955X_TYPE_GPIO>; 439 }; 440 441 gpio@5 { 442 reg = <5>; 443 type = <PCA955X_TYPE_GPIO>; 444 }; 445 446 gpio@6 { 447 reg = <6>; 448 type = <PCA955X_TYPE_GPIO>; 449 }; 450 451 gpio@7 { 452 reg = <7>; 453 type = <PCA955X_TYPE_GPIO>; 454 }; 455 456 gpio@8 { 457 reg = <8>; 458 type = <PCA955X_TYPE_GPIO>; 459 }; 460 461 gpio@9 { 462 reg = <9>; 463 type = <PCA955X_TYPE_GPIO>; 464 }; 465 466 gpio@10 { 467 reg = <10>; 468 type = <PCA955X_TYPE_GPIO>; 469 }; 470 471 gpio@11 { 472 reg = <11>; 473 type = <PCA955X_TYPE_GPIO>; 474 }; 475 476 gpio@12 { 477 reg = <12>; 478 type = <PCA955X_TYPE_GPIO>; 479 }; 480 481 gpio@13 { 482 reg = <13>; 483 type = <PCA955X_TYPE_GPIO>; 484 }; 485 486 gpio@14 { 487 reg = <14>; 488 type = <PCA955X_TYPE_GPIO>; 489 }; 490 491 gpio@15 { 492 reg = <15>; 493 type = <PCA955X_TYPE_GPIO>; 494 }; 495 }; 496 497 power-supply@68 { 498 compatible = "ibm,cffps2"; 499 reg = <0x68>; 500 }; 501 502 eeprom@50 { 503 compatible = "atmel,24c64"; 504 reg = <0x50>; 505 }; 506 507 power-supply@69 { 508 compatible = "ibm,cffps2"; 509 reg = <0x69>; 510 }; 511 512 eeprom@51 { 513 compatible = "atmel,24c64"; 514 reg = <0x51>; 515 }; 516}; 517 518&i2c7 { 519 status = "okay"; 520 521 dps: dps310@76 { 522 compatible = "infineon,dps310"; 523 reg = <0x76>; 524 #io-channel-cells = <0>; 525 }; 526 527 tmp275@48 { 528 compatible = "ti,tmp275"; 529 reg = <0x48>; 530 }; 531 532 si7021a20@20 { 533 compatible = "si,si7021a20"; 534 reg = <0x20>; 535 }; 536 537 eeprom@50 { 538 compatible = "atmel,24c64"; 539 reg = <0x50>; 540 }; 541 542 pca1: pca9551@60 { 543 compatible = "nxp,pca9551"; 544 reg = <0x60>; 545 #address-cells = <1>; 546 #size-cells = <0>; 547 548 gpio-controller; 549 #gpio-cells = <2>; 550 551 gpio@0 { 552 reg = <0>; 553 type = <PCA955X_TYPE_GPIO>; 554 }; 555 556 gpio@1 { 557 reg = <1>; 558 type = <PCA955X_TYPE_GPIO>; 559 }; 560 561 gpio@2 { 562 reg = <2>; 563 type = <PCA955X_TYPE_GPIO>; 564 }; 565 566 gpio@3 { 567 reg = <3>; 568 type = <PCA955X_TYPE_GPIO>; 569 }; 570 571 gpio@4 { 572 reg = <4>; 573 type = <PCA955X_TYPE_GPIO>; 574 }; 575 576 gpio@5 { 577 reg = <5>; 578 type = <PCA955X_TYPE_GPIO>; 579 }; 580 581 gpio@6 { 582 reg = <6>; 583 type = <PCA955X_TYPE_GPIO>; 584 }; 585 586 gpio@7 { 587 reg = <7>; 588 type = <PCA955X_TYPE_GPIO>; 589 }; 590 }; 591}; 592 593&i2c8 { 594 status = "okay"; 595 596 pca9552: pca9552@60 { 597 compatible = "nxp,pca9552"; 598 reg = <0x60>; 599 #address-cells = <1>; 600 #size-cells = <0>; 601 gpio-controller; 602 #gpio-cells = <2>; 603 604 gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N", 605 "GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF", 606 "GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF", 607 "P9_SCM0_PRES", "P9_SCM1_PRES", 608 "GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF", 609 "GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF", 610 "PRESENT_VRM_CP0_N", "PRESENT_VRM_CP1_N", 611 "12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N"; 612 613 gpio@0 { 614 reg = <0>; 615 type = <PCA955X_TYPE_GPIO>; 616 }; 617 618 gpio@1 { 619 reg = <1>; 620 type = <PCA955X_TYPE_GPIO>; 621 }; 622 623 gpio@2 { 624 reg = <2>; 625 type = <PCA955X_TYPE_GPIO>; 626 }; 627 628 gpio@3 { 629 reg = <3>; 630 type = <PCA955X_TYPE_GPIO>; 631 }; 632 633 gpio@4 { 634 reg = <4>; 635 type = <PCA955X_TYPE_GPIO>; 636 }; 637 638 gpio@5 { 639 reg = <5>; 640 type = <PCA955X_TYPE_GPIO>; 641 }; 642 643 gpio@6 { 644 reg = <6>; 645 type = <PCA955X_TYPE_GPIO>; 646 }; 647 648 gpio@7 { 649 reg = <7>; 650 type = <PCA955X_TYPE_GPIO>; 651 }; 652 653 gpio@8 { 654 reg = <8>; 655 type = <PCA955X_TYPE_GPIO>; 656 }; 657 658 gpio@9 { 659 reg = <9>; 660 type = <PCA955X_TYPE_GPIO>; 661 }; 662 663 gpio@10 { 664 reg = <10>; 665 type = <PCA955X_TYPE_GPIO>; 666 }; 667 668 gpio@11 { 669 reg = <11>; 670 type = <PCA955X_TYPE_GPIO>; 671 }; 672 673 gpio@12 { 674 reg = <12>; 675 type = <PCA955X_TYPE_GPIO>; 676 }; 677 678 gpio@13 { 679 reg = <13>; 680 type = <PCA955X_TYPE_GPIO>; 681 }; 682 683 gpio@14 { 684 reg = <14>; 685 type = <PCA955X_TYPE_GPIO>; 686 }; 687 688 gpio@15 { 689 reg = <15>; 690 type = <PCA955X_TYPE_GPIO>; 691 }; 692 }; 693 694 rtc@32 { 695 compatible = "epson,rx8900"; 696 reg = <0x32>; 697 }; 698 699 eeprom@51 { 700 compatible = "atmel,24c64"; 701 reg = <0x51>; 702 }; 703 704 ucd90160@64 { 705 compatible = "ti,ucd90160"; 706 reg = <0x64>; 707 }; 708}; 709 710&i2c9 { 711 status = "okay"; 712 713 eeprom@50 { 714 compatible = "atmel,24c64"; 715 reg = <0x50>; 716 }; 717 718 tmp423a@4c { 719 compatible = "ti,tmp423"; 720 reg = <0x4c>; 721 }; 722 723 ir35221@71 { 724 compatible = "infineon,ir35221"; 725 reg = <0x71>; 726 }; 727 728 ir35221@72 { 729 compatible = "infineon,ir35221"; 730 reg = <0x72>; 731 }; 732 733 pca2: pca9539@74 { 734 compatible = "nxp,pca9539"; 735 reg = <0x74>; 736 #address-cells = <1>; 737 #size-cells = <0>; 738 gpio-controller; 739 #gpio-cells = <2>; 740 741 gpio@0 { 742 reg = <0>; 743 }; 744 745 gpio@1 { 746 reg = <1>; 747 }; 748 749 gpio@2 { 750 reg = <2>; 751 }; 752 753 gpio@3 { 754 reg = <3>; 755 }; 756 757 gpio@4 { 758 reg = <4>; 759 }; 760 761 gpio@5 { 762 reg = <5>; 763 }; 764 765 gpio@6 { 766 reg = <6>; 767 }; 768 769 gpio@7 { 770 reg = <7>; 771 }; 772 773 gpio@8 { 774 reg = <8>; 775 }; 776 777 gpio@9 { 778 reg = <9>; 779 }; 780 781 gpio@10 { 782 reg = <10>; 783 }; 784 785 gpio@11 { 786 reg = <11>; 787 }; 788 789 gpio@12 { 790 reg = <12>; 791 }; 792 793 gpio@13 { 794 reg = <13>; 795 }; 796 797 gpio@14 { 798 reg = <14>; 799 }; 800 801 gpio@15 { 802 reg = <15>; 803 }; 804 }; 805}; 806 807&i2c10 { 808 status = "okay"; 809 810 eeprom@50 { 811 compatible = "atmel,24c64"; 812 reg = <0x50>; 813 }; 814 815 tmp423a@4c { 816 compatible = "ti,tmp423"; 817 reg = <0x4c>; 818 }; 819 820 ir35221@71 { 821 compatible = "infineon,ir35221"; 822 reg = <0x71>; 823 }; 824 825 ir35221@72 { 826 compatible = "infineon,ir35221"; 827 reg = <0x72>; 828 }; 829 830 pca3: pca9539@74 { 831 compatible = "nxp,pca9539"; 832 reg = <0x74>; 833 #address-cells = <1>; 834 #size-cells = <0>; 835 gpio-controller; 836 #gpio-cells = <2>; 837 838 gpio@0 { 839 reg = <0>; 840 }; 841 842 gpio@1 { 843 reg = <1>; 844 }; 845 846 gpio@2 { 847 reg = <2>; 848 }; 849 850 gpio@3 { 851 reg = <3>; 852 }; 853 854 gpio@4 { 855 reg = <4>; 856 }; 857 858 gpio@5 { 859 reg = <5>; 860 }; 861 862 gpio@6 { 863 reg = <6>; 864 }; 865 866 gpio@7 { 867 reg = <7>; 868 }; 869 870 gpio@8 { 871 reg = <8>; 872 }; 873 874 gpio@9 { 875 reg = <9>; 876 }; 877 878 gpio@10 { 879 reg = <10>; 880 }; 881 882 gpio@11 { 883 reg = <11>; 884 }; 885 886 gpio@12 { 887 reg = <12>; 888 }; 889 890 gpio@13 { 891 reg = <13>; 892 }; 893 894 gpio@14 { 895 reg = <14>; 896 }; 897 898 gpio@15 { 899 reg = <15>; 900 }; 901 }; 902}; 903 904&i2c11 { 905 /* MUX 906 * -> PCIe Slot 0 907 * -> PCIe Slot 1 908 * -> PCIe Slot 2 909 * -> PCIe Slot 3 910 */ 911 status = "okay"; 912}; 913 914&i2c12 { 915 status = "okay"; 916 917 tmp275@48 { 918 compatible = "ti,tmp275"; 919 reg = <0x48>; 920 }; 921 922 tmp275@4a { 923 compatible = "ti,tmp275"; 924 reg = <0x4a>; 925 }; 926}; 927 928&i2c13 { 929 status = "okay"; 930}; 931 932&vuart { 933 status = "okay"; 934}; 935 936&gfx { 937 status = "okay"; 938 memory-region = <&gfx_memory>; 939}; 940 941&wdt1 { 942 aspeed,reset-type = "none"; 943 aspeed,external-signal; 944 aspeed,ext-push-pull; 945 aspeed,ext-active-high; 946 947 pinctrl-names = "default"; 948 pinctrl-0 = <&pinctrl_wdtrst1_default>; 949}; 950 951&wdt2 { 952 aspeed,alt-boot; 953}; 954 955&ibt { 956 status = "okay"; 957}; 958 959&adc { 960 status = "okay"; 961}; 962 963&sdmmc { 964 status = "okay"; 965}; 966 967&sdhci1 { 968 status = "okay"; 969 970 pinctrl-names = "default"; 971 pinctrl-0 = <&pinctrl_sd2_default>; 972}; 973 974#include "ibm-power9-dual.dtsi" 975