xref: /linux/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-clemente.dts (revision ec2e0fb07d789976c601bec19ecced7a501c3705)
1// SPDX-License-Identifier: GPL-2.0+
2// Copyright (c) 2021 Facebook Inc.
3/dts-v1/;
4
5#include "aspeed-g6.dtsi"
6#include <dt-bindings/gpio/aspeed-gpio.h>
7#include <dt-bindings/usb/pd.h>
8#include <dt-bindings/leds/leds-pca955x.h>
9#include <dt-bindings/interrupt-controller/irq.h>
10#include <dt-bindings/i2c/i2c.h>
11
12/ {
13	model = "Facebook Clemente BMC";
14	compatible = "facebook,clemente-bmc", "aspeed,ast2600";
15
16	aliases {
17		serial0 = &uart1;
18		serial2 = &uart3;
19		serial3 = &uart4;
20		serial4 = &uart5;
21		i2c16 = &i2c1mux0ch0;
22		i2c17 = &i2c1mux0ch1;
23		i2c18 = &i2c1mux0ch2;
24		i2c19 = &i2c1mux0ch3;
25		i2c20 = &i2c1mux0ch4;
26		i2c21 = &i2c1mux0ch5;
27		i2c22 = &i2c1mux0ch6;
28		i2c23 = &i2c1mux0ch7;
29		i2c24 = &i2c0mux0ch0;
30		i2c25 = &i2c0mux0ch1;
31		i2c26 = &i2c0mux0ch2;
32		i2c27 = &i2c0mux0ch3;
33		i2c28 = &i2c0mux1ch0;
34		i2c29 = &i2c0mux1ch1;
35		i2c30 = &i2c0mux1ch2;
36		i2c31 = &i2c0mux1ch3;
37		i2c32 = &i2c0mux2ch0;
38		i2c33 = &i2c0mux2ch1;
39		i2c34 = &i2c0mux2ch2;
40		i2c35 = &i2c0mux2ch3;
41		i2c36 = &i2c0mux3ch0;
42		i2c37 = &i2c0mux3ch1;
43		i2c38 = &i2c0mux3ch2;
44		i2c39 = &i2c0mux3ch3;
45		i2c40 = &i2c0mux4ch0;
46		i2c41 = &i2c0mux4ch1;
47		i2c42 = &i2c0mux4ch2;
48		i2c43 = &i2c0mux4ch3;
49		i2c44 = &i2c0mux5ch0;
50		i2c45 = &i2c0mux5ch1;
51		i2c46 = &i2c0mux5ch2;
52		i2c47 = &i2c0mux5ch3;
53		i2c48 = &i2c0mux0ch1mux0ch0;
54		i2c49 = &i2c0mux0ch1mux0ch1;
55		i2c50 = &i2c0mux0ch1mux0ch2;
56		i2c51 = &i2c0mux0ch1mux0ch3;
57		i2c52 = &i2c0mux3ch1mux0ch0;
58		i2c53 = &i2c0mux3ch1mux0ch1;
59		i2c54 = &i2c0mux3ch1mux0ch2;
60		i2c55 = &i2c0mux3ch1mux0ch3;
61	};
62
63	chosen {
64		stdout-path = "serial4:57600n8";
65	};
66
67	iio-hwmon {
68		compatible = "iio-hwmon";
69		io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
70			      <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
71			      <&adc1 2>;
72	};
73
74	leds {
75		compatible = "gpio-leds";
76
77		led-0 {
78			label = "bmc_heartbeat_amber";
79			gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>;
80			linux,default-trigger = "heartbeat";
81		};
82
83		led-1 {
84			label = "fp_id_amber";
85			default-state = "off";
86			gpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
87		};
88
89		led-2 {
90			label = "bmc_ready_noled";
91			gpios = <&gpio0 ASPEED_GPIO(B, 3) (GPIO_ACTIVE_HIGH|GPIO_TRANSITORY)>;
92		};
93
94		led-3 {
95			label = "bmc_ready_cpld_noled";
96			gpios = <&gpio0 ASPEED_GPIO(P, 5) (GPIO_ACTIVE_HIGH|GPIO_TRANSITORY)>;
97		};
98	};
99
100	memory@80000000 {
101		device_type = "memory";
102		reg = <0x80000000 0x80000000>;
103	};
104
105	p1v8_bmc_aux: regulator-p1v8-bmc-aux {
106		compatible = "regulator-fixed";
107		regulator-name = "p1v8_bmc_aux";
108		regulator-min-microvolt = <1800000>;
109		regulator-max-microvolt = <1800000>;
110		regulator-always-on;
111	};
112
113	p2v5_bmc_aux: regulator-p2v5-bmc-aux {
114		compatible = "regulator-fixed";
115		regulator-name = "p2v5_bmc_aux";
116		regulator-min-microvolt = <2500000>;
117		regulator-max-microvolt = <2500000>;
118		regulator-always-on;
119	};
120
121	reserved-memory {
122		#address-cells = <1>;
123		#size-cells = <1>;
124		ranges;
125
126		ramoops@b3e00000 {
127			compatible = "ramoops";
128			reg = <0xbb000000 0x200000>; /* 16 * (4 * 0x8000) */
129			record-size = <0x8000>;
130			console-size = <0x8000>;
131			ftrace-size = <0x8000>;
132			pmsg-size = <0x8000>;
133			max-reason = <3>;
134		};
135	};
136
137	spi1_gpio: spi {
138		compatible = "spi-gpio";
139		#address-cells = <1>;
140		#size-cells = <0>;
141
142		sck-gpios = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
143		mosi-gpios = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
144		miso-gpios = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>;
145		cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
146		num-chipselects = <1>;
147
148		tpm@0 {
149			compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
150			spi-max-frequency = <33000000>;
151			reg = <0>;
152		};
153	};
154};
155
156&adc0 {
157	vref-supply = <&p1v8_bmc_aux>;
158	status = "okay";
159
160	pinctrl-names = "default";
161	pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
162		&pinctrl_adc2_default &pinctrl_adc3_default
163		&pinctrl_adc4_default &pinctrl_adc5_default
164		&pinctrl_adc6_default &pinctrl_adc7_default>;
165};
166
167&adc1 {
168	vref-supply = <&p2v5_bmc_aux>;
169	status = "okay";
170
171	pinctrl-names = "default";
172	pinctrl-0 = <&pinctrl_adc10_default>;
173};
174
175&ehci0 {
176	status = "okay";
177};
178
179&fmc {
180	status = "okay";
181	flash@0 {
182		status = "okay";
183		m25p,fast-read;
184		label = "bmc";
185		spi-max-frequency = <50000000>;
186#include "openbmc-flash-layout-128.dtsi"
187	};
188
189	flash@1 {
190		status = "okay";
191		m25p,fast-read;
192		label = "alt-bmc";
193		spi-max-frequency = <50000000>;
194	};
195};
196
197&gpio0 {
198	gpio-line-names =
199	/*A0-A7*/	"","","","","","","","",
200	/*B0-B7*/	"BATTERY_DETECT","PRSNT1_HPM_SCM_N",
201			"BMC_I2C1_FPGA_ALERT_L","BMC_READY",
202			"IOEXP_INT_L","FM_ID_LED",
203			"","",
204	/*C0-C7*/	"BMC_GPIOC0","","","",
205			"PMBUS_REQ_N","PSU_FW_UPDATE_REQ_N",
206			"","BMC_I2C_SSIF_ALERT_L",
207	/*D0-D7*/	"","","","","BMC_GPIOD4","","","",
208	/*E0-E7*/	"BMC_GPIOE0","BMC_GPIOE1","","","","","","",
209	/*F0-F7*/	"","","","","","","","",
210	/*G0-G7*/	"","","","","","",
211			"FM_DEBUG_PORT_PRSNT_N","FM_BMC_DBP_PRESENT_N",
212	/*H0-H7*/	"PWR_BRAKE_L","RUN_POWER_EN",
213			"SHDN_FORCE_L","SHDN_REQ_L",
214			"","","","",
215	/*I0-I7*/	"","","","",
216			"","FLASH_WP_STATUS",
217			"FM_PDB_HEALTH_N","RUN_POWER_PG",
218	/*J0-J7*/	"","","","","","","","",
219	/*K0-K7*/	"","","","","","","","",
220	/*L0-L7*/	"","","","","","","","",
221	/*M0-M7*/	"PCIE_EP_RST_EN","BMC_FRU_WP",
222			"SCM_HPM_STBY_RST_N","SCM_HPM_STBY_EN",
223			"STBY_POWER_PG_3V3","TH500_SHDN_OK_L","","",
224	/*N0-N7*/	"LED_POSTCODE_0","LED_POSTCODE_1",
225			"LED_POSTCODE_2","LED_POSTCODE_3",
226			"LED_POSTCODE_4","LED_POSTCODE_5",
227			"LED_POSTCODE_6","LED_POSTCODE_7",
228	/*O0-O7*/	"HMC_I2C3_FPGA_ALERT_L","FPGA_READY_HMC",
229			"CHASSIS_AC_LOSS_L","BSM_PRSNT_R_N",
230			"PSU_SMB_ALERT_L","FM_TPM_PRSNT_0_N",
231			"","USBDBG_IPMI_EN_L",
232	/*P0-P7*/	"PWR_BTN_BMC_N","IPEX_CABLE_PRSNT_L",
233			"ID_RST_BTN_BMC_N","RST_BMC_RSTBTN_OUT_N",
234			"host0-ready","BMC_READY_CPLD","BMC_GPIOP6","BMC_HEARTBEAT_N",
235	/*Q0-Q7*/	"IRQ_PCH_TPM_SPI_N","USB_OC0_REAR_R_N",
236			"UART_MUX_SEL","I2C_MUX_RESET_L",
237			"RSVD_NV_PLT_DETECT","SPI_TPM_INT_L",
238			"CPU_JTAG_MUX_SELECT","THERM_BB_OVERT_L",
239	/*R0-R7*/	"THERM_BB_WARN_L","SPI_BMC_FPGA_INT_L",
240			"CPU_BOOT_DONE","PMBUS_GNT_L",
241			"CHASSIS_PWR_BRK_L","PCIE_WAKE_L",
242			"PDB_THERM_OVERT_L","HMC_I2C2_FPGA_ALERT_L",
243	/*S0-S7*/	"","","SYS_BMC_PWRBTN_R_N","FM_TPM_PRSNT_1_N",
244			"FM_BMC_DEBUG_SW_N","UID_LED_N",
245			"SYS_FAULT_LED_N","RUN_POWER_FAULT_L",
246	/*T0-T7*/	"","","","","","","","",
247	/*U0-U7*/	"","","","","","","","",
248	/*V0-V7*/	"L2_RST_REQ_OUT_L","L0L1_RST_REQ_OUT_L",
249			"BMC_ID_BEEP_SEL","BMC_I2C0_FPGA_ALERT_L",
250			"SMB_BMC_TMP_ALERT","PWR_LED_N",
251			"SYS_RST_OUT_L","IRQ_TPM_SPI_N",
252	/*W0-W7*/	"","","","","","","","",
253	/*X0-X7*/	"","","","","","","","",
254	/*Y0-Y7*/	"","RST_BMC_SELF_HW",
255			"FM_FLASH_LATCH_N","BMC_EMMC_RST_N",
256			"BMC_GPIOY4","BMC_GPIOY5","","",
257	/*Z0-Z7*/	"","","","","","","BMC_GPIOZ6","BMC_GPIOZ7";
258};
259
260&gpio1 {
261	gpio-line-names =
262	/*18A0-18A7*/	"","","","","","","","",
263	/*18B0-18B3*/	"","","","",
264	/*18B4-18B7*/	"FM_BOARD_BMC_REV_ID0","FM_BOARD_BMC_REV_ID1","FM_BOARD_BMC_REV_ID2","",
265	/*18C0-18C7*/	"","","PI_BMC_BIOS_ROM_IRQ0_N","","","","","",
266	/*18D0-18D7*/	"","","","","","","","",
267	/*18E0-18E3*/	"","","","AC_PWR_BMC_BTN_N","","","","";
268};
269
270&i2c0 {
271	status = "okay";
272
273	i2c-mux@71 {
274		compatible = "nxp,pca9546";
275		reg = <0x71>;
276		#address-cells = <1>;
277		#size-cells = <0>;
278		i2c-mux-idle-disconnect;
279
280		i2c0mux0ch0: i2c@0 {
281			#address-cells = <1>;
282			#size-cells = <0>;
283			reg = <0>;
284		};
285
286		i2c0mux0ch1: i2c@1 {
287			#address-cells = <1>;
288			#size-cells = <0>;
289			reg = <1>;
290
291			// HDD FRU EEPROM
292			eeprom@56 {
293				compatible = "atmel,24c128";
294				reg = <0x56>;
295			};
296
297			// E1.S Backplane
298			i2c0mux0ch1mux0: i2c-mux@74 {
299				compatible = "nxp,pca9546";
300				reg = <0x74>;
301				#address-cells = <1>;
302				#size-cells = <0>;
303				i2c-mux-idle-disconnect;
304
305				i2c0mux0ch1mux0ch0: i2c@0 {
306					#address-cells = <1>;
307					#size-cells = <0>;
308					reg = <0>;
309				};
310
311				i2c0mux0ch1mux0ch1: i2c@1 {
312					#address-cells = <1>;
313					#size-cells = <0>;
314					reg = <1>;
315				};
316
317				i2c0mux0ch1mux0ch2: i2c@2 {
318					#address-cells = <1>;
319					#size-cells = <0>;
320					reg = <2>;
321				};
322
323				i2c0mux0ch1mux0ch3: i2c@3 {
324					#address-cells = <1>;
325					#size-cells = <0>;
326					reg = <3>;
327				};
328			};
329		};
330
331		i2c0mux0ch2: i2c@2 {
332			#address-cells = <1>;
333			#size-cells = <0>;
334			reg = <2>;
335		};
336
337		i2c0mux0ch3: i2c@3 {
338			#address-cells = <1>;
339			#size-cells = <0>;
340			reg = <3>;
341		};
342	};
343
344	i2c-mux@72 {
345		compatible = "nxp,pca9546";
346		reg = <0x72>;
347		#address-cells = <1>;
348		#size-cells = <0>;
349		i2c-mux-idle-disconnect;
350
351		i2c0mux1ch0: i2c@0 {
352			#address-cells = <1>;
353			#size-cells = <0>;
354			reg = <0>;
355		};
356
357		i2c0mux1ch1: i2c@1 {
358			#address-cells = <1>;
359			#size-cells = <0>;
360			reg = <1>;
361
362			// IO Mezz 0 IOEXP
363			io_expander7: gpio@20 {
364				compatible = "nxp,pca9535";
365				reg = <0x20>;
366				gpio-controller;
367				#gpio-cells = <2>;
368				gpio-line-names =
369					"RST_CX7_0",
370					"RST_CX7_1",
371					"CX0_SSD0_PRSNT_L",
372					"CX1_SSD1_PRSNT_L",
373					"CX_BOOT_CMPLT_CX0",
374					"CX_BOOT_CMPLT_CX1",
375					"CX_TWARN_CX0_L",
376					"CX_TWARN_CX1_L",
377					"CX_OVT_SHDN_CX0",
378					"CX_OVT_SHDN_CX1",
379					"FNP_L_CX0",
380					"FNP_L_CX1",
381					"",
382					"MCU_GPIO",
383					"MCU_RST_N",
384					"MCU_RECOVERY_N";
385			};
386
387			// IO Mezz 0 FRU EEPROM
388			eeprom@50 {
389				compatible = "atmel,24c64";
390				reg = <0x50>;
391			};
392
393			// OSFP 0 FRU EEPROM
394			eeprom@52 {
395				compatible = "atmel,24c128";
396				reg = <0x52>;
397			};
398		};
399
400		i2c0mux1ch2: i2c@2 {
401			#address-cells = <1>;
402			#size-cells = <0>;
403			reg = <2>;
404		};
405
406		i2c0mux1ch3: i2c@3 {
407			#address-cells = <1>;
408			#size-cells = <0>;
409			reg = <3>;
410		};
411	};
412
413	i2c-mux@73 {
414		compatible = "nxp,pca9546";
415		reg = <0x73>;
416		#address-cells = <1>;
417		#size-cells = <0>;
418		i2c-mux-idle-disconnect;
419
420		i2c0mux2ch0: i2c@0 {
421			#address-cells = <1>;
422			#size-cells = <0>;
423			reg = <0>;
424			// IOB0 NIC0 TEMP
425			temperature-sensor@1f {
426				compatible = "ti,tmp421";
427				reg = <0x1f>;
428			};
429		};
430
431		i2c0mux2ch1: i2c@1 {
432			#address-cells = <1>;
433			#size-cells = <0>;
434			reg = <1>;
435		};
436
437		i2c0mux2ch2: i2c@2 {
438			#address-cells = <1>;
439			#size-cells = <0>;
440			reg = <2>;
441		};
442
443		i2c0mux2ch3: i2c@3 {
444			#address-cells = <1>;
445			#size-cells = <0>;
446			reg = <3>;
447			// IOB0 NIC1 TEMP
448			temperature-sensor@1f {
449				compatible = "ti,tmp421";
450				reg = <0x1f>;
451			};
452		};
453	};
454
455	i2c-mux@75 {
456		compatible = "nxp,pca9546";
457		reg = <0x75>;
458		#address-cells = <1>;
459		#size-cells = <0>;
460		i2c-mux-idle-disconnect;
461
462		i2c0mux3ch0: i2c@0 {
463			#address-cells = <1>;
464			#size-cells = <0>;
465			reg = <0>;
466		};
467
468		i2c0mux3ch1: i2c@1 {
469			#address-cells = <1>;
470			#size-cells = <0>;
471			reg = <1>;
472
473			// E1.S Backplane HDD FRU EEPROM
474			eeprom@56 {
475				compatible = "atmel,24c128";
476				reg = <0x56>;
477			};
478
479			// E1.S Backplane MUX
480			i2c0mux3ch1mux0: i2c-mux@74 {
481				compatible = "nxp,pca9546";
482				reg = <0x74>;
483				#address-cells = <1>;
484				#size-cells = <0>;
485				i2c-mux-idle-disconnect;
486
487				i2c0mux3ch1mux0ch0: i2c@0 {
488					#address-cells = <1>;
489					#size-cells = <0>;
490					reg = <0>;
491				};
492
493				i2c0mux3ch1mux0ch1: i2c@1 {
494					#address-cells = <1>;
495					#size-cells = <0>;
496					reg = <1>;
497				};
498
499				i2c0mux3ch1mux0ch2: i2c@2 {
500					#address-cells = <1>;
501					#size-cells = <0>;
502					reg = <2>;
503				};
504
505				i2c0mux3ch1mux0ch3: i2c@3 {
506					#address-cells = <1>;
507					#size-cells = <0>;
508					reg = <3>;
509				};
510			};
511		};
512
513		i2c0mux3ch2: i2c@2 {
514			#address-cells = <1>;
515			#size-cells = <0>;
516			reg = <2>;
517		};
518
519		i2c0mux3ch3: i2c@3 {
520			#address-cells = <1>;
521			#size-cells = <0>;
522			reg = <3>;
523		};
524	};
525
526	i2c-mux@76 {
527		compatible = "nxp,pca9546";
528		reg = <0x76>;
529		#address-cells = <1>;
530		#size-cells = <0>;
531		i2c-mux-idle-disconnect;
532
533		i2c0mux4ch0: i2c@0 {
534			#address-cells = <1>;
535			#size-cells = <0>;
536			reg = <0>;
537		};
538
539		i2c0mux4ch1: i2c@1 {
540			#address-cells = <1>;
541			#size-cells = <0>;
542			reg = <1>;
543
544			// IO Mezz 1 IOEXP
545			io_expander8: gpio@21 {
546				compatible = "nxp,pca9535";
547				reg = <0x21>;
548				gpio-controller;
549				#gpio-cells = <2>;
550				gpio-line-names =
551					"SEC_RST_CX7_0",
552					"SEC_RST_CX7_1",
553					"SEC_CX0_SSD0_PRSNT_L",
554					"SEC_CX1_SSD1_PRSNT_L",
555					"SEC_CX_BOOT_CMPLT_CX0",
556					"SEC_CX_BOOT_CMPLT_CX1",
557					"SEC_CX_TWARN_CX0_L",
558					"SEC_CX_TWARN_CX1_L",
559					"SEC_CX_OVT_SHDN_CX0",
560					"SEC_CX_OVT_SHDN_CX1",
561					"SEC_FNP_L_CX0",
562					"SEC_FNP_L_CX1",
563					"",
564					"SEC_MCU_GPIO",
565					"SEC_MCU_RST_N",
566					"SEC_MCU_RECOVERY_N";
567			};
568
569			// IO Mezz 1 FRU EEPROM
570			eeprom@50 {
571				compatible = "atmel,24c64";
572				reg = <0x50>;
573			};
574
575			// OSFP 1 FRU EEPROM
576			eeprom@52 {
577				compatible = "atmel,24c128";
578				reg = <0x52>;
579			};
580		};
581
582		i2c0mux4ch2: i2c@2 {
583			#address-cells = <1>;
584			#size-cells = <0>;
585			reg = <2>;
586		};
587
588		i2c0mux4ch3: i2c@3 {
589			#address-cells = <1>;
590			#size-cells = <0>;
591			reg = <3>;
592		};
593	};
594
595	i2c-mux@77 {
596		compatible = "nxp,pca9546";
597		reg = <0x77>;
598		#address-cells = <1>;
599		#size-cells = <0>;
600		i2c-mux-idle-disconnect;
601
602		i2c0mux5ch0: i2c@0 {
603			#address-cells = <1>;
604			#size-cells = <0>;
605			reg = <0>;
606			// IOB1 NIC0 TEMP
607			temperature-sensor@1f {
608				compatible = "ti,tmp421";
609				reg = <0x1f>;
610			};
611		};
612
613		i2c0mux5ch1: i2c@1 {
614			#address-cells = <1>;
615			#size-cells = <0>;
616			reg = <1>;
617		};
618
619		i2c0mux5ch2: i2c@2 {
620			#address-cells = <1>;
621			#size-cells = <0>;
622			reg = <2>;
623		};
624
625		i2c0mux5ch3: i2c@3 {
626			#address-cells = <1>;
627			#size-cells = <0>;
628			reg = <3>;
629			// IOB1 NIC1 TEMP
630			temperature-sensor@1f {
631				compatible = "ti,tmp421";
632				reg = <0x1f>;
633			};
634		};
635	};
636};
637
638&i2c1 {
639	status = "okay";
640
641	// PDB
642	power-monitor@12 {
643		compatible = "ti,lm5066i";
644		reg = <0x12>;
645	};
646
647	// PDB
648	power-monitor@14 {
649		compatible = "ti,lm5066i";
650		reg = <0x14>;
651	};
652
653	// Module 0
654	fanctl0: fan-controller@20{
655		compatible = "maxim,max31790";
656		reg = <0x20>;
657	};
658
659	// Module 0
660	fanctl1: fan-controller@23{
661		compatible = "maxim,max31790";
662		reg = <0x23>;
663	};
664
665	// Module 1
666	fanctl2: fan-controller@2c{
667		compatible = "maxim,max31790";
668		reg = <0x2c>;
669	};
670
671	// Module 1
672	fanctl3: fan-controller@2f{
673		compatible = "maxim,max31790";
674		reg = <0x2f>;
675	};
676
677	// Module 0 Leak Sensor
678	adc@34 {
679		compatible = "maxim,max1363";
680		reg = <0x34>;
681	};
682
683	// Module 1 Leak Sensor
684	adc@35 {
685		compatible = "maxim,max1363";
686		reg = <0x35>;
687	};
688
689	// PDB TEMP SENSOR
690	temperature-sensor@4e {
691		compatible = "ti,tmp1075";
692		reg = <0x4e>;
693	};
694
695	// PDB FRU EEPROM
696	eeprom@50 {
697		compatible = "atmel,24c02";
698		reg = <0x50>;
699	};
700
701	// PDB
702	vrm@60 {
703		compatible = "renesas,raa228004";
704		reg = <0x60>;
705	};
706
707	// PDB
708	vrm@61 {
709		compatible = "renesas,raa228004";
710		reg = <0x61>;
711	};
712
713	// Interposer
714	i2c-mux@70 {
715		compatible = "nxp,pca9548";
716		#address-cells = <1>;
717		#size-cells = <0>;
718		reg = <0x70>;
719		i2c-mux-idle-disconnect;
720
721		i2c1mux0ch0: i2c@0 {
722			#address-cells = <1>;
723			#size-cells = <0>;
724			reg = <0x0>;
725		};
726
727		i2c1mux0ch1: i2c@1 {
728			#address-cells = <1>;
729			#size-cells = <0>;
730			reg = <0x1>;
731		};
732
733		i2c1mux0ch2: i2c@2 {
734			#address-cells = <1>;
735			#size-cells = <0>;
736			reg = <0x2>;
737		};
738
739		i2c1mux0ch3: i2c@3 {
740			#address-cells = <1>;
741			#size-cells = <0>;
742			reg = <0x3>;
743		};
744
745		i2c1mux0ch4: i2c@4 {
746			#address-cells = <1>;
747			#size-cells = <0>;
748			reg = <0x4>;
749		};
750
751		i2c1mux0ch5: i2c@5 {
752			#address-cells = <1>;
753			#size-cells = <0>;
754			reg = <0x5>;
755
756			// Interposer TEMP SENSOR
757			temperature-sensor@4f {
758				compatible = "ti,tmp75";
759				reg = <0x4f>;
760			};
761
762			// Interposer FRU EEPROM
763			eeprom@54 {
764				compatible = "atmel,24c64";
765				reg = <0x54>;
766			};
767		};
768
769		i2c1mux0ch6: i2c@6 {
770			#address-cells = <1>;
771			#size-cells = <0>;
772			reg = <0x6>;
773
774			// Interposer IOEXP
775			io_expander5: gpio@27 {
776				compatible = "nxp,pca9554";
777				reg = <0x27>;
778				gpio-controller;
779				#gpio-cells = <2>;
780				gpio-line-names =
781					"JTAG_MUX_SEL",
782					"IOX_BMC_RESET",
783					"RTC_CLR_L",
784					"RTC_U77_ALRT_N",
785					"",
786					"PSU_ALERT_N",
787					"",
788					"RST_P12V_STBY_N";
789			};
790		};
791
792		i2c1mux0ch7: i2c@7 {
793			#address-cells = <1>;
794			#size-cells = <0>;
795			reg = <0x7>;
796
797			// FIO TEMP SENSOR
798			temperature-sensor@4b {
799				compatible = "ti,tmp75";
800				reg = <0x4b>;
801			};
802
803			// FIO FRU EEPROM
804			eeprom@51 {
805				compatible = "atmel,24c64";
806				reg = <0x51>;
807			};
808		};
809	};
810};
811
812&i2c2 {
813	status = "okay";
814	// Module 0, Expander @0x20
815	io_expander0: gpio@20 {
816		compatible = "nxp,pca9555";
817		reg = <0x20>;
818		gpio-controller;
819		#gpio-cells = <2>;
820		gpio-line-names =
821			"FPGA_THERM_OVERT_L-I",
822			"FPGA_READY_BMC-I",
823			"HMC_BMC_DETECT-O",
824			"HMC_PGOOD-O",
825			"",
826			"BMC_STBY_CYCLE-O",
827			"FPGA_EROT_FATAL_ERROR_L-I",
828			"WP_HW_EXT_CTRL_L-O",
829			"EROT_FPGA_RST_L-O",
830			"FPGA_EROT_RECOVERY_L-O",
831			"BMC_EROT_FPGA_SPI_MUX_SEL-O",
832			"USB2_HUB_RST_L-O",
833			"",
834			"SGPIO_EN_L-O",
835			"B2B_IOEXP_INT_L-I",
836			"I2C_BUS_MUX_RESET_L-O";
837	};
838
839	// Module 1, Expander @0x21
840	io_expander1: gpio@21 {
841		compatible = "nxp,pca9555";
842		reg = <0x21>;
843		gpio-controller;
844		#gpio-cells = <2>;
845		gpio-line-names =
846			"SEC_FPGA_THERM_OVERT_L",
847			"SEC_FPGA_READY_BMC",
848			"SEC_HMC_BMC_DETECT",
849			"SEC_HMC_PGOOD",
850			"",
851			"SEC_BMC_SELF_POWER_CYCLE",
852			"SEC_SEC_FPGA_EROT_FATAL_ERROR_L",
853			"SEC_WP_HW_EXT_CTRL_L",
854			"SEC_EROT_FPGA_RST_L",
855			"SEC_FPGA_EROT_RECOVERY_L",
856			"SEC_BMC_EROT_FPGA_SPI_MUX_SEL",
857			"SEC_USB2_HUB_RST_L",
858			"",
859			"SEC_SGPIO_EN_L",
860			"SEC_IOB_IOEXP_INT_L",
861			"SEC_I2C_BUS_MUX_RESET_L";
862	};
863
864	// HMC Expander @0x27
865	io_expander2: gpio@27 {
866		compatible = "nxp,pca9555";
867		reg = <0x27>;
868		gpio-controller;
869		#gpio-cells = <2>;
870		gpio-line-names =
871			"HMC_PRSNT_L-I",
872			"HMC_READY-I",
873			"HMC_EROT_FATAL_ERROR_L-I",
874			"I2C_MUX_SEL-O",
875			"HMC_EROT_SPI_MUX_SEL-O",
876			"HMC_EROT_RECOVERY_L-O",
877			"HMC_EROT_RST_L-O",
878			"GLOBAL_WP_HMC-O",
879			"FPGA_RST_L-O",
880			"USB2_HUB_RST-O",
881			"CPU_UART_MUX_SEL-O",
882			"",
883			"",
884			"",
885			"",
886			"";
887	};
888
889	// Module 0 Aux EEPROM
890	eeprom@50 {
891		compatible = "atmel,24c64";
892		reg = <0x50>;
893	};
894
895	// Module 1 Aux EEPROM
896	eeprom@51 {
897		compatible = "atmel,24c64";
898		reg = <0x51>;
899	};
900};
901
902&i2c3 {
903	status = "okay";
904};
905
906&i2c4 {
907	status = "okay";
908};
909
910&i2c5 {
911	status = "okay";
912};
913
914&i2c6 {
915	status = "okay";
916	io_expander3: gpio@21 {
917		compatible = "nxp,pca9555";
918		reg = <0x21>;
919		gpio-controller;
920		#gpio-cells = <2>;
921		gpio-line-names =
922			"RTC_MUX_SEL",
923			"PCI_MUX_SEL",
924			"TPM_MUX_SEL",
925			"FAN_MUX-SEL",
926			"SGMII_MUX_SEL",
927			"DP_MUX_SEL",
928			"UPHY3_USB_SEL",
929			"NCSI_MUX_SEL",
930			"BMC_PHY_RST",
931			"RTC_CLR_L",
932			"BMC_12V_CTRL",
933			"PS_RUN_IO0_PG",
934			"",
935			"",
936			"",
937			"";
938	};
939
940	rtc@6f {
941		compatible = "nuvoton,nct3018y";
942		reg = <0x6f>;
943	};
944};
945
946&i2c7 {
947	status = "okay";
948};
949
950&i2c8 {
951	status = "okay";
952};
953
954&i2c9 {
955	status = "okay";
956	// SCM TEMP SENSOR BOARD
957	temperature-sensor@4b {
958		compatible = "national,lm75b";
959		reg = <0x4b>;
960	};
961
962	// SCM CPLD IOEXP
963	io_expander4: gpio@4f {
964		compatible = "nxp,pca9555";
965		reg = <0x4f>;
966		gpio-controller;
967		#gpio-cells = <2>;
968		gpio-line-names =
969			"stby_power_en_cpld",
970			"stby_power_gd_cpld",
971			"",
972			"",
973			"",
974			"",
975			"",
976			"",
977			"",
978			"",
979			"",
980			"",
981			"",
982			"",
983			"",
984			"";
985	};
986
987	// SCM FRU EEPROM
988	eeprom@50 {
989		compatible = "atmel,24c64";
990		reg = <0x50>;
991	};
992
993	// BSM FRU EEPROM
994	eeprom@56 {
995		compatible = "atmel,24c64";
996		reg = <0x56>;
997	};
998};
999
1000&i2c10 {
1001	status = "okay";
1002	multi-master;
1003	mctp-controller;
1004	mctp@10 {
1005		compatible = "mctp-i2c-controller";
1006		reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
1007	};
1008
1009	// OCP NIC0 TEMP
1010	temperature-sensor@1f {
1011		compatible = "ti,tmp421";
1012		reg = <0x1f>;
1013	};
1014
1015	// OCP NIC0 FRU EEPROM
1016	eeprom@50 {
1017		compatible = "atmel,24c64";
1018		reg = <0x50>;
1019	};
1020};
1021
1022&i2c11 {
1023	status = "okay";
1024
1025	ssif-bmc@10 {
1026		compatible = "ssif-bmc";
1027		reg = <0x10>;
1028	};
1029};
1030
1031&i2c12 {
1032	status = "okay";
1033	multi-master;
1034
1035	// HPM 1 FRU EEPROM
1036	eeprom@50 {
1037		compatible = "atmel,24c64";
1038		reg = <0x50>;
1039	};
1040	// CBC 2 FRU
1041	eeprom@54 {
1042		compatible = "atmel,24c02";
1043		reg = <0x54>;
1044	};
1045	// CBC 3 FRU
1046	eeprom@55 {
1047		compatible = "atmel,24c02";
1048		reg = <0x55>;
1049	};
1050};
1051
1052&i2c13 {
1053	status = "okay";
1054	multi-master;
1055
1056	// HPM FRU EEPROM
1057	eeprom@50 {
1058		compatible = "atmel,24c64";
1059		reg = <0x50>;
1060	};
1061
1062	// CBC 0 FRU
1063	eeprom@54 {
1064		compatible = "atmel,24c02";
1065		reg = <0x54>;
1066	};
1067
1068	// CBC 1 FRU
1069	eeprom@55 {
1070		compatible = "atmel,24c02";
1071		reg = <0x55>;
1072	};
1073
1074	// HMC FRU EEPROM
1075	eeprom@57 {
1076		compatible = "atmel,24c02";
1077		reg = <0x57>;
1078	};
1079};
1080
1081&i2c14 {
1082	status = "okay";
1083
1084	// PDB CPLD IOEXP 0x10
1085	io_expander9: gpio@10 {
1086		compatible = "nxp,pca9555";
1087		interrupt-parent = <&gpio0>;
1088		interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
1089		reg = <0x10>;
1090		gpio-controller;
1091		#gpio-cells = <2>;
1092		gpio-line-names =
1093			"wSequence_Latch_State_N",
1094			"wP12V_N1N2_RUNTIME_FLT_N",
1095			"wP12V_FAN_RUNTIME_FLT_N",
1096			"wP12V_AUX_RUNTIME_FLT_N",
1097			"wHost_PERST_SEQPWR_FLT_N",
1098			"wP12V_N1N2_SEQPWR_FLT_N",
1099			"wP12V_FAN_SEQPWR_FLT_N",
1100			"wP12V_AUX_SEQPWR_FLT_N",
1101			"wP12V_RUNTIME_FLT_NIC1_N",
1102			"wAUX_RUNTIME_FLT_NIC1_N",
1103			"wP12V_SEQPWR_FLT_NIC1_N",
1104			"wAUX_SEQPWR_FLT_NIC1_N",
1105			"wP12V_RUNTIME_FLT_NIC0_N",
1106			"wAUX_RUNTIME_FLT_NIC0_N",
1107			"wP12V_SEQPWR_FLT_NIC0_N",
1108			"wAUX_SEQPWR_FLT_NIC0_N";
1109	};
1110
1111	// PDB CPLD IOEXP 0x11
1112	io_expander10: gpio@11 {
1113		compatible = "nxp,pca9555";
1114		interrupt-parent = <&gpio0>;
1115		interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
1116		reg = <0x11>;
1117		gpio-controller;
1118		#gpio-cells = <2>;
1119		gpio-line-names =
1120			"FM_P12V_NIC1_FLTB_R_N",
1121			"FM_P3V3_NIC1_FAULT_R_N",
1122			"FM_P12V_NIC0_FLTB_R_N",
1123			"FM_P3V3_NIC0_FAULT_R_N",
1124			"P48V_HS2_FAULT_N_PLD",
1125			"P48V_HS1_FAULT_N_PLD",
1126			"P12V_AUX_FAN_OC_PLD_N",
1127			"P12V_AUX_FAN_FAULT_PLD_N",
1128			"",
1129			"",
1130			"",
1131			"",
1132			"",
1133			"FM_SYS_THROTTLE_N",
1134			"OCP_V3_2_PWRBRK_FROM_HOST_ISO_PLD_N",
1135			"OCP_SFF_PWRBRK_FROM_HOST_ISO_PLD_N";
1136	};
1137
1138	// PDB CPLD IOEXP 0x12
1139	io_expander11: gpio@12 {
1140		compatible = "nxp,pca9555";
1141		interrupt-parent = <&gpio0>;
1142		interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
1143		reg = <0x12>;
1144		gpio-controller;
1145		#gpio-cells = <2>;
1146		gpio-line-names =
1147			"P12V_AUX_PSU_SMB_ALERT_R_L",
1148			"P12V_SCM_SENSE_ALERT_R_N",
1149			"P12V_AUX_NIC1_SENSE_ALERT_R_N",
1150			"P12V_AUX_NIC0_SENSE_ALERT_R_N",
1151			"NODEB_PSU_SMB_ALERT_R_L",
1152			"NODEA_PSU_SMB_ALERT_R_L",
1153			"P12V_AUX_FAN_ALERT_PLD_N",
1154			"P52V_SENSE_ALERT_PLD_N",
1155			"PRSNT_RJ45_FIO_N_R",
1156			"FM_MAIN_PWREN_RMC_EN_ISO_R",
1157			"CHASSIS3_LEAK_Q_N_PLD",
1158			"CHASSIS2_LEAK_Q_N_PLD",
1159			"CHASSIS1_LEAK_Q_N_PLD",
1160			"CHASSIS0_LEAK_Q_N_PLD",
1161			"",
1162			"SMB_RJ45_FIO_TMP_ALERT";
1163	};
1164
1165	// PDB CPLD IOEXP 0x13
1166	io_expander12: gpio@13 {
1167		compatible = "nxp,pca9555";
1168		interrupt-parent = <&gpio0>;
1169		interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
1170		reg = <0x13>;
1171		gpio-controller;
1172		#gpio-cells = <2>;
1173		gpio-line-names =
1174			"FAN_7_PRESENT_N",
1175			"FAN_6_PRESENT_N",
1176			"FAN_5_PRESENT_N",
1177			"FAN_4_PRESENT_N",
1178			"FAN_3_PRESENT_N",
1179			"FAN_2_PRESENT_N",
1180			"FAN_1_PRESENT_N",
1181			"FAN_0_PRESENT_N",
1182			"HP_LVC3_OCP_V3_2_PRSNT2_PLD_N",
1183			"HP_LVC3_OCP_V3_1_PRSNT2_PLD_N",
1184			"PRSNT_HDDBD_POWER_CABLE_N",
1185			"PRSNT_OSFP0_POWER_CABLE_N",
1186			"PRSNT_CHASSIS3_LEAK_CABLE_R_N",
1187			"PRSNT_CHASSIS2_LEAK_CABLE_R_N",
1188			"PRSNT_CHASSIS1_LEAK_CABLE_R_N",
1189			"PRSNT_CHASSIS0_LEAK_CABLE_R_N";
1190	};
1191
1192	// PDB CPLD IOEXP 0x14
1193	io_expander13: gpio@14 {
1194		compatible = "nxp,pca9555";
1195		reg = <0x14>;
1196		gpio-controller;
1197		#gpio-cells = <2>;
1198		gpio-line-names =
1199			"rmc_en_dc_pwr_on",
1200			"",
1201			"",
1202			"",
1203			"",
1204			"",
1205			"",
1206			"",
1207			"leak_config_0",
1208			"leak_config_1",
1209			"leak_config_2",
1210			"leak_config_3",
1211			"mfg_led_test_mode_l",
1212			"small_leak_err_inj",
1213			"large_leak_err_inj",
1214			"";
1215	};
1216};
1217
1218&i2c15 {
1219	status = "okay";
1220	multi-master;
1221	mctp-controller;
1222	mctp@10 {
1223		compatible = "mctp-i2c-controller";
1224		reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
1225	};
1226
1227	// OCP NIC1 TEMP
1228	temperature-sensor@1f {
1229		compatible = "ti,tmp421";
1230		reg = <0x1f>;
1231	};
1232
1233	// OCP NIC1 FRU EEPROM
1234	eeprom@52 {
1235		compatible = "atmel,24c64";
1236		reg = <0x52>;
1237	};
1238};
1239
1240&mac2 {
1241	status = "okay";
1242	pinctrl-names = "default";
1243	pinctrl-0 = <&pinctrl_ncsi3_default>;
1244	use-ncsi;
1245};
1246
1247&mac3 {
1248	status = "okay";
1249	pinctrl-names = "default";
1250	pinctrl-0 = <&pinctrl_ncsi4_default>;
1251	use-ncsi;
1252};
1253
1254&udma {
1255	status = "okay";
1256};
1257
1258&uart1 {
1259	status = "okay";
1260};
1261
1262&uart3 {
1263	status = "okay";
1264};
1265
1266&uart4 {
1267	status = "okay";
1268};
1269
1270&uart5 {
1271	status = "okay";
1272};
1273
1274&wdt1 {
1275	status = "okay";
1276	pinctrl-names = "default";
1277	pinctrl-0 = <&pinctrl_wdtrst1_default>;
1278	aspeed,reset-type = "soc";
1279	aspeed,external-signal;
1280	aspeed,ext-push-pull;
1281	aspeed,ext-active-high;
1282	aspeed,ext-pulse-duration = <256>;
1283};
1284