1config ARM 2 bool 3 default y 4 select HAVE_AOUT 5 select HAVE_DMA_API_DEBUG 6 select HAVE_IDE 7 select HAVE_MEMBLOCK 8 select RTC_LIB 9 select SYS_SUPPORTS_APM_EMULATION 10 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI) 11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS) 12 select HAVE_ARCH_KGDB 13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL) 14 select HAVE_KRETPROBES if (HAVE_KPROBES) 15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) 16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) 17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) 18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) 19 select HAVE_GENERIC_DMA_COHERENT 20 select HAVE_KERNEL_GZIP 21 select HAVE_KERNEL_LZO 22 select HAVE_KERNEL_LZMA 23 select HAVE_IRQ_WORK 24 select HAVE_PERF_EVENTS 25 select PERF_USE_VMALLOC 26 select HAVE_REGS_AND_STACK_ACCESS_API 27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7)) 28 select HAVE_C_RECORDMCOUNT 29 select HAVE_GENERIC_HARDIRQS 30 select HAVE_SPARSE_IRQ 31 help 32 The ARM series is a line of low-power-consumption RISC chip designs 33 licensed by ARM Ltd and targeted at embedded applications and 34 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer 35 manufactured, but legacy ARM-based PC hardware remains popular in 36 Europe. There is an ARM Linux project with a web page at 37 <http://www.arm.linux.org.uk/>. 38 39config HAVE_PWM 40 bool 41 42config MIGHT_HAVE_PCI 43 bool 44 45config SYS_SUPPORTS_APM_EMULATION 46 bool 47 48config HAVE_SCHED_CLOCK 49 bool 50 51config GENERIC_GPIO 52 bool 53 54config ARCH_USES_GETTIMEOFFSET 55 bool 56 default n 57 58config GENERIC_CLOCKEVENTS 59 bool 60 61config GENERIC_CLOCKEVENTS_BROADCAST 62 bool 63 depends on GENERIC_CLOCKEVENTS 64 default y if SMP 65 66config HAVE_TCM 67 bool 68 select GENERIC_ALLOCATOR 69 70config HAVE_PROC_CPU 71 bool 72 73config NO_IOPORT 74 bool 75 76config EISA 77 bool 78 ---help--- 79 The Extended Industry Standard Architecture (EISA) bus was 80 developed as an open alternative to the IBM MicroChannel bus. 81 82 The EISA bus provided some of the features of the IBM MicroChannel 83 bus while maintaining backward compatibility with cards made for 84 the older ISA bus. The EISA bus saw limited use between 1988 and 85 1995 when it was made obsolete by the PCI bus. 86 87 Say Y here if you are building a kernel for an EISA-based machine. 88 89 Otherwise, say N. 90 91config SBUS 92 bool 93 94config MCA 95 bool 96 help 97 MicroChannel Architecture is found in some IBM PS/2 machines and 98 laptops. It is a bus system similar to PCI or ISA. See 99 <file:Documentation/mca.txt> (and especially the web page given 100 there) before attempting to build an MCA bus kernel. 101 102config STACKTRACE_SUPPORT 103 bool 104 default y 105 106config HAVE_LATENCYTOP_SUPPORT 107 bool 108 depends on !SMP 109 default y 110 111config LOCKDEP_SUPPORT 112 bool 113 default y 114 115config TRACE_IRQFLAGS_SUPPORT 116 bool 117 default y 118 119config HARDIRQS_SW_RESEND 120 bool 121 default y 122 123config GENERIC_IRQ_PROBE 124 bool 125 default y 126 127config GENERIC_LOCKBREAK 128 bool 129 default y 130 depends on SMP && PREEMPT 131 132config RWSEM_GENERIC_SPINLOCK 133 bool 134 default y 135 136config RWSEM_XCHGADD_ALGORITHM 137 bool 138 139config ARCH_HAS_ILOG2_U32 140 bool 141 142config ARCH_HAS_ILOG2_U64 143 bool 144 145config ARCH_HAS_CPUFREQ 146 bool 147 help 148 Internal node to signify that the ARCH has CPUFREQ support 149 and that the relevant menu configurations are displayed for 150 it. 151 152config ARCH_HAS_CPU_IDLE_WAIT 153 def_bool y 154 155config GENERIC_HWEIGHT 156 bool 157 default y 158 159config GENERIC_CALIBRATE_DELAY 160 bool 161 default y 162 163config ARCH_MAY_HAVE_PC_FDC 164 bool 165 166config ZONE_DMA 167 bool 168 169config NEED_DMA_MAP_STATE 170 def_bool y 171 172config GENERIC_ISA_DMA 173 bool 174 175config FIQ 176 bool 177 178config ARCH_MTD_XIP 179 bool 180 181config ARM_L1_CACHE_SHIFT_6 182 bool 183 help 184 Setting ARM L1 cache line size to 64 Bytes. 185 186config VECTORS_BASE 187 hex 188 default 0xffff0000 if MMU || CPU_HIGH_VECTOR 189 default DRAM_BASE if REMAP_VECTORS_TO_RAM 190 default 0x00000000 191 help 192 The base address of exception vectors. 193 194source "init/Kconfig" 195 196source "kernel/Kconfig.freezer" 197 198menu "System Type" 199 200config MMU 201 bool "MMU-based Paged Memory Management Support" 202 default y 203 help 204 Select if you want MMU-based virtualised addressing space 205 support by paged memory management. If unsure, say 'Y'. 206 207# 208# The "ARM system type" choice list is ordered alphabetically by option 209# text. Please add new entries in the option alphabetic order. 210# 211choice 212 prompt "ARM system type" 213 default ARCH_VERSATILE 214 215config ARCH_AAEC2000 216 bool "Agilent AAEC-2000 based" 217 select CPU_ARM920T 218 select ARM_AMBA 219 select HAVE_CLK 220 select ARCH_USES_GETTIMEOFFSET 221 help 222 This enables support for systems based on the Agilent AAEC-2000 223 224config ARCH_INTEGRATOR 225 bool "ARM Ltd. Integrator family" 226 select ARM_AMBA 227 select ARCH_HAS_CPUFREQ 228 select CLKDEV_LOOKUP 229 select ICST 230 select GENERIC_CLOCKEVENTS 231 select PLAT_VERSATILE 232 help 233 Support for ARM's Integrator platform. 234 235config ARCH_REALVIEW 236 bool "ARM Ltd. RealView family" 237 select ARM_AMBA 238 select CLKDEV_LOOKUP 239 select HAVE_SCHED_CLOCK 240 select ICST 241 select GENERIC_CLOCKEVENTS 242 select ARCH_WANT_OPTIONAL_GPIOLIB 243 select PLAT_VERSATILE 244 select ARM_TIMER_SP804 245 select GPIO_PL061 if GPIOLIB 246 help 247 This enables support for ARM Ltd RealView boards. 248 249config ARCH_VERSATILE 250 bool "ARM Ltd. Versatile family" 251 select ARM_AMBA 252 select ARM_VIC 253 select CLKDEV_LOOKUP 254 select HAVE_SCHED_CLOCK 255 select ICST 256 select GENERIC_CLOCKEVENTS 257 select ARCH_WANT_OPTIONAL_GPIOLIB 258 select PLAT_VERSATILE 259 select ARM_TIMER_SP804 260 help 261 This enables support for ARM Ltd Versatile board. 262 263config ARCH_VEXPRESS 264 bool "ARM Ltd. Versatile Express family" 265 select ARCH_WANT_OPTIONAL_GPIOLIB 266 select ARM_AMBA 267 select ARM_TIMER_SP804 268 select CLKDEV_LOOKUP 269 select GENERIC_CLOCKEVENTS 270 select HAVE_CLK 271 select HAVE_SCHED_CLOCK 272 select ICST 273 select PLAT_VERSATILE 274 help 275 This enables support for the ARM Ltd Versatile Express boards. 276 277config ARCH_AT91 278 bool "Atmel AT91" 279 select ARCH_REQUIRE_GPIOLIB 280 select HAVE_CLK 281 help 282 This enables support for systems based on the Atmel AT91RM9200, 283 AT91SAM9 and AT91CAP9 processors. 284 285config ARCH_BCMRING 286 bool "Broadcom BCMRING" 287 depends on MMU 288 select CPU_V6 289 select ARM_AMBA 290 select CLKDEV_LOOKUP 291 select GENERIC_CLOCKEVENTS 292 select ARCH_WANT_OPTIONAL_GPIOLIB 293 help 294 Support for Broadcom's BCMRing platform. 295 296config ARCH_CLPS711X 297 bool "Cirrus Logic CLPS711x/EP721x-based" 298 select CPU_ARM720T 299 select ARCH_USES_GETTIMEOFFSET 300 help 301 Support for Cirrus Logic 711x/721x based boards. 302 303config ARCH_CNS3XXX 304 bool "Cavium Networks CNS3XXX family" 305 select CPU_V6 306 select GENERIC_CLOCKEVENTS 307 select ARM_GIC 308 select MIGHT_HAVE_PCI 309 select PCI_DOMAINS if PCI 310 help 311 Support for Cavium Networks CNS3XXX platform. 312 313config ARCH_GEMINI 314 bool "Cortina Systems Gemini" 315 select CPU_FA526 316 select ARCH_REQUIRE_GPIOLIB 317 select ARCH_USES_GETTIMEOFFSET 318 help 319 Support for the Cortina Systems Gemini family SoCs 320 321config ARCH_EBSA110 322 bool "EBSA-110" 323 select CPU_SA110 324 select ISA 325 select NO_IOPORT 326 select ARCH_USES_GETTIMEOFFSET 327 help 328 This is an evaluation board for the StrongARM processor available 329 from Digital. It has limited hardware on-board, including an 330 Ethernet interface, two PCMCIA sockets, two serial ports and a 331 parallel port. 332 333config ARCH_EP93XX 334 bool "EP93xx-based" 335 select CPU_ARM920T 336 select ARM_AMBA 337 select ARM_VIC 338 select CLKDEV_LOOKUP 339 select ARCH_REQUIRE_GPIOLIB 340 select ARCH_HAS_HOLES_MEMORYMODEL 341 select ARCH_USES_GETTIMEOFFSET 342 help 343 This enables support for the Cirrus EP93xx series of CPUs. 344 345config ARCH_FOOTBRIDGE 346 bool "FootBridge" 347 select CPU_SA110 348 select FOOTBRIDGE 349 select ARCH_USES_GETTIMEOFFSET 350 help 351 Support for systems based on the DC21285 companion chip 352 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. 353 354config ARCH_MXC 355 bool "Freescale MXC/iMX-based" 356 select GENERIC_CLOCKEVENTS 357 select ARCH_REQUIRE_GPIOLIB 358 select CLKDEV_LOOKUP 359 help 360 Support for Freescale MXC/iMX-based family of processors 361 362config ARCH_MXS 363 bool "Freescale MXS-based" 364 select GENERIC_CLOCKEVENTS 365 select ARCH_REQUIRE_GPIOLIB 366 select CLKDEV_LOOKUP 367 help 368 Support for Freescale MXS-based family of processors 369 370config ARCH_STMP3XXX 371 bool "Freescale STMP3xxx" 372 select CPU_ARM926T 373 select CLKDEV_LOOKUP 374 select ARCH_REQUIRE_GPIOLIB 375 select GENERIC_CLOCKEVENTS 376 select USB_ARCH_HAS_EHCI 377 help 378 Support for systems based on the Freescale 3xxx CPUs. 379 380config ARCH_NETX 381 bool "Hilscher NetX based" 382 select CPU_ARM926T 383 select ARM_VIC 384 select GENERIC_CLOCKEVENTS 385 help 386 This enables support for systems based on the Hilscher NetX Soc 387 388config ARCH_H720X 389 bool "Hynix HMS720x-based" 390 select CPU_ARM720T 391 select ISA_DMA_API 392 select ARCH_USES_GETTIMEOFFSET 393 help 394 This enables support for systems based on the Hynix HMS720x 395 396config ARCH_IOP13XX 397 bool "IOP13xx-based" 398 depends on MMU 399 select CPU_XSC3 400 select PLAT_IOP 401 select PCI 402 select ARCH_SUPPORTS_MSI 403 select VMSPLIT_1G 404 help 405 Support for Intel's IOP13XX (XScale) family of processors. 406 407config ARCH_IOP32X 408 bool "IOP32x-based" 409 depends on MMU 410 select CPU_XSCALE 411 select PLAT_IOP 412 select PCI 413 select ARCH_REQUIRE_GPIOLIB 414 help 415 Support for Intel's 80219 and IOP32X (XScale) family of 416 processors. 417 418config ARCH_IOP33X 419 bool "IOP33x-based" 420 depends on MMU 421 select CPU_XSCALE 422 select PLAT_IOP 423 select PCI 424 select ARCH_REQUIRE_GPIOLIB 425 help 426 Support for Intel's IOP33X (XScale) family of processors. 427 428config ARCH_IXP23XX 429 bool "IXP23XX-based" 430 depends on MMU 431 select CPU_XSC3 432 select PCI 433 select ARCH_USES_GETTIMEOFFSET 434 help 435 Support for Intel's IXP23xx (XScale) family of processors. 436 437config ARCH_IXP2000 438 bool "IXP2400/2800-based" 439 depends on MMU 440 select CPU_XSCALE 441 select PCI 442 select ARCH_USES_GETTIMEOFFSET 443 help 444 Support for Intel's IXP2400/2800 (XScale) family of processors. 445 446config ARCH_IXP4XX 447 bool "IXP4xx-based" 448 depends on MMU 449 select CPU_XSCALE 450 select GENERIC_GPIO 451 select GENERIC_CLOCKEVENTS 452 select HAVE_SCHED_CLOCK 453 select MIGHT_HAVE_PCI 454 select DMABOUNCE if PCI 455 help 456 Support for Intel's IXP4XX (XScale) family of processors. 457 458config ARCH_DOVE 459 bool "Marvell Dove" 460 select PCI 461 select ARCH_REQUIRE_GPIOLIB 462 select GENERIC_CLOCKEVENTS 463 select PLAT_ORION 464 help 465 Support for the Marvell Dove SoC 88AP510 466 467config ARCH_KIRKWOOD 468 bool "Marvell Kirkwood" 469 select CPU_FEROCEON 470 select PCI 471 select ARCH_REQUIRE_GPIOLIB 472 select GENERIC_CLOCKEVENTS 473 select PLAT_ORION 474 help 475 Support for the following Marvell Kirkwood series SoCs: 476 88F6180, 88F6192 and 88F6281. 477 478config ARCH_LOKI 479 bool "Marvell Loki (88RC8480)" 480 select CPU_FEROCEON 481 select GENERIC_CLOCKEVENTS 482 select PLAT_ORION 483 help 484 Support for the Marvell Loki (88RC8480) SoC. 485 486config ARCH_LPC32XX 487 bool "NXP LPC32XX" 488 select CPU_ARM926T 489 select ARCH_REQUIRE_GPIOLIB 490 select HAVE_IDE 491 select ARM_AMBA 492 select USB_ARCH_HAS_OHCI 493 select CLKDEV_LOOKUP 494 select GENERIC_TIME 495 select GENERIC_CLOCKEVENTS 496 help 497 Support for the NXP LPC32XX family of processors 498 499config ARCH_MV78XX0 500 bool "Marvell MV78xx0" 501 select CPU_FEROCEON 502 select PCI 503 select ARCH_REQUIRE_GPIOLIB 504 select GENERIC_CLOCKEVENTS 505 select PLAT_ORION 506 help 507 Support for the following Marvell MV78xx0 series SoCs: 508 MV781x0, MV782x0. 509 510config ARCH_ORION5X 511 bool "Marvell Orion" 512 depends on MMU 513 select CPU_FEROCEON 514 select PCI 515 select ARCH_REQUIRE_GPIOLIB 516 select GENERIC_CLOCKEVENTS 517 select PLAT_ORION 518 help 519 Support for the following Marvell Orion 5x series SoCs: 520 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), 521 Orion-2 (5281), Orion-1-90 (6183). 522 523config ARCH_MMP 524 bool "Marvell PXA168/910/MMP2" 525 depends on MMU 526 select ARCH_REQUIRE_GPIOLIB 527 select CLKDEV_LOOKUP 528 select GENERIC_CLOCKEVENTS 529 select HAVE_SCHED_CLOCK 530 select TICK_ONESHOT 531 select PLAT_PXA 532 select SPARSE_IRQ 533 help 534 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. 535 536config ARCH_KS8695 537 bool "Micrel/Kendin KS8695" 538 select CPU_ARM922T 539 select ARCH_REQUIRE_GPIOLIB 540 select ARCH_USES_GETTIMEOFFSET 541 help 542 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based 543 System-on-Chip devices. 544 545config ARCH_NS9XXX 546 bool "NetSilicon NS9xxx" 547 select CPU_ARM926T 548 select GENERIC_GPIO 549 select GENERIC_CLOCKEVENTS 550 select HAVE_CLK 551 help 552 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx 553 System. 554 555 <http://www.digi.com/products/microprocessors/index.jsp> 556 557config ARCH_W90X900 558 bool "Nuvoton W90X900 CPU" 559 select CPU_ARM926T 560 select ARCH_REQUIRE_GPIOLIB 561 select CLKDEV_LOOKUP 562 select GENERIC_CLOCKEVENTS 563 help 564 Support for Nuvoton (Winbond logic dept.) ARM9 processor, 565 At present, the w90x900 has been renamed nuc900, regarding 566 the ARM series product line, you can login the following 567 link address to know more. 568 569 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ 570 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> 571 572config ARCH_NUC93X 573 bool "Nuvoton NUC93X CPU" 574 select CPU_ARM926T 575 select CLKDEV_LOOKUP 576 help 577 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a 578 low-power and high performance MPEG-4/JPEG multimedia controller chip. 579 580config ARCH_TEGRA 581 bool "NVIDIA Tegra" 582 select CLKDEV_LOOKUP 583 select GENERIC_TIME 584 select GENERIC_CLOCKEVENTS 585 select GENERIC_GPIO 586 select HAVE_CLK 587 select HAVE_SCHED_CLOCK 588 select ARCH_HAS_BARRIERS if CACHE_L2X0 589 select ARCH_HAS_CPUFREQ 590 help 591 This enables support for NVIDIA Tegra based systems (Tegra APX, 592 Tegra 6xx and Tegra 2 series). 593 594config ARCH_PNX4008 595 bool "Philips Nexperia PNX4008 Mobile" 596 select CPU_ARM926T 597 select CLKDEV_LOOKUP 598 select ARCH_USES_GETTIMEOFFSET 599 help 600 This enables support for Philips PNX4008 mobile platform. 601 602config ARCH_PXA 603 bool "PXA2xx/PXA3xx-based" 604 depends on MMU 605 select ARCH_MTD_XIP 606 select ARCH_HAS_CPUFREQ 607 select CLKDEV_LOOKUP 608 select ARCH_REQUIRE_GPIOLIB 609 select GENERIC_CLOCKEVENTS 610 select HAVE_SCHED_CLOCK 611 select TICK_ONESHOT 612 select PLAT_PXA 613 select SPARSE_IRQ 614 help 615 Support for Intel/Marvell's PXA2xx/PXA3xx processor line. 616 617config ARCH_MSM 618 bool "Qualcomm MSM" 619 select HAVE_CLK 620 select GENERIC_CLOCKEVENTS 621 select ARCH_REQUIRE_GPIOLIB 622 help 623 Support for Qualcomm MSM/QSD based systems. This runs on the 624 apps processor of the MSM/QSD and depends on a shared memory 625 interface to the modem processor which runs the baseband 626 stack and controls some vital subsystems 627 (clock and power control, etc). 628 629config ARCH_SHMOBILE 630 bool "Renesas SH-Mobile / R-Mobile" 631 select HAVE_CLK 632 select CLKDEV_LOOKUP 633 select GENERIC_CLOCKEVENTS 634 select NO_IOPORT 635 select SPARSE_IRQ 636 select MULTI_IRQ_HANDLER 637 help 638 Support for Renesas's SH-Mobile and R-Mobile ARM platforms. 639 640config ARCH_RPC 641 bool "RiscPC" 642 select ARCH_ACORN 643 select FIQ 644 select TIMER_ACORN 645 select ARCH_MAY_HAVE_PC_FDC 646 select HAVE_PATA_PLATFORM 647 select ISA_DMA_API 648 select NO_IOPORT 649 select ARCH_SPARSEMEM_ENABLE 650 select ARCH_USES_GETTIMEOFFSET 651 help 652 On the Acorn Risc-PC, Linux can support the internal IDE disk and 653 CD-ROM interface, serial and parallel port, and the floppy drive. 654 655config ARCH_SA1100 656 bool "SA1100-based" 657 select CPU_SA1100 658 select ISA 659 select ARCH_SPARSEMEM_ENABLE 660 select ARCH_MTD_XIP 661 select ARCH_HAS_CPUFREQ 662 select CPU_FREQ 663 select GENERIC_CLOCKEVENTS 664 select HAVE_CLK 665 select HAVE_SCHED_CLOCK 666 select TICK_ONESHOT 667 select ARCH_REQUIRE_GPIOLIB 668 help 669 Support for StrongARM 11x0 based boards. 670 671config ARCH_S3C2410 672 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" 673 select GENERIC_GPIO 674 select ARCH_HAS_CPUFREQ 675 select HAVE_CLK 676 select ARCH_USES_GETTIMEOFFSET 677 select HAVE_S3C2410_I2C if I2C 678 help 679 Samsung S3C2410X CPU based systems, such as the Simtec Electronics 680 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or 681 the Samsung SMDK2410 development board (and derivatives). 682 683 Note, the S3C2416 and the S3C2450 are so close that they even share 684 the same SoC ID code. This means that there is no seperate machine 685 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. 686 687config ARCH_S3C64XX 688 bool "Samsung S3C64XX" 689 select PLAT_SAMSUNG 690 select CPU_V6 691 select ARM_VIC 692 select HAVE_CLK 693 select NO_IOPORT 694 select ARCH_USES_GETTIMEOFFSET 695 select ARCH_HAS_CPUFREQ 696 select ARCH_REQUIRE_GPIOLIB 697 select SAMSUNG_CLKSRC 698 select SAMSUNG_IRQ_VIC_TIMER 699 select SAMSUNG_IRQ_UART 700 select S3C_GPIO_TRACK 701 select S3C_GPIO_PULL_UPDOWN 702 select S3C_GPIO_CFG_S3C24XX 703 select S3C_GPIO_CFG_S3C64XX 704 select S3C_DEV_NAND 705 select USB_ARCH_HAS_OHCI 706 select SAMSUNG_GPIOLIB_4BIT 707 select HAVE_S3C2410_I2C if I2C 708 select HAVE_S3C2410_WATCHDOG if WATCHDOG 709 help 710 Samsung S3C64XX series based systems 711 712config ARCH_S5P64X0 713 bool "Samsung S5P6440 S5P6450" 714 select CPU_V6 715 select GENERIC_GPIO 716 select HAVE_CLK 717 select HAVE_S3C2410_WATCHDOG if WATCHDOG 718 select ARCH_USES_GETTIMEOFFSET 719 select HAVE_S3C2410_I2C if I2C 720 select HAVE_S3C_RTC if RTC_CLASS 721 help 722 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, 723 SMDK6450. 724 725config ARCH_S5P6442 726 bool "Samsung S5P6442" 727 select CPU_V6 728 select GENERIC_GPIO 729 select HAVE_CLK 730 select ARCH_USES_GETTIMEOFFSET 731 select HAVE_S3C2410_WATCHDOG if WATCHDOG 732 help 733 Samsung S5P6442 CPU based systems 734 735config ARCH_S5PC100 736 bool "Samsung S5PC100" 737 select GENERIC_GPIO 738 select HAVE_CLK 739 select CPU_V7 740 select ARM_L1_CACHE_SHIFT_6 741 select ARCH_USES_GETTIMEOFFSET 742 select HAVE_S3C2410_I2C if I2C 743 select HAVE_S3C_RTC if RTC_CLASS 744 select HAVE_S3C2410_WATCHDOG if WATCHDOG 745 help 746 Samsung S5PC100 series based systems 747 748config ARCH_S5PV210 749 bool "Samsung S5PV210/S5PC110" 750 select CPU_V7 751 select ARCH_SPARSEMEM_ENABLE 752 select GENERIC_GPIO 753 select HAVE_CLK 754 select ARM_L1_CACHE_SHIFT_6 755 select ARCH_HAS_CPUFREQ 756 select ARCH_USES_GETTIMEOFFSET 757 select HAVE_S3C2410_I2C if I2C 758 select HAVE_S3C_RTC if RTC_CLASS 759 select HAVE_S3C2410_WATCHDOG if WATCHDOG 760 help 761 Samsung S5PV210/S5PC110 series based systems 762 763config ARCH_S5PV310 764 bool "Samsung S5PV310/S5PC210" 765 select CPU_V7 766 select ARCH_SPARSEMEM_ENABLE 767 select GENERIC_GPIO 768 select HAVE_CLK 769 select ARCH_HAS_CPUFREQ 770 select GENERIC_CLOCKEVENTS 771 select HAVE_S3C_RTC if RTC_CLASS 772 select HAVE_S3C2410_I2C if I2C 773 select HAVE_S3C2410_WATCHDOG if WATCHDOG 774 help 775 Samsung S5PV310 series based systems 776 777config ARCH_SHARK 778 bool "Shark" 779 select CPU_SA110 780 select ISA 781 select ISA_DMA 782 select ZONE_DMA 783 select PCI 784 select ARCH_USES_GETTIMEOFFSET 785 help 786 Support for the StrongARM based Digital DNARD machine, also known 787 as "Shark" (<http://www.shark-linux.de/shark.html>). 788 789config ARCH_TCC_926 790 bool "Telechips TCC ARM926-based systems" 791 select CPU_ARM926T 792 select HAVE_CLK 793 select CLKDEV_LOOKUP 794 select GENERIC_CLOCKEVENTS 795 help 796 Support for Telechips TCC ARM926-based systems. 797 798config ARCH_LH7A40X 799 bool "Sharp LH7A40X" 800 select CPU_ARM922T 801 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM 802 select ARCH_USES_GETTIMEOFFSET 803 help 804 Say Y here for systems based on one of the Sharp LH7A40X 805 System on a Chip processors. These CPUs include an ARM922T 806 core with a wide array of integrated devices for 807 hand-held and low-power applications. 808 809config ARCH_U300 810 bool "ST-Ericsson U300 Series" 811 depends on MMU 812 select CPU_ARM926T 813 select HAVE_SCHED_CLOCK 814 select HAVE_TCM 815 select ARM_AMBA 816 select ARM_VIC 817 select GENERIC_CLOCKEVENTS 818 select CLKDEV_LOOKUP 819 select GENERIC_GPIO 820 help 821 Support for ST-Ericsson U300 series mobile platforms. 822 823config ARCH_U8500 824 bool "ST-Ericsson U8500 Series" 825 select CPU_V7 826 select ARM_AMBA 827 select GENERIC_CLOCKEVENTS 828 select CLKDEV_LOOKUP 829 select ARCH_REQUIRE_GPIOLIB 830 select ARCH_HAS_CPUFREQ 831 help 832 Support for ST-Ericsson's Ux500 architecture 833 834config ARCH_NOMADIK 835 bool "STMicroelectronics Nomadik" 836 select ARM_AMBA 837 select ARM_VIC 838 select CPU_ARM926T 839 select CLKDEV_LOOKUP 840 select GENERIC_CLOCKEVENTS 841 select ARCH_REQUIRE_GPIOLIB 842 help 843 Support for the Nomadik platform by ST-Ericsson 844 845config ARCH_DAVINCI 846 bool "TI DaVinci" 847 select GENERIC_CLOCKEVENTS 848 select ARCH_REQUIRE_GPIOLIB 849 select ZONE_DMA 850 select HAVE_IDE 851 select CLKDEV_LOOKUP 852 select GENERIC_ALLOCATOR 853 select ARCH_HAS_HOLES_MEMORYMODEL 854 help 855 Support for TI's DaVinci platform. 856 857config ARCH_OMAP 858 bool "TI OMAP" 859 select HAVE_CLK 860 select ARCH_REQUIRE_GPIOLIB 861 select ARCH_HAS_CPUFREQ 862 select GENERIC_CLOCKEVENTS 863 select HAVE_SCHED_CLOCK 864 select ARCH_HAS_HOLES_MEMORYMODEL 865 help 866 Support for TI's OMAP platform (OMAP1/2/3/4). 867 868config PLAT_SPEAR 869 bool "ST SPEAr" 870 select ARM_AMBA 871 select ARCH_REQUIRE_GPIOLIB 872 select CLKDEV_LOOKUP 873 select GENERIC_CLOCKEVENTS 874 select HAVE_CLK 875 help 876 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). 877 878endchoice 879 880# 881# This is sorted alphabetically by mach-* pathname. However, plat-* 882# Kconfigs may be included either alphabetically (according to the 883# plat- suffix) or along side the corresponding mach-* source. 884# 885source "arch/arm/mach-aaec2000/Kconfig" 886 887source "arch/arm/mach-at91/Kconfig" 888 889source "arch/arm/mach-bcmring/Kconfig" 890 891source "arch/arm/mach-clps711x/Kconfig" 892 893source "arch/arm/mach-cns3xxx/Kconfig" 894 895source "arch/arm/mach-davinci/Kconfig" 896 897source "arch/arm/mach-dove/Kconfig" 898 899source "arch/arm/mach-ep93xx/Kconfig" 900 901source "arch/arm/mach-footbridge/Kconfig" 902 903source "arch/arm/mach-gemini/Kconfig" 904 905source "arch/arm/mach-h720x/Kconfig" 906 907source "arch/arm/mach-integrator/Kconfig" 908 909source "arch/arm/mach-iop32x/Kconfig" 910 911source "arch/arm/mach-iop33x/Kconfig" 912 913source "arch/arm/mach-iop13xx/Kconfig" 914 915source "arch/arm/mach-ixp4xx/Kconfig" 916 917source "arch/arm/mach-ixp2000/Kconfig" 918 919source "arch/arm/mach-ixp23xx/Kconfig" 920 921source "arch/arm/mach-kirkwood/Kconfig" 922 923source "arch/arm/mach-ks8695/Kconfig" 924 925source "arch/arm/mach-lh7a40x/Kconfig" 926 927source "arch/arm/mach-loki/Kconfig" 928 929source "arch/arm/mach-lpc32xx/Kconfig" 930 931source "arch/arm/mach-msm/Kconfig" 932 933source "arch/arm/mach-mv78xx0/Kconfig" 934 935source "arch/arm/plat-mxc/Kconfig" 936 937source "arch/arm/mach-mxs/Kconfig" 938 939source "arch/arm/mach-netx/Kconfig" 940 941source "arch/arm/mach-nomadik/Kconfig" 942source "arch/arm/plat-nomadik/Kconfig" 943 944source "arch/arm/mach-ns9xxx/Kconfig" 945 946source "arch/arm/mach-nuc93x/Kconfig" 947 948source "arch/arm/plat-omap/Kconfig" 949 950source "arch/arm/mach-omap1/Kconfig" 951 952source "arch/arm/mach-omap2/Kconfig" 953 954source "arch/arm/mach-orion5x/Kconfig" 955 956source "arch/arm/mach-pxa/Kconfig" 957source "arch/arm/plat-pxa/Kconfig" 958 959source "arch/arm/mach-mmp/Kconfig" 960 961source "arch/arm/mach-realview/Kconfig" 962 963source "arch/arm/mach-sa1100/Kconfig" 964 965source "arch/arm/plat-samsung/Kconfig" 966source "arch/arm/plat-s3c24xx/Kconfig" 967source "arch/arm/plat-s5p/Kconfig" 968 969source "arch/arm/plat-spear/Kconfig" 970 971source "arch/arm/plat-tcc/Kconfig" 972 973if ARCH_S3C2410 974source "arch/arm/mach-s3c2400/Kconfig" 975source "arch/arm/mach-s3c2410/Kconfig" 976source "arch/arm/mach-s3c2412/Kconfig" 977source "arch/arm/mach-s3c2416/Kconfig" 978source "arch/arm/mach-s3c2440/Kconfig" 979source "arch/arm/mach-s3c2443/Kconfig" 980endif 981 982if ARCH_S3C64XX 983source "arch/arm/mach-s3c64xx/Kconfig" 984endif 985 986source "arch/arm/mach-s5p64x0/Kconfig" 987 988source "arch/arm/mach-s5p6442/Kconfig" 989 990source "arch/arm/mach-s5pc100/Kconfig" 991 992source "arch/arm/mach-s5pv210/Kconfig" 993 994source "arch/arm/mach-s5pv310/Kconfig" 995 996source "arch/arm/mach-shmobile/Kconfig" 997 998source "arch/arm/plat-stmp3xxx/Kconfig" 999 1000source "arch/arm/mach-tegra/Kconfig" 1001 1002source "arch/arm/mach-u300/Kconfig" 1003 1004source "arch/arm/mach-ux500/Kconfig" 1005 1006source "arch/arm/mach-versatile/Kconfig" 1007 1008source "arch/arm/mach-vexpress/Kconfig" 1009 1010source "arch/arm/mach-w90x900/Kconfig" 1011 1012# Definitions to make life easier 1013config ARCH_ACORN 1014 bool 1015 1016config PLAT_IOP 1017 bool 1018 select GENERIC_CLOCKEVENTS 1019 select HAVE_SCHED_CLOCK 1020 1021config PLAT_ORION 1022 bool 1023 select HAVE_SCHED_CLOCK 1024 1025config PLAT_PXA 1026 bool 1027 1028config PLAT_VERSATILE 1029 bool 1030 1031config ARM_TIMER_SP804 1032 bool 1033 1034source arch/arm/mm/Kconfig 1035 1036config IWMMXT 1037 bool "Enable iWMMXt support" 1038 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 1039 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP 1040 help 1041 Enable support for iWMMXt context switching at run time if 1042 running on a CPU that supports it. 1043 1044# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER 1045config XSCALE_PMU 1046 bool 1047 depends on CPU_XSCALE && !XSCALE_PMU_TIMER 1048 default y 1049 1050config CPU_HAS_PMU 1051 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \ 1052 (!ARCH_OMAP3 || OMAP3_EMU) 1053 default y 1054 bool 1055 1056config MULTI_IRQ_HANDLER 1057 bool 1058 help 1059 Allow each machine to specify it's own IRQ handler at run time. 1060 1061if !MMU 1062source "arch/arm/Kconfig-nommu" 1063endif 1064 1065config ARM_ERRATA_411920 1066 bool "ARM errata: Invalidation of the Instruction Cache operation can fail" 1067 depends on CPU_V6 1068 help 1069 Invalidation of the Instruction Cache operation can 1070 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. 1071 It does not affect the MPCore. This option enables the ARM Ltd. 1072 recommended workaround. 1073 1074config ARM_ERRATA_430973 1075 bool "ARM errata: Stale prediction on replaced interworking branch" 1076 depends on CPU_V7 1077 help 1078 This option enables the workaround for the 430973 Cortex-A8 1079 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb 1080 interworking branch is replaced with another code sequence at the 1081 same virtual address, whether due to self-modifying code or virtual 1082 to physical address re-mapping, Cortex-A8 does not recover from the 1083 stale interworking branch prediction. This results in Cortex-A8 1084 executing the new code sequence in the incorrect ARM or Thumb state. 1085 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE 1086 and also flushes the branch target cache at every context switch. 1087 Note that setting specific bits in the ACTLR register may not be 1088 available in non-secure mode. 1089 1090config ARM_ERRATA_458693 1091 bool "ARM errata: Processor deadlock when a false hazard is created" 1092 depends on CPU_V7 1093 help 1094 This option enables the workaround for the 458693 Cortex-A8 (r2p0) 1095 erratum. For very specific sequences of memory operations, it is 1096 possible for a hazard condition intended for a cache line to instead 1097 be incorrectly associated with a different cache line. This false 1098 hazard might then cause a processor deadlock. The workaround enables 1099 the L1 caching of the NEON accesses and disables the PLD instruction 1100 in the ACTLR register. Note that setting specific bits in the ACTLR 1101 register may not be available in non-secure mode. 1102 1103config ARM_ERRATA_460075 1104 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" 1105 depends on CPU_V7 1106 help 1107 This option enables the workaround for the 460075 Cortex-A8 (r2p0) 1108 erratum. Any asynchronous access to the L2 cache may encounter a 1109 situation in which recent store transactions to the L2 cache are lost 1110 and overwritten with stale memory contents from external memory. The 1111 workaround disables the write-allocate mode for the L2 cache via the 1112 ACTLR register. Note that setting specific bits in the ACTLR register 1113 may not be available in non-secure mode. 1114 1115config ARM_ERRATA_742230 1116 bool "ARM errata: DMB operation may be faulty" 1117 depends on CPU_V7 && SMP 1118 help 1119 This option enables the workaround for the 742230 Cortex-A9 1120 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction 1121 between two write operations may not ensure the correct visibility 1122 ordering of the two writes. This workaround sets a specific bit in 1123 the diagnostic register of the Cortex-A9 which causes the DMB 1124 instruction to behave as a DSB, ensuring the correct behaviour of 1125 the two writes. 1126 1127config ARM_ERRATA_742231 1128 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" 1129 depends on CPU_V7 && SMP 1130 help 1131 This option enables the workaround for the 742231 Cortex-A9 1132 (r2p0..r2p2) erratum. Under certain conditions, specific to the 1133 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, 1134 accessing some data located in the same cache line, may get corrupted 1135 data due to bad handling of the address hazard when the line gets 1136 replaced from one of the CPUs at the same time as another CPU is 1137 accessing it. This workaround sets specific bits in the diagnostic 1138 register of the Cortex-A9 which reduces the linefill issuing 1139 capabilities of the processor. 1140 1141config PL310_ERRATA_588369 1142 bool "Clean & Invalidate maintenance operations do not invalidate clean lines" 1143 depends on CACHE_L2X0 && ARCH_OMAP4 1144 help 1145 The PL310 L2 cache controller implements three types of Clean & 1146 Invalidate maintenance operations: by Physical Address 1147 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). 1148 They are architecturally defined to behave as the execution of a 1149 clean operation followed immediately by an invalidate operation, 1150 both performing to the same memory location. This functionality 1151 is not correctly implemented in PL310 as clean lines are not 1152 invalidated as a result of these operations. Note that this errata 1153 uses Texas Instrument's secure monitor api. 1154 1155config ARM_ERRATA_720789 1156 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" 1157 depends on CPU_V7 && SMP 1158 help 1159 This option enables the workaround for the 720789 Cortex-A9 (prior to 1160 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the 1161 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. 1162 As a consequence of this erratum, some TLB entries which should be 1163 invalidated are not, resulting in an incoherency in the system page 1164 tables. The workaround changes the TLB flushing routines to invalidate 1165 entries regardless of the ASID. 1166 1167config ARM_ERRATA_743622 1168 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" 1169 depends on CPU_V7 1170 help 1171 This option enables the workaround for the 743622 Cortex-A9 1172 (r2p0..r2p2) erratum. Under very rare conditions, a faulty 1173 optimisation in the Cortex-A9 Store Buffer may lead to data 1174 corruption. This workaround sets a specific bit in the diagnostic 1175 register of the Cortex-A9 which disables the Store Buffer 1176 optimisation, preventing the defect from occurring. This has no 1177 visible impact on the overall performance or power consumption of the 1178 processor. 1179 1180config ARM_ERRATA_751472 1181 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" 1182 depends on CPU_V7 && SMP 1183 help 1184 This option enables the workaround for the 751472 Cortex-A9 (prior 1185 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the 1186 completion of a following broadcasted operation if the second 1187 operation is received by a CPU before the ICIALLUIS has completed, 1188 potentially leading to corrupted entries in the cache or TLB. 1189 1190config ARM_ERRATA_753970 1191 bool "ARM errata: cache sync operation may be faulty" 1192 depends on CACHE_PL310 1193 help 1194 This option enables the workaround for the 753970 PL310 (r3p0) erratum. 1195 1196 Under some condition the effect of cache sync operation on 1197 the store buffer still remains when the operation completes. 1198 This means that the store buffer is always asked to drain and 1199 this prevents it from merging any further writes. The workaround 1200 is to replace the normal offset of cache sync operation (0x730) 1201 by another offset targeting an unmapped PL310 register 0x740. 1202 This has the same effect as the cache sync operation: store buffer 1203 drain and waiting for all buffers empty. 1204 1205endmenu 1206 1207source "arch/arm/common/Kconfig" 1208 1209menu "Bus support" 1210 1211config ARM_AMBA 1212 bool 1213 1214config ISA 1215 bool 1216 help 1217 Find out whether you have ISA slots on your motherboard. ISA is the 1218 name of a bus system, i.e. the way the CPU talks to the other stuff 1219 inside your box. Other bus systems are PCI, EISA, MicroChannel 1220 (MCA) or VESA. ISA is an older system, now being displaced by PCI; 1221 newer boards don't support it. If you have ISA, say Y, otherwise N. 1222 1223# Select ISA DMA controller support 1224config ISA_DMA 1225 bool 1226 select ISA_DMA_API 1227 1228# Select ISA DMA interface 1229config ISA_DMA_API 1230 bool 1231 1232config PCI 1233 bool "PCI support" if MIGHT_HAVE_PCI 1234 help 1235 Find out whether you have a PCI motherboard. PCI is the name of a 1236 bus system, i.e. the way the CPU talks to the other stuff inside 1237 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or 1238 VESA. If you have PCI, say Y, otherwise N. 1239 1240config PCI_DOMAINS 1241 bool 1242 depends on PCI 1243 1244config PCI_NANOENGINE 1245 bool "BSE nanoEngine PCI support" 1246 depends on SA1100_NANOENGINE 1247 help 1248 Enable PCI on the BSE nanoEngine board. 1249 1250config PCI_SYSCALL 1251 def_bool PCI 1252 1253# Select the host bridge type 1254config PCI_HOST_VIA82C505 1255 bool 1256 depends on PCI && ARCH_SHARK 1257 default y 1258 1259config PCI_HOST_ITE8152 1260 bool 1261 depends on PCI && MACH_ARMCORE 1262 default y 1263 select DMABOUNCE 1264 1265source "drivers/pci/Kconfig" 1266 1267source "drivers/pcmcia/Kconfig" 1268 1269endmenu 1270 1271menu "Kernel Features" 1272 1273source "kernel/time/Kconfig" 1274 1275config SMP 1276 bool "Symmetric Multi-Processing (EXPERIMENTAL)" 1277 depends on EXPERIMENTAL 1278 depends on GENERIC_CLOCKEVENTS 1279 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ 1280 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ 1281 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ 1282 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE 1283 select USE_GENERIC_SMP_HELPERS 1284 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP 1285 help 1286 This enables support for systems with more than one CPU. If you have 1287 a system with only one CPU, like most personal computers, say N. If 1288 you have a system with more than one CPU, say Y. 1289 1290 If you say N here, the kernel will run on single and multiprocessor 1291 machines, but will use only one CPU of a multiprocessor machine. If 1292 you say Y here, the kernel will run on many, but not all, single 1293 processor machines. On a single processor machine, the kernel will 1294 run faster if you say N here. 1295 1296 See also <file:Documentation/i386/IO-APIC.txt>, 1297 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at 1298 <http://tldp.org/HOWTO/SMP-HOWTO.html>. 1299 1300 If you don't know what to do here, say N. 1301 1302config SMP_ON_UP 1303 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" 1304 depends on EXPERIMENTAL 1305 depends on SMP && !XIP_KERNEL 1306 default y 1307 help 1308 SMP kernels contain instructions which fail on non-SMP processors. 1309 Enabling this option allows the kernel to modify itself to make 1310 these instructions safe. Disabling it allows about 1K of space 1311 savings. 1312 1313 If you don't know what to do here, say Y. 1314 1315config HAVE_ARM_SCU 1316 bool 1317 depends on SMP 1318 help 1319 This option enables support for the ARM system coherency unit 1320 1321config HAVE_ARM_TWD 1322 bool 1323 depends on SMP 1324 select TICK_ONESHOT 1325 help 1326 This options enables support for the ARM timer and watchdog unit 1327 1328choice 1329 prompt "Memory split" 1330 default VMSPLIT_3G 1331 help 1332 Select the desired split between kernel and user memory. 1333 1334 If you are not absolutely sure what you are doing, leave this 1335 option alone! 1336 1337 config VMSPLIT_3G 1338 bool "3G/1G user/kernel split" 1339 config VMSPLIT_2G 1340 bool "2G/2G user/kernel split" 1341 config VMSPLIT_1G 1342 bool "1G/3G user/kernel split" 1343endchoice 1344 1345config PAGE_OFFSET 1346 hex 1347 default 0x40000000 if VMSPLIT_1G 1348 default 0x80000000 if VMSPLIT_2G 1349 default 0xC0000000 1350 1351config NR_CPUS 1352 int "Maximum number of CPUs (2-32)" 1353 range 2 32 1354 depends on SMP 1355 default "4" 1356 1357config HOTPLUG_CPU 1358 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" 1359 depends on SMP && HOTPLUG && EXPERIMENTAL 1360 depends on !ARCH_MSM 1361 help 1362 Say Y here to experiment with turning CPUs off and on. CPUs 1363 can be controlled through /sys/devices/system/cpu. 1364 1365config LOCAL_TIMERS 1366 bool "Use local timer interrupts" 1367 depends on SMP 1368 default y 1369 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP 1370 help 1371 Enable support for local timers on SMP platforms, rather then the 1372 legacy IPI broadcast method. Local timers allows the system 1373 accounting to be spread across the timer interval, preventing a 1374 "thundering herd" at every timer tick. 1375 1376source kernel/Kconfig.preempt 1377 1378config HZ 1379 int 1380 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ 1381 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310 1382 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER 1383 default AT91_TIMER_HZ if ARCH_AT91 1384 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE 1385 default 100 1386 1387config THUMB2_KERNEL 1388 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" 1389 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL 1390 select AEABI 1391 select ARM_ASM_UNIFIED 1392 help 1393 By enabling this option, the kernel will be compiled in 1394 Thumb-2 mode. A compiler/assembler that understand the unified 1395 ARM-Thumb syntax is needed. 1396 1397 If unsure, say N. 1398 1399config ARM_ASM_UNIFIED 1400 bool 1401 1402config AEABI 1403 bool "Use the ARM EABI to compile the kernel" 1404 help 1405 This option allows for the kernel to be compiled using the latest 1406 ARM ABI (aka EABI). This is only useful if you are using a user 1407 space environment that is also compiled with EABI. 1408 1409 Since there are major incompatibilities between the legacy ABI and 1410 EABI, especially with regard to structure member alignment, this 1411 option also changes the kernel syscall calling convention to 1412 disambiguate both ABIs and allow for backward compatibility support 1413 (selected with CONFIG_OABI_COMPAT). 1414 1415 To use this you need GCC version 4.0.0 or later. 1416 1417config OABI_COMPAT 1418 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" 1419 depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL 1420 default y 1421 help 1422 This option preserves the old syscall interface along with the 1423 new (ARM EABI) one. It also provides a compatibility layer to 1424 intercept syscalls that have structure arguments which layout 1425 in memory differs between the legacy ABI and the new ARM EABI 1426 (only for non "thumb" binaries). This option adds a tiny 1427 overhead to all syscalls and produces a slightly larger kernel. 1428 If you know you'll be using only pure EABI user space then you 1429 can say N here. If this option is not selected and you attempt 1430 to execute a legacy ABI binary then the result will be 1431 UNPREDICTABLE (in fact it can be predicted that it won't work 1432 at all). If in doubt say Y. 1433 1434config ARCH_HAS_HOLES_MEMORYMODEL 1435 bool 1436 1437config ARCH_SPARSEMEM_ENABLE 1438 bool 1439 1440config ARCH_SPARSEMEM_DEFAULT 1441 def_bool ARCH_SPARSEMEM_ENABLE 1442 1443config ARCH_SELECT_MEMORY_MODEL 1444 def_bool ARCH_SPARSEMEM_ENABLE 1445 1446config HIGHMEM 1447 bool "High Memory Support (EXPERIMENTAL)" 1448 depends on MMU && EXPERIMENTAL 1449 help 1450 The address space of ARM processors is only 4 Gigabytes large 1451 and it has to accommodate user address space, kernel address 1452 space as well as some memory mapped IO. That means that, if you 1453 have a large amount of physical memory and/or IO, not all of the 1454 memory can be "permanently mapped" by the kernel. The physical 1455 memory that is not permanently mapped is called "high memory". 1456 1457 Depending on the selected kernel/user memory split, minimum 1458 vmalloc space and actual amount of RAM, you may not need this 1459 option which should result in a slightly faster kernel. 1460 1461 If unsure, say n. 1462 1463config HIGHPTE 1464 bool "Allocate 2nd-level pagetables from highmem" 1465 depends on HIGHMEM 1466 depends on !OUTER_CACHE 1467 1468config HW_PERF_EVENTS 1469 bool "Enable hardware performance counter support for perf events" 1470 depends on PERF_EVENTS && CPU_HAS_PMU 1471 default y 1472 help 1473 Enable hardware performance counter support for perf events. If 1474 disabled, perf events will use software events only. 1475 1476source "mm/Kconfig" 1477 1478config FORCE_MAX_ZONEORDER 1479 int "Maximum zone order" if ARCH_SHMOBILE 1480 range 11 64 if ARCH_SHMOBILE 1481 default "9" if SA1111 1482 default "11" 1483 help 1484 The kernel memory allocator divides physically contiguous memory 1485 blocks into "zones", where each zone is a power of two number of 1486 pages. This option selects the largest power of two that the kernel 1487 keeps in the memory allocator. If you need to allocate very large 1488 blocks of physically contiguous memory, then you may need to 1489 increase this value. 1490 1491 This config option is actually maximum order plus one. For example, 1492 a value of 11 means that the largest free memory block is 2^10 pages. 1493 1494config LEDS 1495 bool "Timer and CPU usage LEDs" 1496 depends on ARCH_CDB89712 || ARCH_EBSA110 || \ 1497 ARCH_EBSA285 || ARCH_INTEGRATOR || \ 1498 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ 1499 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ 1500 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ 1501 ARCH_AT91 || ARCH_DAVINCI || \ 1502 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW 1503 help 1504 If you say Y here, the LEDs on your machine will be used 1505 to provide useful information about your current system status. 1506 1507 If you are compiling a kernel for a NetWinder or EBSA-285, you will 1508 be able to select which LEDs are active using the options below. If 1509 you are compiling a kernel for the EBSA-110 or the LART however, the 1510 red LED will simply flash regularly to indicate that the system is 1511 still functional. It is safe to say Y here if you have a CATS 1512 system, but the driver will do nothing. 1513 1514config LEDS_TIMER 1515 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ 1516 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ 1517 || MACH_OMAP_PERSEUS2 1518 depends on LEDS 1519 depends on !GENERIC_CLOCKEVENTS 1520 default y if ARCH_EBSA110 1521 help 1522 If you say Y here, one of the system LEDs (the green one on the 1523 NetWinder, the amber one on the EBSA285, or the red one on the LART) 1524 will flash regularly to indicate that the system is still 1525 operational. This is mainly useful to kernel hackers who are 1526 debugging unstable kernels. 1527 1528 The LART uses the same LED for both Timer LED and CPU usage LED 1529 functions. You may choose to use both, but the Timer LED function 1530 will overrule the CPU usage LED. 1531 1532config LEDS_CPU 1533 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ 1534 !ARCH_OMAP) \ 1535 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ 1536 || MACH_OMAP_PERSEUS2 1537 depends on LEDS 1538 help 1539 If you say Y here, the red LED will be used to give a good real 1540 time indication of CPU usage, by lighting whenever the idle task 1541 is not currently executing. 1542 1543 The LART uses the same LED for both Timer LED and CPU usage LED 1544 functions. You may choose to use both, but the Timer LED function 1545 will overrule the CPU usage LED. 1546 1547config ALIGNMENT_TRAP 1548 bool 1549 depends on CPU_CP15_MMU 1550 default y if !ARCH_EBSA110 1551 select HAVE_PROC_CPU if PROC_FS 1552 help 1553 ARM processors cannot fetch/store information which is not 1554 naturally aligned on the bus, i.e., a 4 byte fetch must start at an 1555 address divisible by 4. On 32-bit ARM processors, these non-aligned 1556 fetch/store instructions will be emulated in software if you say 1557 here, which has a severe performance impact. This is necessary for 1558 correct operation of some network protocols. With an IP-only 1559 configuration it is safe to say N, otherwise say Y. 1560 1561config UACCESS_WITH_MEMCPY 1562 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" 1563 depends on MMU && EXPERIMENTAL 1564 default y if CPU_FEROCEON 1565 help 1566 Implement faster copy_to_user and clear_user methods for CPU 1567 cores where a 8-word STM instruction give significantly higher 1568 memory write throughput than a sequence of individual 32bit stores. 1569 1570 A possible side effect is a slight increase in scheduling latency 1571 between threads sharing the same address space if they invoke 1572 such copy operations with large buffers. 1573 1574 However, if the CPU data cache is using a write-allocate mode, 1575 this option is unlikely to provide any performance gain. 1576 1577config SECCOMP 1578 bool 1579 prompt "Enable seccomp to safely compute untrusted bytecode" 1580 ---help--- 1581 This kernel feature is useful for number crunching applications 1582 that may need to compute untrusted bytecode during their 1583 execution. By using pipes or other transports made available to 1584 the process as file descriptors supporting the read/write 1585 syscalls, it's possible to isolate those applications in 1586 their own address space using seccomp. Once seccomp is 1587 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled 1588 and the task is only allowed to execute a few safe syscalls 1589 defined by each seccomp mode. 1590 1591config CC_STACKPROTECTOR 1592 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" 1593 depends on EXPERIMENTAL 1594 help 1595 This option turns on the -fstack-protector GCC feature. This 1596 feature puts, at the beginning of functions, a canary value on 1597 the stack just before the return address, and validates 1598 the value just before actually returning. Stack based buffer 1599 overflows (that need to overwrite this return address) now also 1600 overwrite the canary, which gets detected and the attack is then 1601 neutralized via a kernel panic. 1602 This feature requires gcc version 4.2 or above. 1603 1604config DEPRECATED_PARAM_STRUCT 1605 bool "Provide old way to pass kernel parameters" 1606 help 1607 This was deprecated in 2001 and announced to live on for 5 years. 1608 Some old boot loaders still use this way. 1609 1610endmenu 1611 1612menu "Boot options" 1613 1614# Compressed boot loader in ROM. Yes, we really want to ask about 1615# TEXT and BSS so we preserve their values in the config files. 1616config ZBOOT_ROM_TEXT 1617 hex "Compressed ROM boot loader base address" 1618 default "0" 1619 help 1620 The physical address at which the ROM-able zImage is to be 1621 placed in the target. Platforms which normally make use of 1622 ROM-able zImage formats normally set this to a suitable 1623 value in their defconfig file. 1624 1625 If ZBOOT_ROM is not enabled, this has no effect. 1626 1627config ZBOOT_ROM_BSS 1628 hex "Compressed ROM boot loader BSS address" 1629 default "0" 1630 help 1631 The base address of an area of read/write memory in the target 1632 for the ROM-able zImage which must be available while the 1633 decompressor is running. It must be large enough to hold the 1634 entire decompressed kernel plus an additional 128 KiB. 1635 Platforms which normally make use of ROM-able zImage formats 1636 normally set this to a suitable value in their defconfig file. 1637 1638 If ZBOOT_ROM is not enabled, this has no effect. 1639 1640config ZBOOT_ROM 1641 bool "Compressed boot loader in ROM/flash" 1642 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS 1643 help 1644 Say Y here if you intend to execute your compressed kernel image 1645 (zImage) directly from ROM or flash. If unsure, say N. 1646 1647config CMDLINE 1648 string "Default kernel command string" 1649 default "" 1650 help 1651 On some architectures (EBSA110 and CATS), there is currently no way 1652 for the boot loader to pass arguments to the kernel. For these 1653 architectures, you should supply some command-line options at build 1654 time by entering them here. As a minimum, you should specify the 1655 memory size and the root device (e.g., mem=64M root=/dev/nfs). 1656 1657config CMDLINE_FORCE 1658 bool "Always use the default kernel command string" 1659 depends on CMDLINE != "" 1660 help 1661 Always use the default kernel command string, even if the boot 1662 loader passes other arguments to the kernel. 1663 This is useful if you cannot or don't want to change the 1664 command-line options your boot loader passes to the kernel. 1665 1666 If unsure, say N. 1667 1668config XIP_KERNEL 1669 bool "Kernel Execute-In-Place from ROM" 1670 depends on !ZBOOT_ROM 1671 help 1672 Execute-In-Place allows the kernel to run from non-volatile storage 1673 directly addressable by the CPU, such as NOR flash. This saves RAM 1674 space since the text section of the kernel is not loaded from flash 1675 to RAM. Read-write sections, such as the data section and stack, 1676 are still copied to RAM. The XIP kernel is not compressed since 1677 it has to run directly from flash, so it will take more space to 1678 store it. The flash address used to link the kernel object files, 1679 and for storing it, is configuration dependent. Therefore, if you 1680 say Y here, you must know the proper physical address where to 1681 store the kernel image depending on your own flash memory usage. 1682 1683 Also note that the make target becomes "make xipImage" rather than 1684 "make zImage" or "make Image". The final kernel binary to put in 1685 ROM memory will be arch/arm/boot/xipImage. 1686 1687 If unsure, say N. 1688 1689config XIP_PHYS_ADDR 1690 hex "XIP Kernel Physical Location" 1691 depends on XIP_KERNEL 1692 default "0x00080000" 1693 help 1694 This is the physical address in your flash memory the kernel will 1695 be linked for and stored to. This address is dependent on your 1696 own flash usage. 1697 1698config KEXEC 1699 bool "Kexec system call (EXPERIMENTAL)" 1700 depends on EXPERIMENTAL 1701 help 1702 kexec is a system call that implements the ability to shutdown your 1703 current kernel, and to start another kernel. It is like a reboot 1704 but it is independent of the system firmware. And like a reboot 1705 you can start any kernel with it, not just Linux. 1706 1707 It is an ongoing process to be certain the hardware in a machine 1708 is properly shutdown, so do not be surprised if this code does not 1709 initially work for you. It may help to enable device hotplugging 1710 support. 1711 1712config ATAGS_PROC 1713 bool "Export atags in procfs" 1714 depends on KEXEC 1715 default y 1716 help 1717 Should the atags used to boot the kernel be exported in an "atags" 1718 file in procfs. Useful with kexec. 1719 1720config CRASH_DUMP 1721 bool "Build kdump crash kernel (EXPERIMENTAL)" 1722 depends on EXPERIMENTAL 1723 help 1724 Generate crash dump after being started by kexec. This should 1725 be normally only set in special crash dump kernels which are 1726 loaded in the main kernel with kexec-tools into a specially 1727 reserved region and then later executed after a crash by 1728 kdump/kexec. The crash dump kernel must be compiled to a 1729 memory address not used by the main kernel 1730 1731 For more details see Documentation/kdump/kdump.txt 1732 1733config AUTO_ZRELADDR 1734 bool "Auto calculation of the decompressed kernel image address" 1735 depends on !ZBOOT_ROM && !ARCH_U300 1736 help 1737 ZRELADDR is the physical address where the decompressed kernel 1738 image will be placed. If AUTO_ZRELADDR is selected, the address 1739 will be determined at run-time by masking the current IP with 1740 0xf8000000. This assumes the zImage being placed in the first 128MB 1741 from start of memory. 1742 1743endmenu 1744 1745menu "CPU Power Management" 1746 1747if ARCH_HAS_CPUFREQ 1748 1749source "drivers/cpufreq/Kconfig" 1750 1751config CPU_FREQ_IMX 1752 tristate "CPUfreq driver for i.MX CPUs" 1753 depends on ARCH_MXC && CPU_FREQ 1754 help 1755 This enables the CPUfreq driver for i.MX CPUs. 1756 1757config CPU_FREQ_SA1100 1758 bool 1759 1760config CPU_FREQ_SA1110 1761 bool 1762 1763config CPU_FREQ_INTEGRATOR 1764 tristate "CPUfreq driver for ARM Integrator CPUs" 1765 depends on ARCH_INTEGRATOR && CPU_FREQ 1766 default y 1767 help 1768 This enables the CPUfreq driver for ARM Integrator CPUs. 1769 1770 For details, take a look at <file:Documentation/cpu-freq>. 1771 1772 If in doubt, say Y. 1773 1774config CPU_FREQ_PXA 1775 bool 1776 depends on CPU_FREQ && ARCH_PXA && PXA25x 1777 default y 1778 select CPU_FREQ_DEFAULT_GOV_USERSPACE 1779 1780config CPU_FREQ_S3C64XX 1781 bool "CPUfreq support for Samsung S3C64XX CPUs" 1782 depends on CPU_FREQ && CPU_S3C6410 1783 1784config CPU_FREQ_S3C 1785 bool 1786 help 1787 Internal configuration node for common cpufreq on Samsung SoC 1788 1789config CPU_FREQ_S3C24XX 1790 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" 1791 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL 1792 select CPU_FREQ_S3C 1793 help 1794 This enables the CPUfreq driver for the Samsung S3C24XX family 1795 of CPUs. 1796 1797 For details, take a look at <file:Documentation/cpu-freq>. 1798 1799 If in doubt, say N. 1800 1801config CPU_FREQ_S3C24XX_PLL 1802 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" 1803 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL 1804 help 1805 Compile in support for changing the PLL frequency from the 1806 S3C24XX series CPUfreq driver. The PLL takes time to settle 1807 after a frequency change, so by default it is not enabled. 1808 1809 This also means that the PLL tables for the selected CPU(s) will 1810 be built which may increase the size of the kernel image. 1811 1812config CPU_FREQ_S3C24XX_DEBUG 1813 bool "Debug CPUfreq Samsung driver core" 1814 depends on CPU_FREQ_S3C24XX 1815 help 1816 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core 1817 1818config CPU_FREQ_S3C24XX_IODEBUG 1819 bool "Debug CPUfreq Samsung driver IO timing" 1820 depends on CPU_FREQ_S3C24XX 1821 help 1822 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core 1823 1824config CPU_FREQ_S3C24XX_DEBUGFS 1825 bool "Export debugfs for CPUFreq" 1826 depends on CPU_FREQ_S3C24XX && DEBUG_FS 1827 help 1828 Export status information via debugfs. 1829 1830endif 1831 1832source "drivers/cpuidle/Kconfig" 1833 1834endmenu 1835 1836menu "Floating point emulation" 1837 1838comment "At least one emulation must be selected" 1839 1840config FPE_NWFPE 1841 bool "NWFPE math emulation" 1842 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL 1843 ---help--- 1844 Say Y to include the NWFPE floating point emulator in the kernel. 1845 This is necessary to run most binaries. Linux does not currently 1846 support floating point hardware so you need to say Y here even if 1847 your machine has an FPA or floating point co-processor podule. 1848 1849 You may say N here if you are going to load the Acorn FPEmulator 1850 early in the bootup. 1851 1852config FPE_NWFPE_XP 1853 bool "Support extended precision" 1854 depends on FPE_NWFPE 1855 help 1856 Say Y to include 80-bit support in the kernel floating-point 1857 emulator. Otherwise, only 32 and 64-bit support is compiled in. 1858 Note that gcc does not generate 80-bit operations by default, 1859 so in most cases this option only enlarges the size of the 1860 floating point emulator without any good reason. 1861 1862 You almost surely want to say N here. 1863 1864config FPE_FASTFPE 1865 bool "FastFPE math emulation (EXPERIMENTAL)" 1866 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL 1867 ---help--- 1868 Say Y here to include the FAST floating point emulator in the kernel. 1869 This is an experimental much faster emulator which now also has full 1870 precision for the mantissa. It does not support any exceptions. 1871 It is very simple, and approximately 3-6 times faster than NWFPE. 1872 1873 It should be sufficient for most programs. It may be not suitable 1874 for scientific calculations, but you have to check this for yourself. 1875 If you do not feel you need a faster FP emulation you should better 1876 choose NWFPE. 1877 1878config VFP 1879 bool "VFP-format floating point maths" 1880 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON 1881 help 1882 Say Y to include VFP support code in the kernel. This is needed 1883 if your hardware includes a VFP unit. 1884 1885 Please see <file:Documentation/arm/VFP/release-notes.txt> for 1886 release notes and additional status information. 1887 1888 Say N if your target does not have VFP hardware. 1889 1890config VFPv3 1891 bool 1892 depends on VFP 1893 default y if CPU_V7 1894 1895config NEON 1896 bool "Advanced SIMD (NEON) Extension support" 1897 depends on VFPv3 && CPU_V7 1898 help 1899 Say Y to include support code for NEON, the ARMv7 Advanced SIMD 1900 Extension. 1901 1902endmenu 1903 1904menu "Userspace binary formats" 1905 1906source "fs/Kconfig.binfmt" 1907 1908config ARTHUR 1909 tristate "RISC OS personality" 1910 depends on !AEABI 1911 help 1912 Say Y here to include the kernel code necessary if you want to run 1913 Acorn RISC OS/Arthur binaries under Linux. This code is still very 1914 experimental; if this sounds frightening, say N and sleep in peace. 1915 You can also say M here to compile this support as a module (which 1916 will be called arthur). 1917 1918endmenu 1919 1920menu "Power management options" 1921 1922source "kernel/power/Kconfig" 1923 1924config ARCH_SUSPEND_POSSIBLE 1925 def_bool y 1926 1927endmenu 1928 1929source "net/Kconfig" 1930 1931source "drivers/Kconfig" 1932 1933source "fs/Kconfig" 1934 1935source "arch/arm/Kconfig.debug" 1936 1937source "security/Kconfig" 1938 1939source "crypto/Kconfig" 1940 1941source "lib/Kconfig" 1942