xref: /linux/arch/arm/Kconfig (revision 7c1a70e99819d723cde610d83de48a8ab01ec609)
1config ARM
2	bool
3	default y
4	select HAVE_AOUT
5	select HAVE_IDE
6	select HAVE_MEMBLOCK
7	select RTC_LIB
8	select SYS_SUPPORTS_APM_EMULATION
9	select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
10	select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
11	select HAVE_ARCH_KGDB
12	select HAVE_KPROBES if (!XIP_KERNEL)
13	select HAVE_KRETPROBES if (HAVE_KPROBES)
14	select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
15	select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
16	select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
17	select HAVE_GENERIC_DMA_COHERENT
18	select HAVE_KERNEL_GZIP
19	select HAVE_KERNEL_LZO
20	select HAVE_KERNEL_LZMA
21	select HAVE_IRQ_WORK
22	select HAVE_PERF_EVENTS
23	select PERF_USE_VMALLOC
24	select HAVE_REGS_AND_STACK_ACCESS_API
25	select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
26	help
27	  The ARM series is a line of low-power-consumption RISC chip designs
28	  licensed by ARM Ltd and targeted at embedded applications and
29	  handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
30	  manufactured, but legacy ARM-based PC hardware remains popular in
31	  Europe.  There is an ARM Linux project with a web page at
32	  <http://www.arm.linux.org.uk/>.
33
34config HAVE_PWM
35	bool
36
37config SYS_SUPPORTS_APM_EMULATION
38	bool
39
40config GENERIC_GPIO
41	bool
42
43config ARCH_USES_GETTIMEOFFSET
44	bool
45	default n
46
47config GENERIC_CLOCKEVENTS
48	bool
49
50config GENERIC_CLOCKEVENTS_BROADCAST
51	bool
52	depends on GENERIC_CLOCKEVENTS
53	default y if SMP
54
55config HAVE_TCM
56	bool
57	select GENERIC_ALLOCATOR
58
59config HAVE_PROC_CPU
60	bool
61
62config NO_IOPORT
63	bool
64
65config EISA
66	bool
67	---help---
68	  The Extended Industry Standard Architecture (EISA) bus was
69	  developed as an open alternative to the IBM MicroChannel bus.
70
71	  The EISA bus provided some of the features of the IBM MicroChannel
72	  bus while maintaining backward compatibility with cards made for
73	  the older ISA bus.  The EISA bus saw limited use between 1988 and
74	  1995 when it was made obsolete by the PCI bus.
75
76	  Say Y here if you are building a kernel for an EISA-based machine.
77
78	  Otherwise, say N.
79
80config SBUS
81	bool
82
83config MCA
84	bool
85	help
86	  MicroChannel Architecture is found in some IBM PS/2 machines and
87	  laptops.  It is a bus system similar to PCI or ISA. See
88	  <file:Documentation/mca.txt> (and especially the web page given
89	  there) before attempting to build an MCA bus kernel.
90
91config GENERIC_HARDIRQS
92	bool
93	default y
94
95config STACKTRACE_SUPPORT
96	bool
97	default y
98
99config HAVE_LATENCYTOP_SUPPORT
100	bool
101	depends on !SMP
102	default y
103
104config LOCKDEP_SUPPORT
105	bool
106	default y
107
108config TRACE_IRQFLAGS_SUPPORT
109	bool
110	default y
111
112config HARDIRQS_SW_RESEND
113	bool
114	default y
115
116config GENERIC_IRQ_PROBE
117	bool
118	default y
119
120config GENERIC_LOCKBREAK
121	bool
122	default y
123	depends on SMP && PREEMPT
124
125config RWSEM_GENERIC_SPINLOCK
126	bool
127	default y
128
129config RWSEM_XCHGADD_ALGORITHM
130	bool
131
132config ARCH_HAS_ILOG2_U32
133	bool
134
135config ARCH_HAS_ILOG2_U64
136	bool
137
138config ARCH_HAS_CPUFREQ
139	bool
140	help
141	  Internal node to signify that the ARCH has CPUFREQ support
142	  and that the relevant menu configurations are displayed for
143	  it.
144
145config ARCH_HAS_CPU_IDLE_WAIT
146       def_bool y
147
148config GENERIC_HWEIGHT
149	bool
150	default y
151
152config GENERIC_CALIBRATE_DELAY
153	bool
154	default y
155
156config ARCH_MAY_HAVE_PC_FDC
157	bool
158
159config ZONE_DMA
160	bool
161
162config NEED_DMA_MAP_STATE
163       def_bool y
164
165config GENERIC_ISA_DMA
166	bool
167
168config FIQ
169	bool
170
171config ARCH_MTD_XIP
172	bool
173
174config GENERIC_HARDIRQS_NO__DO_IRQ
175	def_bool y
176
177config ARM_L1_CACHE_SHIFT_6
178	bool
179	help
180	  Setting ARM L1 cache line size to 64 Bytes.
181
182config VECTORS_BASE
183	hex
184	default 0xffff0000 if MMU || CPU_HIGH_VECTOR
185	default DRAM_BASE if REMAP_VECTORS_TO_RAM
186	default 0x00000000
187	help
188	  The base address of exception vectors.
189
190source "init/Kconfig"
191
192source "kernel/Kconfig.freezer"
193
194menu "System Type"
195
196config MMU
197	bool "MMU-based Paged Memory Management Support"
198	default y
199	help
200	  Select if you want MMU-based virtualised addressing space
201	  support by paged memory management. If unsure, say 'Y'.
202
203#
204# The "ARM system type" choice list is ordered alphabetically by option
205# text.  Please add new entries in the option alphabetic order.
206#
207choice
208	prompt "ARM system type"
209	default ARCH_VERSATILE
210
211config ARCH_AAEC2000
212	bool "Agilent AAEC-2000 based"
213	select CPU_ARM920T
214	select ARM_AMBA
215	select HAVE_CLK
216	select ARCH_USES_GETTIMEOFFSET
217	help
218	  This enables support for systems based on the Agilent AAEC-2000
219
220config ARCH_INTEGRATOR
221	bool "ARM Ltd. Integrator family"
222	select ARM_AMBA
223	select ARCH_HAS_CPUFREQ
224	select COMMON_CLKDEV
225	select ICST
226	select GENERIC_CLOCKEVENTS
227	select PLAT_VERSATILE
228	help
229	  Support for ARM's Integrator platform.
230
231config ARCH_REALVIEW
232	bool "ARM Ltd. RealView family"
233	select ARM_AMBA
234	select COMMON_CLKDEV
235	select ICST
236	select GENERIC_CLOCKEVENTS
237	select ARCH_WANT_OPTIONAL_GPIOLIB
238	select PLAT_VERSATILE
239	select ARM_TIMER_SP804
240	select GPIO_PL061 if GPIOLIB
241	help
242	  This enables support for ARM Ltd RealView boards.
243
244config ARCH_VERSATILE
245	bool "ARM Ltd. Versatile family"
246	select ARM_AMBA
247	select ARM_VIC
248	select COMMON_CLKDEV
249	select ICST
250	select GENERIC_CLOCKEVENTS
251	select ARCH_WANT_OPTIONAL_GPIOLIB
252	select PLAT_VERSATILE
253	select ARM_TIMER_SP804
254	help
255	  This enables support for ARM Ltd Versatile board.
256
257config ARCH_VEXPRESS
258	bool "ARM Ltd. Versatile Express family"
259	select ARCH_WANT_OPTIONAL_GPIOLIB
260	select ARM_AMBA
261	select ARM_TIMER_SP804
262	select COMMON_CLKDEV
263	select GENERIC_CLOCKEVENTS
264	select HAVE_CLK
265	select ICST
266	select PLAT_VERSATILE
267	help
268	  This enables support for the ARM Ltd Versatile Express boards.
269
270config ARCH_AT91
271	bool "Atmel AT91"
272	select ARCH_REQUIRE_GPIOLIB
273	select HAVE_CLK
274	help
275	  This enables support for systems based on the Atmel AT91RM9200,
276	  AT91SAM9 and AT91CAP9 processors.
277
278config ARCH_BCMRING
279	bool "Broadcom BCMRING"
280	depends on MMU
281	select CPU_V6
282	select ARM_AMBA
283	select COMMON_CLKDEV
284	select GENERIC_CLOCKEVENTS
285	select ARCH_WANT_OPTIONAL_GPIOLIB
286	help
287	  Support for Broadcom's BCMRing platform.
288
289config ARCH_CLPS711X
290	bool "Cirrus Logic CLPS711x/EP721x-based"
291	select CPU_ARM720T
292	select ARCH_USES_GETTIMEOFFSET
293	help
294	  Support for Cirrus Logic 711x/721x based boards.
295
296config ARCH_CNS3XXX
297	bool "Cavium Networks CNS3XXX family"
298	select CPU_V6
299	select GENERIC_CLOCKEVENTS
300	select ARM_GIC
301	select PCI_DOMAINS if PCI
302	help
303	  Support for Cavium Networks CNS3XXX platform.
304
305config ARCH_GEMINI
306	bool "Cortina Systems Gemini"
307	select CPU_FA526
308	select ARCH_REQUIRE_GPIOLIB
309	select ARCH_USES_GETTIMEOFFSET
310	help
311	  Support for the Cortina Systems Gemini family SoCs
312
313config ARCH_EBSA110
314	bool "EBSA-110"
315	select CPU_SA110
316	select ISA
317	select NO_IOPORT
318	select ARCH_USES_GETTIMEOFFSET
319	help
320	  This is an evaluation board for the StrongARM processor available
321	  from Digital. It has limited hardware on-board, including an
322	  Ethernet interface, two PCMCIA sockets, two serial ports and a
323	  parallel port.
324
325config ARCH_EP93XX
326	bool "EP93xx-based"
327	select CPU_ARM920T
328	select ARM_AMBA
329	select ARM_VIC
330	select COMMON_CLKDEV
331	select ARCH_REQUIRE_GPIOLIB
332	select ARCH_HAS_HOLES_MEMORYMODEL
333	select ARCH_USES_GETTIMEOFFSET
334	help
335	  This enables support for the Cirrus EP93xx series of CPUs.
336
337config ARCH_FOOTBRIDGE
338	bool "FootBridge"
339	select CPU_SA110
340	select FOOTBRIDGE
341	select ARCH_USES_GETTIMEOFFSET
342	help
343	  Support for systems based on the DC21285 companion chip
344	  ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
345
346config ARCH_MXC
347	bool "Freescale MXC/iMX-based"
348	select GENERIC_CLOCKEVENTS
349	select ARCH_REQUIRE_GPIOLIB
350	select COMMON_CLKDEV
351	help
352	  Support for Freescale MXC/iMX-based family of processors
353
354config ARCH_STMP3XXX
355	bool "Freescale STMP3xxx"
356	select CPU_ARM926T
357	select COMMON_CLKDEV
358	select ARCH_REQUIRE_GPIOLIB
359	select GENERIC_CLOCKEVENTS
360	select USB_ARCH_HAS_EHCI
361	help
362	  Support for systems based on the Freescale 3xxx CPUs.
363
364config ARCH_NETX
365	bool "Hilscher NetX based"
366	select CPU_ARM926T
367	select ARM_VIC
368	select GENERIC_CLOCKEVENTS
369	help
370	  This enables support for systems based on the Hilscher NetX Soc
371
372config ARCH_H720X
373	bool "Hynix HMS720x-based"
374	select CPU_ARM720T
375	select ISA_DMA_API
376	select ARCH_USES_GETTIMEOFFSET
377	help
378	  This enables support for systems based on the Hynix HMS720x
379
380config ARCH_IOP13XX
381	bool "IOP13xx-based"
382	depends on MMU
383	select CPU_XSC3
384	select PLAT_IOP
385	select PCI
386	select ARCH_SUPPORTS_MSI
387	select VMSPLIT_1G
388	help
389	  Support for Intel's IOP13XX (XScale) family of processors.
390
391config ARCH_IOP32X
392	bool "IOP32x-based"
393	depends on MMU
394	select CPU_XSCALE
395	select PLAT_IOP
396	select PCI
397	select ARCH_REQUIRE_GPIOLIB
398	help
399	  Support for Intel's 80219 and IOP32X (XScale) family of
400	  processors.
401
402config ARCH_IOP33X
403	bool "IOP33x-based"
404	depends on MMU
405	select CPU_XSCALE
406	select PLAT_IOP
407	select PCI
408	select ARCH_REQUIRE_GPIOLIB
409	help
410	  Support for Intel's IOP33X (XScale) family of processors.
411
412config ARCH_IXP23XX
413 	bool "IXP23XX-based"
414	depends on MMU
415	select CPU_XSC3
416 	select PCI
417	select ARCH_USES_GETTIMEOFFSET
418	help
419	  Support for Intel's IXP23xx (XScale) family of processors.
420
421config ARCH_IXP2000
422	bool "IXP2400/2800-based"
423	depends on MMU
424	select CPU_XSCALE
425	select PCI
426	select ARCH_USES_GETTIMEOFFSET
427	help
428	  Support for Intel's IXP2400/2800 (XScale) family of processors.
429
430config ARCH_IXP4XX
431	bool "IXP4xx-based"
432	depends on MMU
433	select CPU_XSCALE
434	select GENERIC_GPIO
435	select GENERIC_CLOCKEVENTS
436	select DMABOUNCE if PCI
437	help
438	  Support for Intel's IXP4XX (XScale) family of processors.
439
440config ARCH_DOVE
441	bool "Marvell Dove"
442	select PCI
443	select ARCH_REQUIRE_GPIOLIB
444	select GENERIC_CLOCKEVENTS
445	select PLAT_ORION
446	help
447	  Support for the Marvell Dove SoC 88AP510
448
449config ARCH_KIRKWOOD
450	bool "Marvell Kirkwood"
451	select CPU_FEROCEON
452	select PCI
453	select ARCH_REQUIRE_GPIOLIB
454	select GENERIC_CLOCKEVENTS
455	select PLAT_ORION
456	help
457	  Support for the following Marvell Kirkwood series SoCs:
458	  88F6180, 88F6192 and 88F6281.
459
460config ARCH_LOKI
461	bool "Marvell Loki (88RC8480)"
462	select CPU_FEROCEON
463	select GENERIC_CLOCKEVENTS
464	select PLAT_ORION
465	help
466	  Support for the Marvell Loki (88RC8480) SoC.
467
468config ARCH_LPC32XX
469	bool "NXP LPC32XX"
470	select CPU_ARM926T
471	select ARCH_REQUIRE_GPIOLIB
472	select HAVE_IDE
473	select ARM_AMBA
474	select USB_ARCH_HAS_OHCI
475	select COMMON_CLKDEV
476	select GENERIC_TIME
477	select GENERIC_CLOCKEVENTS
478	help
479	  Support for the NXP LPC32XX family of processors
480
481config ARCH_MV78XX0
482	bool "Marvell MV78xx0"
483	select CPU_FEROCEON
484	select PCI
485	select ARCH_REQUIRE_GPIOLIB
486	select GENERIC_CLOCKEVENTS
487	select PLAT_ORION
488	help
489	  Support for the following Marvell MV78xx0 series SoCs:
490	  MV781x0, MV782x0.
491
492config ARCH_ORION5X
493	bool "Marvell Orion"
494	depends on MMU
495	select CPU_FEROCEON
496	select PCI
497	select ARCH_REQUIRE_GPIOLIB
498	select GENERIC_CLOCKEVENTS
499	select PLAT_ORION
500	help
501	  Support for the following Marvell Orion 5x series SoCs:
502	  Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
503	  Orion-2 (5281), Orion-1-90 (6183).
504
505config ARCH_MMP
506	bool "Marvell PXA168/910/MMP2"
507	depends on MMU
508	select ARCH_REQUIRE_GPIOLIB
509	select COMMON_CLKDEV
510	select GENERIC_CLOCKEVENTS
511	select TICK_ONESHOT
512	select PLAT_PXA
513	select SPARSE_IRQ
514	help
515	  Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
516
517config ARCH_KS8695
518	bool "Micrel/Kendin KS8695"
519	select CPU_ARM922T
520	select ARCH_REQUIRE_GPIOLIB
521	select ARCH_USES_GETTIMEOFFSET
522	help
523	  Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
524	  System-on-Chip devices.
525
526config ARCH_NS9XXX
527	bool "NetSilicon NS9xxx"
528	select CPU_ARM926T
529	select GENERIC_GPIO
530	select GENERIC_CLOCKEVENTS
531	select HAVE_CLK
532	help
533	  Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
534	  System.
535
536	  <http://www.digi.com/products/microprocessors/index.jsp>
537
538config ARCH_W90X900
539	bool "Nuvoton W90X900 CPU"
540	select CPU_ARM926T
541	select ARCH_REQUIRE_GPIOLIB
542	select COMMON_CLKDEV
543	select GENERIC_CLOCKEVENTS
544	help
545	  Support for Nuvoton (Winbond logic dept.) ARM9 processor,
546	  At present, the w90x900 has been renamed nuc900, regarding
547	  the ARM series product line, you can login the following
548	  link address to know more.
549
550	  <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
551		ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
552
553config ARCH_NUC93X
554	bool "Nuvoton NUC93X CPU"
555	select CPU_ARM926T
556	select COMMON_CLKDEV
557	help
558	  Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
559	  low-power and high performance MPEG-4/JPEG multimedia controller chip.
560
561config ARCH_TEGRA
562	bool "NVIDIA Tegra"
563	select GENERIC_TIME
564	select GENERIC_CLOCKEVENTS
565	select GENERIC_GPIO
566	select HAVE_CLK
567	select COMMON_CLKDEV
568	select ARCH_HAS_BARRIERS if CACHE_L2X0
569	select ARCH_HAS_CPUFREQ
570	help
571	  This enables support for NVIDIA Tegra based systems (Tegra APX,
572	  Tegra 6xx and Tegra 2 series).
573
574config ARCH_PNX4008
575	bool "Philips Nexperia PNX4008 Mobile"
576	select CPU_ARM926T
577	select COMMON_CLKDEV
578	select ARCH_USES_GETTIMEOFFSET
579	help
580	  This enables support for Philips PNX4008 mobile platform.
581
582config ARCH_PXA
583	bool "PXA2xx/PXA3xx-based"
584	depends on MMU
585	select ARCH_MTD_XIP
586	select ARCH_HAS_CPUFREQ
587	select COMMON_CLKDEV
588	select ARCH_REQUIRE_GPIOLIB
589	select GENERIC_CLOCKEVENTS
590	select TICK_ONESHOT
591	select PLAT_PXA
592	select SPARSE_IRQ
593	help
594	  Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
595
596config ARCH_MSM
597	bool "Qualcomm MSM"
598	select HAVE_CLK
599	select GENERIC_CLOCKEVENTS
600	select ARCH_REQUIRE_GPIOLIB
601	help
602	  Support for Qualcomm MSM/QSD based systems.  This runs on the
603	  apps processor of the MSM/QSD and depends on a shared memory
604	  interface to the modem processor which runs the baseband
605	  stack and controls some vital subsystems
606	  (clock and power control, etc).
607
608config ARCH_SHMOBILE
609	bool "Renesas SH-Mobile"
610	help
611	  Support for Renesas's SH-Mobile ARM platforms
612
613config ARCH_RPC
614	bool "RiscPC"
615	select ARCH_ACORN
616	select FIQ
617	select TIMER_ACORN
618	select ARCH_MAY_HAVE_PC_FDC
619	select HAVE_PATA_PLATFORM
620	select ISA_DMA_API
621	select NO_IOPORT
622	select ARCH_SPARSEMEM_ENABLE
623	select ARCH_USES_GETTIMEOFFSET
624	help
625	  On the Acorn Risc-PC, Linux can support the internal IDE disk and
626	  CD-ROM interface, serial and parallel port, and the floppy drive.
627
628config ARCH_SA1100
629	bool "SA1100-based"
630	select CPU_SA1100
631	select ISA
632	select ARCH_SPARSEMEM_ENABLE
633	select ARCH_MTD_XIP
634	select ARCH_HAS_CPUFREQ
635	select CPU_FREQ
636	select GENERIC_CLOCKEVENTS
637	select HAVE_CLK
638	select TICK_ONESHOT
639	select ARCH_REQUIRE_GPIOLIB
640	help
641	  Support for StrongARM 11x0 based boards.
642
643config ARCH_S3C2410
644	bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
645	select GENERIC_GPIO
646	select ARCH_HAS_CPUFREQ
647	select HAVE_CLK
648	select ARCH_USES_GETTIMEOFFSET
649	select HAVE_S3C2410_I2C if I2C
650	help
651	  Samsung S3C2410X CPU based systems, such as the Simtec Electronics
652	  BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
653	  the Samsung SMDK2410 development board (and derivatives).
654
655	  Note, the S3C2416 and the S3C2450 are so close that they even share
656	  the same SoC ID code. This means that there is no seperate machine
657	  directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
658
659config ARCH_S3C64XX
660	bool "Samsung S3C64XX"
661	select PLAT_SAMSUNG
662	select CPU_V6
663	select ARM_VIC
664	select HAVE_CLK
665	select NO_IOPORT
666	select ARCH_USES_GETTIMEOFFSET
667	select ARCH_HAS_CPUFREQ
668	select ARCH_REQUIRE_GPIOLIB
669	select SAMSUNG_CLKSRC
670	select SAMSUNG_IRQ_VIC_TIMER
671	select SAMSUNG_IRQ_UART
672	select S3C_GPIO_TRACK
673	select S3C_GPIO_PULL_UPDOWN
674	select S3C_GPIO_CFG_S3C24XX
675	select S3C_GPIO_CFG_S3C64XX
676	select S3C_DEV_NAND
677	select USB_ARCH_HAS_OHCI
678	select SAMSUNG_GPIOLIB_4BIT
679	select HAVE_S3C2410_I2C if I2C
680	select HAVE_S3C2410_WATCHDOG if WATCHDOG
681	help
682	  Samsung S3C64XX series based systems
683
684config ARCH_S5P64X0
685	bool "Samsung S5P6440 S5P6450"
686	select CPU_V6
687	select GENERIC_GPIO
688	select HAVE_CLK
689	select HAVE_S3C2410_WATCHDOG if WATCHDOG
690	select ARCH_USES_GETTIMEOFFSET
691	select HAVE_S3C2410_I2C if I2C
692	select HAVE_S3C_RTC if RTC_CLASS
693	help
694	  Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
695	  SMDK6450.
696
697config ARCH_S5P6442
698	bool "Samsung S5P6442"
699	select CPU_V6
700	select GENERIC_GPIO
701	select HAVE_CLK
702	select ARCH_USES_GETTIMEOFFSET
703	select HAVE_S3C2410_WATCHDOG if WATCHDOG
704	help
705	  Samsung S5P6442 CPU based systems
706
707config ARCH_S5PC100
708	bool "Samsung S5PC100"
709	select GENERIC_GPIO
710	select HAVE_CLK
711	select CPU_V7
712	select ARM_L1_CACHE_SHIFT_6
713	select ARCH_USES_GETTIMEOFFSET
714	select HAVE_S3C2410_I2C if I2C
715	select HAVE_S3C_RTC if RTC_CLASS
716	select HAVE_S3C2410_WATCHDOG if WATCHDOG
717	help
718	  Samsung S5PC100 series based systems
719
720config ARCH_S5PV210
721	bool "Samsung S5PV210/S5PC110"
722	select CPU_V7
723	select ARCH_SPARSEMEM_ENABLE
724	select GENERIC_GPIO
725	select HAVE_CLK
726	select ARM_L1_CACHE_SHIFT_6
727	select ARCH_HAS_CPUFREQ
728	select ARCH_USES_GETTIMEOFFSET
729	select HAVE_S3C2410_I2C if I2C
730	select HAVE_S3C_RTC if RTC_CLASS
731	select HAVE_S3C2410_WATCHDOG if WATCHDOG
732	help
733	  Samsung S5PV210/S5PC110 series based systems
734
735config ARCH_S5PV310
736	bool "Samsung S5PV310/S5PC210"
737	select CPU_V7
738	select ARCH_SPARSEMEM_ENABLE
739	select GENERIC_GPIO
740	select HAVE_CLK
741	select GENERIC_CLOCKEVENTS
742	select HAVE_S3C_RTC if RTC_CLASS
743	select HAVE_S3C2410_I2C if I2C
744	select HAVE_S3C2410_WATCHDOG if WATCHDOG
745	help
746	  Samsung S5PV310 series based systems
747
748config ARCH_SHARK
749	bool "Shark"
750	select CPU_SA110
751	select ISA
752	select ISA_DMA
753	select ZONE_DMA
754	select PCI
755	select ARCH_USES_GETTIMEOFFSET
756	help
757	  Support for the StrongARM based Digital DNARD machine, also known
758	  as "Shark" (<http://www.shark-linux.de/shark.html>).
759
760config ARCH_TCC_926
761	bool "Telechips TCC ARM926-based systems"
762	select CPU_ARM926T
763	select HAVE_CLK
764	select COMMON_CLKDEV
765	select GENERIC_CLOCKEVENTS
766	help
767	  Support for Telechips TCC ARM926-based systems.
768
769config ARCH_LH7A40X
770	bool "Sharp LH7A40X"
771	select CPU_ARM922T
772	select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
773	select ARCH_USES_GETTIMEOFFSET
774	help
775	  Say Y here for systems based on one of the Sharp LH7A40X
776	  System on a Chip processors.  These CPUs include an ARM922T
777	  core with a wide array of integrated devices for
778	  hand-held and low-power applications.
779
780config ARCH_U300
781	bool "ST-Ericsson U300 Series"
782	depends on MMU
783	select CPU_ARM926T
784	select HAVE_TCM
785	select ARM_AMBA
786	select ARM_VIC
787	select GENERIC_CLOCKEVENTS
788	select COMMON_CLKDEV
789	select GENERIC_GPIO
790	help
791	  Support for ST-Ericsson U300 series mobile platforms.
792
793config ARCH_U8500
794	bool "ST-Ericsson U8500 Series"
795	select CPU_V7
796	select ARM_AMBA
797	select GENERIC_CLOCKEVENTS
798	select COMMON_CLKDEV
799	select ARCH_REQUIRE_GPIOLIB
800	select ARCH_HAS_CPUFREQ
801	help
802	  Support for ST-Ericsson's Ux500 architecture
803
804config ARCH_NOMADIK
805	bool "STMicroelectronics Nomadik"
806	select ARM_AMBA
807	select ARM_VIC
808	select CPU_ARM926T
809	select COMMON_CLKDEV
810	select GENERIC_CLOCKEVENTS
811	select ARCH_REQUIRE_GPIOLIB
812	help
813	  Support for the Nomadik platform by ST-Ericsson
814
815config ARCH_DAVINCI
816	bool "TI DaVinci"
817	select GENERIC_CLOCKEVENTS
818	select ARCH_REQUIRE_GPIOLIB
819	select ZONE_DMA
820	select HAVE_IDE
821	select COMMON_CLKDEV
822	select GENERIC_ALLOCATOR
823	select ARCH_HAS_HOLES_MEMORYMODEL
824	help
825	  Support for TI's DaVinci platform.
826
827config ARCH_OMAP
828	bool "TI OMAP"
829	select HAVE_CLK
830	select ARCH_REQUIRE_GPIOLIB
831	select ARCH_HAS_CPUFREQ
832	select GENERIC_CLOCKEVENTS
833	select ARCH_HAS_HOLES_MEMORYMODEL
834	help
835	  Support for TI's OMAP platform (OMAP1/2/3/4).
836
837config PLAT_SPEAR
838	bool "ST SPEAr"
839	select ARM_AMBA
840	select ARCH_REQUIRE_GPIOLIB
841	select COMMON_CLKDEV
842	select GENERIC_CLOCKEVENTS
843	select HAVE_CLK
844	help
845	  Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
846
847endchoice
848
849#
850# This is sorted alphabetically by mach-* pathname.  However, plat-*
851# Kconfigs may be included either alphabetically (according to the
852# plat- suffix) or along side the corresponding mach-* source.
853#
854source "arch/arm/mach-aaec2000/Kconfig"
855
856source "arch/arm/mach-at91/Kconfig"
857
858source "arch/arm/mach-bcmring/Kconfig"
859
860source "arch/arm/mach-clps711x/Kconfig"
861
862source "arch/arm/mach-cns3xxx/Kconfig"
863
864source "arch/arm/mach-davinci/Kconfig"
865
866source "arch/arm/mach-dove/Kconfig"
867
868source "arch/arm/mach-ep93xx/Kconfig"
869
870source "arch/arm/mach-footbridge/Kconfig"
871
872source "arch/arm/mach-gemini/Kconfig"
873
874source "arch/arm/mach-h720x/Kconfig"
875
876source "arch/arm/mach-integrator/Kconfig"
877
878source "arch/arm/mach-iop32x/Kconfig"
879
880source "arch/arm/mach-iop33x/Kconfig"
881
882source "arch/arm/mach-iop13xx/Kconfig"
883
884source "arch/arm/mach-ixp4xx/Kconfig"
885
886source "arch/arm/mach-ixp2000/Kconfig"
887
888source "arch/arm/mach-ixp23xx/Kconfig"
889
890source "arch/arm/mach-kirkwood/Kconfig"
891
892source "arch/arm/mach-ks8695/Kconfig"
893
894source "arch/arm/mach-lh7a40x/Kconfig"
895
896source "arch/arm/mach-loki/Kconfig"
897
898source "arch/arm/mach-lpc32xx/Kconfig"
899
900source "arch/arm/mach-msm/Kconfig"
901
902source "arch/arm/mach-mv78xx0/Kconfig"
903
904source "arch/arm/plat-mxc/Kconfig"
905
906source "arch/arm/mach-netx/Kconfig"
907
908source "arch/arm/mach-nomadik/Kconfig"
909source "arch/arm/plat-nomadik/Kconfig"
910
911source "arch/arm/mach-ns9xxx/Kconfig"
912
913source "arch/arm/mach-nuc93x/Kconfig"
914
915source "arch/arm/plat-omap/Kconfig"
916
917source "arch/arm/mach-omap1/Kconfig"
918
919source "arch/arm/mach-omap2/Kconfig"
920
921source "arch/arm/mach-orion5x/Kconfig"
922
923source "arch/arm/mach-pxa/Kconfig"
924source "arch/arm/plat-pxa/Kconfig"
925
926source "arch/arm/mach-mmp/Kconfig"
927
928source "arch/arm/mach-realview/Kconfig"
929
930source "arch/arm/mach-sa1100/Kconfig"
931
932source "arch/arm/plat-samsung/Kconfig"
933source "arch/arm/plat-s3c24xx/Kconfig"
934source "arch/arm/plat-s5p/Kconfig"
935
936source "arch/arm/plat-spear/Kconfig"
937
938source "arch/arm/plat-tcc/Kconfig"
939
940if ARCH_S3C2410
941source "arch/arm/mach-s3c2400/Kconfig"
942source "arch/arm/mach-s3c2410/Kconfig"
943source "arch/arm/mach-s3c2412/Kconfig"
944source "arch/arm/mach-s3c2416/Kconfig"
945source "arch/arm/mach-s3c2440/Kconfig"
946source "arch/arm/mach-s3c2443/Kconfig"
947endif
948
949if ARCH_S3C64XX
950source "arch/arm/mach-s3c64xx/Kconfig"
951endif
952
953source "arch/arm/mach-s5p64x0/Kconfig"
954
955source "arch/arm/mach-s5p6442/Kconfig"
956
957source "arch/arm/mach-s5pc100/Kconfig"
958
959source "arch/arm/mach-s5pv210/Kconfig"
960
961source "arch/arm/mach-s5pv310/Kconfig"
962
963source "arch/arm/mach-shmobile/Kconfig"
964
965source "arch/arm/plat-stmp3xxx/Kconfig"
966
967source "arch/arm/mach-tegra/Kconfig"
968
969source "arch/arm/mach-u300/Kconfig"
970
971source "arch/arm/mach-ux500/Kconfig"
972
973source "arch/arm/mach-versatile/Kconfig"
974
975source "arch/arm/mach-vexpress/Kconfig"
976
977source "arch/arm/mach-w90x900/Kconfig"
978
979# Definitions to make life easier
980config ARCH_ACORN
981	bool
982
983config PLAT_IOP
984	bool
985	select GENERIC_CLOCKEVENTS
986
987config PLAT_ORION
988	bool
989
990config PLAT_PXA
991	bool
992
993config PLAT_VERSATILE
994	bool
995
996config ARM_TIMER_SP804
997	bool
998
999source arch/arm/mm/Kconfig
1000
1001config IWMMXT
1002	bool "Enable iWMMXt support"
1003	depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
1004	default y if PXA27x || PXA3xx || ARCH_MMP
1005	help
1006	  Enable support for iWMMXt context switching at run time if
1007	  running on a CPU that supports it.
1008
1009#  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1010config XSCALE_PMU
1011	bool
1012	depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1013	default y
1014
1015config CPU_HAS_PMU
1016	depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1017		   (!ARCH_OMAP3 || OMAP3_EMU)
1018	default y
1019	bool
1020
1021if !MMU
1022source "arch/arm/Kconfig-nommu"
1023endif
1024
1025config ARM_ERRATA_411920
1026	bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1027	depends on CPU_V6
1028	help
1029	  Invalidation of the Instruction Cache operation can
1030	  fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1031	  It does not affect the MPCore. This option enables the ARM Ltd.
1032	  recommended workaround.
1033
1034config ARM_ERRATA_430973
1035	bool "ARM errata: Stale prediction on replaced interworking branch"
1036	depends on CPU_V7
1037	help
1038	  This option enables the workaround for the 430973 Cortex-A8
1039	  (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1040	  interworking branch is replaced with another code sequence at the
1041	  same virtual address, whether due to self-modifying code or virtual
1042	  to physical address re-mapping, Cortex-A8 does not recover from the
1043	  stale interworking branch prediction. This results in Cortex-A8
1044	  executing the new code sequence in the incorrect ARM or Thumb state.
1045	  The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1046	  and also flushes the branch target cache at every context switch.
1047	  Note that setting specific bits in the ACTLR register may not be
1048	  available in non-secure mode.
1049
1050config ARM_ERRATA_458693
1051	bool "ARM errata: Processor deadlock when a false hazard is created"
1052	depends on CPU_V7
1053	help
1054	  This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1055	  erratum. For very specific sequences of memory operations, it is
1056	  possible for a hazard condition intended for a cache line to instead
1057	  be incorrectly associated with a different cache line. This false
1058	  hazard might then cause a processor deadlock. The workaround enables
1059	  the L1 caching of the NEON accesses and disables the PLD instruction
1060	  in the ACTLR register. Note that setting specific bits in the ACTLR
1061	  register may not be available in non-secure mode.
1062
1063config ARM_ERRATA_460075
1064	bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1065	depends on CPU_V7
1066	help
1067	  This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1068	  erratum. Any asynchronous access to the L2 cache may encounter a
1069	  situation in which recent store transactions to the L2 cache are lost
1070	  and overwritten with stale memory contents from external memory. The
1071	  workaround disables the write-allocate mode for the L2 cache via the
1072	  ACTLR register. Note that setting specific bits in the ACTLR register
1073	  may not be available in non-secure mode.
1074
1075config ARM_ERRATA_742230
1076	bool "ARM errata: DMB operation may be faulty"
1077	depends on CPU_V7 && SMP
1078	help
1079	  This option enables the workaround for the 742230 Cortex-A9
1080	  (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1081	  between two write operations may not ensure the correct visibility
1082	  ordering of the two writes. This workaround sets a specific bit in
1083	  the diagnostic register of the Cortex-A9 which causes the DMB
1084	  instruction to behave as a DSB, ensuring the correct behaviour of
1085	  the two writes.
1086
1087config ARM_ERRATA_742231
1088	bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1089	depends on CPU_V7 && SMP
1090	help
1091	  This option enables the workaround for the 742231 Cortex-A9
1092	  (r2p0..r2p2) erratum. Under certain conditions, specific to the
1093	  Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1094	  accessing some data located in the same cache line, may get corrupted
1095	  data due to bad handling of the address hazard when the line gets
1096	  replaced from one of the CPUs at the same time as another CPU is
1097	  accessing it. This workaround sets specific bits in the diagnostic
1098	  register of the Cortex-A9 which reduces the linefill issuing
1099	  capabilities of the processor.
1100
1101config PL310_ERRATA_588369
1102	bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1103	depends on CACHE_L2X0 && ARCH_OMAP4
1104	help
1105	   The PL310 L2 cache controller implements three types of Clean &
1106	   Invalidate maintenance operations: by Physical Address
1107	   (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1108	   They are architecturally defined to behave as the execution of a
1109	   clean operation followed immediately by an invalidate operation,
1110	   both performing to the same memory location. This functionality
1111	   is not correctly implemented in PL310 as clean lines are not
1112	   invalidated as a result of these operations. Note that this errata
1113	   uses Texas Instrument's secure monitor api.
1114
1115config ARM_ERRATA_720789
1116	bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1117	depends on CPU_V7 && SMP
1118	help
1119	  This option enables the workaround for the 720789 Cortex-A9 (prior to
1120	  r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1121	  broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1122	  As a consequence of this erratum, some TLB entries which should be
1123	  invalidated are not, resulting in an incoherency in the system page
1124	  tables. The workaround changes the TLB flushing routines to invalidate
1125	  entries regardless of the ASID.
1126
1127config ARM_ERRATA_743622
1128	bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1129	depends on CPU_V7
1130	help
1131	  This option enables the workaround for the 743622 Cortex-A9
1132	  (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1133	  optimisation in the Cortex-A9 Store Buffer may lead to data
1134	  corruption. This workaround sets a specific bit in the diagnostic
1135	  register of the Cortex-A9 which disables the Store Buffer
1136	  optimisation, preventing the defect from occurring. This has no
1137	  visible impact on the overall performance or power consumption of the
1138	  processor.
1139
1140endmenu
1141
1142source "arch/arm/common/Kconfig"
1143
1144menu "Bus support"
1145
1146config ARM_AMBA
1147	bool
1148
1149config ISA
1150	bool
1151	help
1152	  Find out whether you have ISA slots on your motherboard.  ISA is the
1153	  name of a bus system, i.e. the way the CPU talks to the other stuff
1154	  inside your box.  Other bus systems are PCI, EISA, MicroChannel
1155	  (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1156	  newer boards don't support it.  If you have ISA, say Y, otherwise N.
1157
1158# Select ISA DMA controller support
1159config ISA_DMA
1160	bool
1161	select ISA_DMA_API
1162
1163# Select ISA DMA interface
1164config ISA_DMA_API
1165	bool
1166
1167config PCI
1168	bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1169	help
1170	  Find out whether you have a PCI motherboard. PCI is the name of a
1171	  bus system, i.e. the way the CPU talks to the other stuff inside
1172	  your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1173	  VESA. If you have PCI, say Y, otherwise N.
1174
1175config PCI_DOMAINS
1176	bool
1177	depends on PCI
1178
1179config PCI_SYSCALL
1180	def_bool PCI
1181
1182# Select the host bridge type
1183config PCI_HOST_VIA82C505
1184	bool
1185	depends on PCI && ARCH_SHARK
1186	default y
1187
1188config PCI_HOST_ITE8152
1189	bool
1190	depends on PCI && MACH_ARMCORE
1191	default y
1192	select DMABOUNCE
1193
1194source "drivers/pci/Kconfig"
1195
1196source "drivers/pcmcia/Kconfig"
1197
1198endmenu
1199
1200menu "Kernel Features"
1201
1202source "kernel/time/Kconfig"
1203
1204config SMP
1205	bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1206	depends on EXPERIMENTAL
1207	depends on GENERIC_CLOCKEVENTS
1208	depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1209		 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
1210		 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
1211	select USE_GENERIC_SMP_HELPERS
1212	select HAVE_ARM_SCU
1213	help
1214	  This enables support for systems with more than one CPU. If you have
1215	  a system with only one CPU, like most personal computers, say N. If
1216	  you have a system with more than one CPU, say Y.
1217
1218	  If you say N here, the kernel will run on single and multiprocessor
1219	  machines, but will use only one CPU of a multiprocessor machine. If
1220	  you say Y here, the kernel will run on many, but not all, single
1221	  processor machines. On a single processor machine, the kernel will
1222	  run faster if you say N here.
1223
1224	  See also <file:Documentation/i386/IO-APIC.txt>,
1225	  <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1226	  <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1227
1228	  If you don't know what to do here, say N.
1229
1230config SMP_ON_UP
1231	bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1232	depends on EXPERIMENTAL
1233	depends on SMP && !XIP && !THUMB2_KERNEL
1234	default y
1235	help
1236	  SMP kernels contain instructions which fail on non-SMP processors.
1237	  Enabling this option allows the kernel to modify itself to make
1238	  these instructions safe.  Disabling it allows about 1K of space
1239	  savings.
1240
1241	  If you don't know what to do here, say Y.
1242
1243config HAVE_ARM_SCU
1244	bool
1245	depends on SMP
1246	help
1247	  This option enables support for the ARM system coherency unit
1248
1249config HAVE_ARM_TWD
1250	bool
1251	depends on SMP
1252	help
1253	  This options enables support for the ARM timer and watchdog unit
1254
1255choice
1256	prompt "Memory split"
1257	default VMSPLIT_3G
1258	help
1259	  Select the desired split between kernel and user memory.
1260
1261	  If you are not absolutely sure what you are doing, leave this
1262	  option alone!
1263
1264	config VMSPLIT_3G
1265		bool "3G/1G user/kernel split"
1266	config VMSPLIT_2G
1267		bool "2G/2G user/kernel split"
1268	config VMSPLIT_1G
1269		bool "1G/3G user/kernel split"
1270endchoice
1271
1272config PAGE_OFFSET
1273	hex
1274	default 0x40000000 if VMSPLIT_1G
1275	default 0x80000000 if VMSPLIT_2G
1276	default 0xC0000000
1277
1278config NR_CPUS
1279	int "Maximum number of CPUs (2-32)"
1280	range 2 32
1281	depends on SMP
1282	default "4"
1283
1284config HOTPLUG_CPU
1285	bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1286	depends on SMP && HOTPLUG && EXPERIMENTAL
1287	help
1288	  Say Y here to experiment with turning CPUs off and on.  CPUs
1289	  can be controlled through /sys/devices/system/cpu.
1290
1291config LOCAL_TIMERS
1292	bool "Use local timer interrupts"
1293	depends on SMP
1294	default y
1295	select HAVE_ARM_TWD
1296	help
1297	  Enable support for local timers on SMP platforms, rather then the
1298	  legacy IPI broadcast method.  Local timers allows the system
1299	  accounting to be spread across the timer interval, preventing a
1300	  "thundering herd" at every timer tick.
1301
1302source kernel/Kconfig.preempt
1303
1304config HZ
1305	int
1306	default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1307		ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1308	default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1309	default AT91_TIMER_HZ if ARCH_AT91
1310	default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1311	default 100
1312
1313config THUMB2_KERNEL
1314	bool "Compile the kernel in Thumb-2 mode"
1315	depends on CPU_V7 && EXPERIMENTAL
1316	select AEABI
1317	select ARM_ASM_UNIFIED
1318	help
1319	  By enabling this option, the kernel will be compiled in
1320	  Thumb-2 mode. A compiler/assembler that understand the unified
1321	  ARM-Thumb syntax is needed.
1322
1323	  If unsure, say N.
1324
1325config ARM_ASM_UNIFIED
1326	bool
1327
1328config AEABI
1329	bool "Use the ARM EABI to compile the kernel"
1330	help
1331	  This option allows for the kernel to be compiled using the latest
1332	  ARM ABI (aka EABI).  This is only useful if you are using a user
1333	  space environment that is also compiled with EABI.
1334
1335	  Since there are major incompatibilities between the legacy ABI and
1336	  EABI, especially with regard to structure member alignment, this
1337	  option also changes the kernel syscall calling convention to
1338	  disambiguate both ABIs and allow for backward compatibility support
1339	  (selected with CONFIG_OABI_COMPAT).
1340
1341	  To use this you need GCC version 4.0.0 or later.
1342
1343config OABI_COMPAT
1344	bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1345	depends on AEABI && EXPERIMENTAL
1346	default y
1347	help
1348	  This option preserves the old syscall interface along with the
1349	  new (ARM EABI) one. It also provides a compatibility layer to
1350	  intercept syscalls that have structure arguments which layout
1351	  in memory differs between the legacy ABI and the new ARM EABI
1352	  (only for non "thumb" binaries). This option adds a tiny
1353	  overhead to all syscalls and produces a slightly larger kernel.
1354	  If you know you'll be using only pure EABI user space then you
1355	  can say N here. If this option is not selected and you attempt
1356	  to execute a legacy ABI binary then the result will be
1357	  UNPREDICTABLE (in fact it can be predicted that it won't work
1358	  at all). If in doubt say Y.
1359
1360config ARCH_HAS_HOLES_MEMORYMODEL
1361	bool
1362
1363config ARCH_SPARSEMEM_ENABLE
1364	bool
1365
1366config ARCH_SPARSEMEM_DEFAULT
1367	def_bool ARCH_SPARSEMEM_ENABLE
1368
1369config ARCH_SELECT_MEMORY_MODEL
1370	def_bool ARCH_SPARSEMEM_ENABLE
1371
1372config HIGHMEM
1373	bool "High Memory Support (EXPERIMENTAL)"
1374	depends on MMU && EXPERIMENTAL
1375	help
1376	  The address space of ARM processors is only 4 Gigabytes large
1377	  and it has to accommodate user address space, kernel address
1378	  space as well as some memory mapped IO. That means that, if you
1379	  have a large amount of physical memory and/or IO, not all of the
1380	  memory can be "permanently mapped" by the kernel. The physical
1381	  memory that is not permanently mapped is called "high memory".
1382
1383	  Depending on the selected kernel/user memory split, minimum
1384	  vmalloc space and actual amount of RAM, you may not need this
1385	  option which should result in a slightly faster kernel.
1386
1387	  If unsure, say n.
1388
1389config HIGHPTE
1390	bool "Allocate 2nd-level pagetables from highmem"
1391	depends on HIGHMEM
1392	depends on !OUTER_CACHE
1393
1394config HW_PERF_EVENTS
1395	bool "Enable hardware performance counter support for perf events"
1396	depends on PERF_EVENTS && CPU_HAS_PMU
1397	default y
1398	help
1399	  Enable hardware performance counter support for perf events. If
1400	  disabled, perf events will use software events only.
1401
1402config SPARSE_IRQ
1403	def_bool n
1404	help
1405	  This enables support for sparse irqs. This is useful in general
1406	  as most CPUs have a fairly sparse array of IRQ vectors, which
1407	  the irq_desc then maps directly on to. Systems with a high
1408	  number of off-chip IRQs will want to treat this as
1409	  experimental until they have been independently verified.
1410
1411source "mm/Kconfig"
1412
1413config FORCE_MAX_ZONEORDER
1414	int "Maximum zone order" if ARCH_SHMOBILE
1415	range 11 64 if ARCH_SHMOBILE
1416	default "9" if SA1111
1417	default "11"
1418	help
1419	  The kernel memory allocator divides physically contiguous memory
1420	  blocks into "zones", where each zone is a power of two number of
1421	  pages.  This option selects the largest power of two that the kernel
1422	  keeps in the memory allocator.  If you need to allocate very large
1423	  blocks of physically contiguous memory, then you may need to
1424	  increase this value.
1425
1426	  This config option is actually maximum order plus one. For example,
1427	  a value of 11 means that the largest free memory block is 2^10 pages.
1428
1429config LEDS
1430	bool "Timer and CPU usage LEDs"
1431	depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1432		   ARCH_EBSA285 || ARCH_INTEGRATOR || \
1433		   ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1434		   ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1435		   ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1436		   ARCH_AT91 || ARCH_DAVINCI || \
1437		   ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1438	help
1439	  If you say Y here, the LEDs on your machine will be used
1440	  to provide useful information about your current system status.
1441
1442	  If you are compiling a kernel for a NetWinder or EBSA-285, you will
1443	  be able to select which LEDs are active using the options below. If
1444	  you are compiling a kernel for the EBSA-110 or the LART however, the
1445	  red LED will simply flash regularly to indicate that the system is
1446	  still functional. It is safe to say Y here if you have a CATS
1447	  system, but the driver will do nothing.
1448
1449config LEDS_TIMER
1450	bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1451			    OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1452			    || MACH_OMAP_PERSEUS2
1453	depends on LEDS
1454	depends on !GENERIC_CLOCKEVENTS
1455	default y if ARCH_EBSA110
1456	help
1457	  If you say Y here, one of the system LEDs (the green one on the
1458	  NetWinder, the amber one on the EBSA285, or the red one on the LART)
1459	  will flash regularly to indicate that the system is still
1460	  operational. This is mainly useful to kernel hackers who are
1461	  debugging unstable kernels.
1462
1463	  The LART uses the same LED for both Timer LED and CPU usage LED
1464	  functions. You may choose to use both, but the Timer LED function
1465	  will overrule the CPU usage LED.
1466
1467config LEDS_CPU
1468	bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1469			!ARCH_OMAP) \
1470			|| OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1471			|| MACH_OMAP_PERSEUS2
1472	depends on LEDS
1473	help
1474	  If you say Y here, the red LED will be used to give a good real
1475	  time indication of CPU usage, by lighting whenever the idle task
1476	  is not currently executing.
1477
1478	  The LART uses the same LED for both Timer LED and CPU usage LED
1479	  functions. You may choose to use both, but the Timer LED function
1480	  will overrule the CPU usage LED.
1481
1482config ALIGNMENT_TRAP
1483	bool
1484	depends on CPU_CP15_MMU
1485	default y if !ARCH_EBSA110
1486	select HAVE_PROC_CPU if PROC_FS
1487	help
1488	  ARM processors cannot fetch/store information which is not
1489	  naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1490	  address divisible by 4. On 32-bit ARM processors, these non-aligned
1491	  fetch/store instructions will be emulated in software if you say
1492	  here, which has a severe performance impact. This is necessary for
1493	  correct operation of some network protocols. With an IP-only
1494	  configuration it is safe to say N, otherwise say Y.
1495
1496config UACCESS_WITH_MEMCPY
1497	bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1498	depends on MMU && EXPERIMENTAL
1499	default y if CPU_FEROCEON
1500	help
1501	  Implement faster copy_to_user and clear_user methods for CPU
1502	  cores where a 8-word STM instruction give significantly higher
1503	  memory write throughput than a sequence of individual 32bit stores.
1504
1505	  A possible side effect is a slight increase in scheduling latency
1506	  between threads sharing the same address space if they invoke
1507	  such copy operations with large buffers.
1508
1509	  However, if the CPU data cache is using a write-allocate mode,
1510	  this option is unlikely to provide any performance gain.
1511
1512config SECCOMP
1513	bool
1514	prompt "Enable seccomp to safely compute untrusted bytecode"
1515	---help---
1516	  This kernel feature is useful for number crunching applications
1517	  that may need to compute untrusted bytecode during their
1518	  execution. By using pipes or other transports made available to
1519	  the process as file descriptors supporting the read/write
1520	  syscalls, it's possible to isolate those applications in
1521	  their own address space using seccomp. Once seccomp is
1522	  enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1523	  and the task is only allowed to execute a few safe syscalls
1524	  defined by each seccomp mode.
1525
1526config CC_STACKPROTECTOR
1527	bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1528	help
1529	  This option turns on the -fstack-protector GCC feature. This
1530	  feature puts, at the beginning of functions, a canary value on
1531	  the stack just before the return address, and validates
1532	  the value just before actually returning.  Stack based buffer
1533	  overflows (that need to overwrite this return address) now also
1534	  overwrite the canary, which gets detected and the attack is then
1535	  neutralized via a kernel panic.
1536	  This feature requires gcc version 4.2 or above.
1537
1538config DEPRECATED_PARAM_STRUCT
1539	bool "Provide old way to pass kernel parameters"
1540	help
1541	  This was deprecated in 2001 and announced to live on for 5 years.
1542	  Some old boot loaders still use this way.
1543
1544endmenu
1545
1546menu "Boot options"
1547
1548# Compressed boot loader in ROM.  Yes, we really want to ask about
1549# TEXT and BSS so we preserve their values in the config files.
1550config ZBOOT_ROM_TEXT
1551	hex "Compressed ROM boot loader base address"
1552	default "0"
1553	help
1554	  The physical address at which the ROM-able zImage is to be
1555	  placed in the target.  Platforms which normally make use of
1556	  ROM-able zImage formats normally set this to a suitable
1557	  value in their defconfig file.
1558
1559	  If ZBOOT_ROM is not enabled, this has no effect.
1560
1561config ZBOOT_ROM_BSS
1562	hex "Compressed ROM boot loader BSS address"
1563	default "0"
1564	help
1565	  The base address of an area of read/write memory in the target
1566	  for the ROM-able zImage which must be available while the
1567	  decompressor is running. It must be large enough to hold the
1568	  entire decompressed kernel plus an additional 128 KiB.
1569	  Platforms which normally make use of ROM-able zImage formats
1570	  normally set this to a suitable value in their defconfig file.
1571
1572	  If ZBOOT_ROM is not enabled, this has no effect.
1573
1574config ZBOOT_ROM
1575	bool "Compressed boot loader in ROM/flash"
1576	depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1577	help
1578	  Say Y here if you intend to execute your compressed kernel image
1579	  (zImage) directly from ROM or flash.  If unsure, say N.
1580
1581config CMDLINE
1582	string "Default kernel command string"
1583	default ""
1584	help
1585	  On some architectures (EBSA110 and CATS), there is currently no way
1586	  for the boot loader to pass arguments to the kernel. For these
1587	  architectures, you should supply some command-line options at build
1588	  time by entering them here. As a minimum, you should specify the
1589	  memory size and the root device (e.g., mem=64M root=/dev/nfs).
1590
1591config CMDLINE_FORCE
1592	bool "Always use the default kernel command string"
1593	depends on CMDLINE != ""
1594	help
1595	  Always use the default kernel command string, even if the boot
1596	  loader passes other arguments to the kernel.
1597	  This is useful if you cannot or don't want to change the
1598	  command-line options your boot loader passes to the kernel.
1599
1600	  If unsure, say N.
1601
1602config XIP_KERNEL
1603	bool "Kernel Execute-In-Place from ROM"
1604	depends on !ZBOOT_ROM
1605	help
1606	  Execute-In-Place allows the kernel to run from non-volatile storage
1607	  directly addressable by the CPU, such as NOR flash. This saves RAM
1608	  space since the text section of the kernel is not loaded from flash
1609	  to RAM.  Read-write sections, such as the data section and stack,
1610	  are still copied to RAM.  The XIP kernel is not compressed since
1611	  it has to run directly from flash, so it will take more space to
1612	  store it.  The flash address used to link the kernel object files,
1613	  and for storing it, is configuration dependent. Therefore, if you
1614	  say Y here, you must know the proper physical address where to
1615	  store the kernel image depending on your own flash memory usage.
1616
1617	  Also note that the make target becomes "make xipImage" rather than
1618	  "make zImage" or "make Image".  The final kernel binary to put in
1619	  ROM memory will be arch/arm/boot/xipImage.
1620
1621	  If unsure, say N.
1622
1623config XIP_PHYS_ADDR
1624	hex "XIP Kernel Physical Location"
1625	depends on XIP_KERNEL
1626	default "0x00080000"
1627	help
1628	  This is the physical address in your flash memory the kernel will
1629	  be linked for and stored to.  This address is dependent on your
1630	  own flash usage.
1631
1632config KEXEC
1633	bool "Kexec system call (EXPERIMENTAL)"
1634	depends on EXPERIMENTAL
1635	help
1636	  kexec is a system call that implements the ability to shutdown your
1637	  current kernel, and to start another kernel.  It is like a reboot
1638	  but it is independent of the system firmware.   And like a reboot
1639	  you can start any kernel with it, not just Linux.
1640
1641	  It is an ongoing process to be certain the hardware in a machine
1642	  is properly shutdown, so do not be surprised if this code does not
1643	  initially work for you.  It may help to enable device hotplugging
1644	  support.
1645
1646config ATAGS_PROC
1647	bool "Export atags in procfs"
1648	depends on KEXEC
1649	default y
1650	help
1651	  Should the atags used to boot the kernel be exported in an "atags"
1652	  file in procfs. Useful with kexec.
1653
1654config AUTO_ZRELADDR
1655	bool "Auto calculation of the decompressed kernel image address"
1656	depends on !ZBOOT_ROM && !ARCH_U300
1657	help
1658	  ZRELADDR is the physical address where the decompressed kernel
1659	  image will be placed. If AUTO_ZRELADDR is selected, the address
1660	  will be determined at run-time by masking the current IP with
1661	  0xf8000000. This assumes the zImage being placed in the first 128MB
1662	  from start of memory.
1663
1664endmenu
1665
1666menu "CPU Power Management"
1667
1668if ARCH_HAS_CPUFREQ
1669
1670source "drivers/cpufreq/Kconfig"
1671
1672config CPU_FREQ_IMX
1673	tristate "CPUfreq driver for i.MX CPUs"
1674	depends on ARCH_MXC && CPU_FREQ
1675	help
1676	  This enables the CPUfreq driver for i.MX CPUs.
1677
1678config CPU_FREQ_SA1100
1679	bool
1680
1681config CPU_FREQ_SA1110
1682	bool
1683
1684config CPU_FREQ_INTEGRATOR
1685	tristate "CPUfreq driver for ARM Integrator CPUs"
1686	depends on ARCH_INTEGRATOR && CPU_FREQ
1687	default y
1688	help
1689	  This enables the CPUfreq driver for ARM Integrator CPUs.
1690
1691	  For details, take a look at <file:Documentation/cpu-freq>.
1692
1693	  If in doubt, say Y.
1694
1695config CPU_FREQ_PXA
1696	bool
1697	depends on CPU_FREQ && ARCH_PXA && PXA25x
1698	default y
1699	select CPU_FREQ_DEFAULT_GOV_USERSPACE
1700
1701config CPU_FREQ_S3C64XX
1702	bool "CPUfreq support for Samsung S3C64XX CPUs"
1703	depends on CPU_FREQ && CPU_S3C6410
1704
1705config CPU_FREQ_S3C
1706	bool
1707	help
1708	  Internal configuration node for common cpufreq on Samsung SoC
1709
1710config CPU_FREQ_S3C24XX
1711	bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1712	depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1713	select CPU_FREQ_S3C
1714	help
1715	  This enables the CPUfreq driver for the Samsung S3C24XX family
1716	  of CPUs.
1717
1718	  For details, take a look at <file:Documentation/cpu-freq>.
1719
1720	  If in doubt, say N.
1721
1722config CPU_FREQ_S3C24XX_PLL
1723	bool "Support CPUfreq changing of PLL frequency"
1724	depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1725	help
1726	  Compile in support for changing the PLL frequency from the
1727	  S3C24XX series CPUfreq driver. The PLL takes time to settle
1728	  after a frequency change, so by default it is not enabled.
1729
1730	  This also means that the PLL tables for the selected CPU(s) will
1731	  be built which may increase the size of the kernel image.
1732
1733config CPU_FREQ_S3C24XX_DEBUG
1734	bool "Debug CPUfreq Samsung driver core"
1735	depends on CPU_FREQ_S3C24XX
1736	help
1737	  Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1738
1739config CPU_FREQ_S3C24XX_IODEBUG
1740	bool "Debug CPUfreq Samsung driver IO timing"
1741	depends on CPU_FREQ_S3C24XX
1742	help
1743	  Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1744
1745config CPU_FREQ_S3C24XX_DEBUGFS
1746	bool "Export debugfs for CPUFreq"
1747	depends on CPU_FREQ_S3C24XX && DEBUG_FS
1748	help
1749	  Export status information via debugfs.
1750
1751endif
1752
1753source "drivers/cpuidle/Kconfig"
1754
1755endmenu
1756
1757menu "Floating point emulation"
1758
1759comment "At least one emulation must be selected"
1760
1761config FPE_NWFPE
1762	bool "NWFPE math emulation"
1763	depends on !AEABI || OABI_COMPAT
1764	---help---
1765	  Say Y to include the NWFPE floating point emulator in the kernel.
1766	  This is necessary to run most binaries. Linux does not currently
1767	  support floating point hardware so you need to say Y here even if
1768	  your machine has an FPA or floating point co-processor podule.
1769
1770	  You may say N here if you are going to load the Acorn FPEmulator
1771	  early in the bootup.
1772
1773config FPE_NWFPE_XP
1774	bool "Support extended precision"
1775	depends on FPE_NWFPE
1776	help
1777	  Say Y to include 80-bit support in the kernel floating-point
1778	  emulator.  Otherwise, only 32 and 64-bit support is compiled in.
1779	  Note that gcc does not generate 80-bit operations by default,
1780	  so in most cases this option only enlarges the size of the
1781	  floating point emulator without any good reason.
1782
1783	  You almost surely want to say N here.
1784
1785config FPE_FASTFPE
1786	bool "FastFPE math emulation (EXPERIMENTAL)"
1787	depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1788	---help---
1789	  Say Y here to include the FAST floating point emulator in the kernel.
1790	  This is an experimental much faster emulator which now also has full
1791	  precision for the mantissa.  It does not support any exceptions.
1792	  It is very simple, and approximately 3-6 times faster than NWFPE.
1793
1794	  It should be sufficient for most programs.  It may be not suitable
1795	  for scientific calculations, but you have to check this for yourself.
1796	  If you do not feel you need a faster FP emulation you should better
1797	  choose NWFPE.
1798
1799config VFP
1800	bool "VFP-format floating point maths"
1801	depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1802	help
1803	  Say Y to include VFP support code in the kernel. This is needed
1804	  if your hardware includes a VFP unit.
1805
1806	  Please see <file:Documentation/arm/VFP/release-notes.txt> for
1807	  release notes and additional status information.
1808
1809	  Say N if your target does not have VFP hardware.
1810
1811config VFPv3
1812	bool
1813	depends on VFP
1814	default y if CPU_V7
1815
1816config NEON
1817	bool "Advanced SIMD (NEON) Extension support"
1818	depends on VFPv3 && CPU_V7
1819	help
1820	  Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1821	  Extension.
1822
1823endmenu
1824
1825menu "Userspace binary formats"
1826
1827source "fs/Kconfig.binfmt"
1828
1829config ARTHUR
1830	tristate "RISC OS personality"
1831	depends on !AEABI
1832	help
1833	  Say Y here to include the kernel code necessary if you want to run
1834	  Acorn RISC OS/Arthur binaries under Linux. This code is still very
1835	  experimental; if this sounds frightening, say N and sleep in peace.
1836	  You can also say M here to compile this support as a module (which
1837	  will be called arthur).
1838
1839endmenu
1840
1841menu "Power management options"
1842
1843source "kernel/power/Kconfig"
1844
1845config ARCH_SUSPEND_POSSIBLE
1846	def_bool y
1847
1848endmenu
1849
1850source "net/Kconfig"
1851
1852source "drivers/Kconfig"
1853
1854source "fs/Kconfig"
1855
1856source "arch/arm/Kconfig.debug"
1857
1858source "security/Kconfig"
1859
1860source "crypto/Kconfig"
1861
1862source "lib/Kconfig"
1863