1config ARM 2 bool 3 default y 4 select HAVE_AOUT 5 select HAVE_DMA_API_DEBUG 6 select HAVE_IDE if PCI || ISA || PCMCIA 7 select HAVE_MEMBLOCK 8 select RTC_LIB 9 select SYS_SUPPORTS_APM_EMULATION 10 select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI) 11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS) 12 select HAVE_ARCH_KGDB 13 select HAVE_KPROBES if !XIP_KERNEL 14 select HAVE_KRETPROBES if (HAVE_KPROBES) 15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) 16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) 17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) 18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) 19 select HAVE_GENERIC_DMA_COHERENT 20 select HAVE_KERNEL_GZIP 21 select HAVE_KERNEL_LZO 22 select HAVE_KERNEL_LZMA 23 select HAVE_IRQ_WORK 24 select HAVE_PERF_EVENTS 25 select PERF_USE_VMALLOC 26 select HAVE_REGS_AND_STACK_ACCESS_API 27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)) 28 select HAVE_C_RECORDMCOUNT 29 select HAVE_GENERIC_HARDIRQS 30 select HAVE_SPARSE_IRQ 31 select GENERIC_IRQ_SHOW 32 select CPU_PM if (SUSPEND || CPU_IDLE) 33 help 34 The ARM series is a line of low-power-consumption RISC chip designs 35 licensed by ARM Ltd and targeted at embedded applications and 36 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer 37 manufactured, but legacy ARM-based PC hardware remains popular in 38 Europe. There is an ARM Linux project with a web page at 39 <http://www.arm.linux.org.uk/>. 40 41config ARM_HAS_SG_CHAIN 42 bool 43 44config HAVE_PWM 45 bool 46 47config MIGHT_HAVE_PCI 48 bool 49 50config SYS_SUPPORTS_APM_EMULATION 51 bool 52 53config HAVE_SCHED_CLOCK 54 bool 55 56config GENERIC_GPIO 57 bool 58 59config ARCH_USES_GETTIMEOFFSET 60 bool 61 default n 62 63config GENERIC_CLOCKEVENTS 64 bool 65 66config GENERIC_CLOCKEVENTS_BROADCAST 67 bool 68 depends on GENERIC_CLOCKEVENTS 69 default y if SMP 70 71config KTIME_SCALAR 72 bool 73 default y 74 75config HAVE_TCM 76 bool 77 select GENERIC_ALLOCATOR 78 79config HAVE_PROC_CPU 80 bool 81 82config NO_IOPORT 83 bool 84 85config EISA 86 bool 87 ---help--- 88 The Extended Industry Standard Architecture (EISA) bus was 89 developed as an open alternative to the IBM MicroChannel bus. 90 91 The EISA bus provided some of the features of the IBM MicroChannel 92 bus while maintaining backward compatibility with cards made for 93 the older ISA bus. The EISA bus saw limited use between 1988 and 94 1995 when it was made obsolete by the PCI bus. 95 96 Say Y here if you are building a kernel for an EISA-based machine. 97 98 Otherwise, say N. 99 100config SBUS 101 bool 102 103config MCA 104 bool 105 help 106 MicroChannel Architecture is found in some IBM PS/2 machines and 107 laptops. It is a bus system similar to PCI or ISA. See 108 <file:Documentation/mca.txt> (and especially the web page given 109 there) before attempting to build an MCA bus kernel. 110 111config STACKTRACE_SUPPORT 112 bool 113 default y 114 115config HAVE_LATENCYTOP_SUPPORT 116 bool 117 depends on !SMP 118 default y 119 120config LOCKDEP_SUPPORT 121 bool 122 default y 123 124config TRACE_IRQFLAGS_SUPPORT 125 bool 126 default y 127 128config HARDIRQS_SW_RESEND 129 bool 130 default y 131 132config GENERIC_IRQ_PROBE 133 bool 134 default y 135 136config GENERIC_LOCKBREAK 137 bool 138 default y 139 depends on SMP && PREEMPT 140 141config RWSEM_GENERIC_SPINLOCK 142 bool 143 default y 144 145config RWSEM_XCHGADD_ALGORITHM 146 bool 147 148config ARCH_HAS_ILOG2_U32 149 bool 150 151config ARCH_HAS_ILOG2_U64 152 bool 153 154config ARCH_HAS_CPUFREQ 155 bool 156 help 157 Internal node to signify that the ARCH has CPUFREQ support 158 and that the relevant menu configurations are displayed for 159 it. 160 161config ARCH_HAS_CPU_IDLE_WAIT 162 def_bool y 163 164config GENERIC_HWEIGHT 165 bool 166 default y 167 168config GENERIC_CALIBRATE_DELAY 169 bool 170 default y 171 172config ARCH_MAY_HAVE_PC_FDC 173 bool 174 175config ZONE_DMA 176 bool 177 178config NEED_DMA_MAP_STATE 179 def_bool y 180 181config GENERIC_ISA_DMA 182 bool 183 184config FIQ 185 bool 186 187config ARCH_MTD_XIP 188 bool 189 190config VECTORS_BASE 191 hex 192 default 0xffff0000 if MMU || CPU_HIGH_VECTOR 193 default DRAM_BASE if REMAP_VECTORS_TO_RAM 194 default 0x00000000 195 help 196 The base address of exception vectors. 197 198config ARM_PATCH_PHYS_VIRT 199 bool "Patch physical to virtual translations at runtime" if EMBEDDED 200 default y 201 depends on !XIP_KERNEL && MMU 202 depends on !ARCH_REALVIEW || !SPARSEMEM 203 help 204 Patch phys-to-virt and virt-to-phys translation functions at 205 boot and module load time according to the position of the 206 kernel in system memory. 207 208 This can only be used with non-XIP MMU kernels where the base 209 of physical memory is at a 16MB boundary. 210 211 Only disable this option if you know that you do not require 212 this feature (eg, building a kernel for a single machine) and 213 you need to shrink the kernel to the minimal size. 214 215config NEED_MACH_MEMORY_H 216 bool 217 help 218 Select this when mach/memory.h is required to provide special 219 definitions for this platform. The need for mach/memory.h should 220 be avoided when possible. 221 222config PHYS_OFFSET 223 hex "Physical address of main memory" 224 depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H 225 help 226 Please provide the physical address corresponding to the 227 location of main memory in your system. 228 229config GENERIC_BUG 230 def_bool y 231 depends on BUG 232 233source "init/Kconfig" 234 235source "kernel/Kconfig.freezer" 236 237menu "System Type" 238 239config MMU 240 bool "MMU-based Paged Memory Management Support" 241 default y 242 help 243 Select if you want MMU-based virtualised addressing space 244 support by paged memory management. If unsure, say 'Y'. 245 246# 247# The "ARM system type" choice list is ordered alphabetically by option 248# text. Please add new entries in the option alphabetic order. 249# 250choice 251 prompt "ARM system type" 252 default ARCH_VERSATILE 253 254config ARCH_INTEGRATOR 255 bool "ARM Ltd. Integrator family" 256 select ARM_AMBA 257 select ARCH_HAS_CPUFREQ 258 select CLKDEV_LOOKUP 259 select HAVE_MACH_CLKDEV 260 select ICST 261 select GENERIC_CLOCKEVENTS 262 select PLAT_VERSATILE 263 select PLAT_VERSATILE_FPGA_IRQ 264 select NEED_MACH_MEMORY_H 265 help 266 Support for ARM's Integrator platform. 267 268config ARCH_REALVIEW 269 bool "ARM Ltd. RealView family" 270 select ARM_AMBA 271 select CLKDEV_LOOKUP 272 select HAVE_MACH_CLKDEV 273 select ICST 274 select GENERIC_CLOCKEVENTS 275 select ARCH_WANT_OPTIONAL_GPIOLIB 276 select PLAT_VERSATILE 277 select PLAT_VERSATILE_CLCD 278 select ARM_TIMER_SP804 279 select GPIO_PL061 if GPIOLIB 280 select NEED_MACH_MEMORY_H 281 select MULTI_IRQ_HANDLER 282 help 283 This enables support for ARM Ltd RealView boards. 284 285config ARCH_VERSATILE 286 bool "ARM Ltd. Versatile family" 287 select ARM_AMBA 288 select ARM_VIC 289 select CLKDEV_LOOKUP 290 select HAVE_MACH_CLKDEV 291 select ICST 292 select GENERIC_CLOCKEVENTS 293 select ARCH_WANT_OPTIONAL_GPIOLIB 294 select PLAT_VERSATILE 295 select PLAT_VERSATILE_CLCD 296 select PLAT_VERSATILE_FPGA_IRQ 297 select ARM_TIMER_SP804 298 help 299 This enables support for ARM Ltd Versatile board. 300 301config ARCH_VEXPRESS 302 bool "ARM Ltd. Versatile Express family" 303 select ARCH_WANT_OPTIONAL_GPIOLIB 304 select ARM_AMBA 305 select ARM_TIMER_SP804 306 select CLKDEV_LOOKUP 307 select HAVE_MACH_CLKDEV 308 select GENERIC_CLOCKEVENTS 309 select HAVE_CLK 310 select HAVE_PATA_PLATFORM 311 select ICST 312 select PLAT_VERSATILE 313 select PLAT_VERSATILE_CLCD 314 select MULTI_IRQ_HANDLER 315 help 316 This enables support for the ARM Ltd Versatile Express boards. 317 318config ARCH_AT91 319 bool "Atmel AT91" 320 select ARCH_REQUIRE_GPIOLIB 321 select HAVE_CLK 322 select CLKDEV_LOOKUP 323 help 324 This enables support for systems based on the Atmel AT91RM9200, 325 AT91SAM9 and AT91CAP9 processors. 326 327config ARCH_BCMRING 328 bool "Broadcom BCMRING" 329 depends on MMU 330 select CPU_V6 331 select ARM_AMBA 332 select ARM_TIMER_SP804 333 select CLKDEV_LOOKUP 334 select GENERIC_CLOCKEVENTS 335 select ARCH_WANT_OPTIONAL_GPIOLIB 336 help 337 Support for Broadcom's BCMRing platform. 338 339config ARCH_HIGHBANK 340 bool "Calxeda Highbank-based" 341 select ARCH_WANT_OPTIONAL_GPIOLIB 342 select ARM_AMBA 343 select ARM_GIC 344 select ARM_TIMER_SP804 345 select CLKDEV_LOOKUP 346 select CPU_V7 347 select GENERIC_CLOCKEVENTS 348 select HAVE_ARM_SCU 349 select USE_OF 350 select MULTI_IRQ_HANDLER 351 help 352 Support for the Calxeda Highbank SoC based boards. 353 354config ARCH_CLPS711X 355 bool "Cirrus Logic CLPS711x/EP721x-based" 356 select CPU_ARM720T 357 select ARCH_USES_GETTIMEOFFSET 358 select NEED_MACH_MEMORY_H 359 help 360 Support for Cirrus Logic 711x/721x based boards. 361 362config ARCH_CNS3XXX 363 bool "Cavium Networks CNS3XXX family" 364 select CPU_V6K 365 select GENERIC_CLOCKEVENTS 366 select ARM_GIC 367 select MIGHT_HAVE_PCI 368 select PCI_DOMAINS if PCI 369 select MULTI_IRQ_HANDLER 370 help 371 Support for Cavium Networks CNS3XXX platform. 372 373config ARCH_GEMINI 374 bool "Cortina Systems Gemini" 375 select CPU_FA526 376 select ARCH_REQUIRE_GPIOLIB 377 select ARCH_USES_GETTIMEOFFSET 378 help 379 Support for the Cortina Systems Gemini family SoCs 380 381config ARCH_PRIMA2 382 bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" 383 select CPU_V7 384 select NO_IOPORT 385 select GENERIC_CLOCKEVENTS 386 select CLKDEV_LOOKUP 387 select GENERIC_IRQ_CHIP 388 select USE_OF 389 select ZONE_DMA 390 help 391 Support for CSR SiRFSoC ARM Cortex A9 Platform 392 393config ARCH_EBSA110 394 bool "EBSA-110" 395 select CPU_SA110 396 select ISA 397 select NO_IOPORT 398 select ARCH_USES_GETTIMEOFFSET 399 select NEED_MACH_MEMORY_H 400 help 401 This is an evaluation board for the StrongARM processor available 402 from Digital. It has limited hardware on-board, including an 403 Ethernet interface, two PCMCIA sockets, two serial ports and a 404 parallel port. 405 406config ARCH_EP93XX 407 bool "EP93xx-based" 408 select CPU_ARM920T 409 select ARM_AMBA 410 select ARM_VIC 411 select CLKDEV_LOOKUP 412 select ARCH_REQUIRE_GPIOLIB 413 select ARCH_HAS_HOLES_MEMORYMODEL 414 select ARCH_USES_GETTIMEOFFSET 415 select NEED_MACH_MEMORY_H 416 help 417 This enables support for the Cirrus EP93xx series of CPUs. 418 419config ARCH_FOOTBRIDGE 420 bool "FootBridge" 421 select CPU_SA110 422 select FOOTBRIDGE 423 select GENERIC_CLOCKEVENTS 424 select HAVE_IDE 425 select NEED_MACH_MEMORY_H 426 help 427 Support for systems based on the DC21285 companion chip 428 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. 429 430config ARCH_MXC 431 bool "Freescale MXC/iMX-based" 432 select GENERIC_CLOCKEVENTS 433 select ARCH_REQUIRE_GPIOLIB 434 select CLKDEV_LOOKUP 435 select CLKSRC_MMIO 436 select GENERIC_IRQ_CHIP 437 select HAVE_SCHED_CLOCK 438 select MULTI_IRQ_HANDLER 439 help 440 Support for Freescale MXC/iMX-based family of processors 441 442config ARCH_MXS 443 bool "Freescale MXS-based" 444 select GENERIC_CLOCKEVENTS 445 select ARCH_REQUIRE_GPIOLIB 446 select CLKDEV_LOOKUP 447 select CLKSRC_MMIO 448 help 449 Support for Freescale MXS-based family of processors 450 451config ARCH_NETX 452 bool "Hilscher NetX based" 453 select CLKSRC_MMIO 454 select CPU_ARM926T 455 select ARM_VIC 456 select GENERIC_CLOCKEVENTS 457 help 458 This enables support for systems based on the Hilscher NetX Soc 459 460config ARCH_H720X 461 bool "Hynix HMS720x-based" 462 select CPU_ARM720T 463 select ISA_DMA_API 464 select ARCH_USES_GETTIMEOFFSET 465 help 466 This enables support for systems based on the Hynix HMS720x 467 468config ARCH_IOP13XX 469 bool "IOP13xx-based" 470 depends on MMU 471 select CPU_XSC3 472 select PLAT_IOP 473 select PCI 474 select ARCH_SUPPORTS_MSI 475 select VMSPLIT_1G 476 select NEED_MACH_MEMORY_H 477 help 478 Support for Intel's IOP13XX (XScale) family of processors. 479 480config ARCH_IOP32X 481 bool "IOP32x-based" 482 depends on MMU 483 select CPU_XSCALE 484 select PLAT_IOP 485 select PCI 486 select ARCH_REQUIRE_GPIOLIB 487 help 488 Support for Intel's 80219 and IOP32X (XScale) family of 489 processors. 490 491config ARCH_IOP33X 492 bool "IOP33x-based" 493 depends on MMU 494 select CPU_XSCALE 495 select PLAT_IOP 496 select PCI 497 select ARCH_REQUIRE_GPIOLIB 498 help 499 Support for Intel's IOP33X (XScale) family of processors. 500 501config ARCH_IXP23XX 502 bool "IXP23XX-based" 503 depends on MMU 504 select CPU_XSC3 505 select PCI 506 select ARCH_USES_GETTIMEOFFSET 507 select NEED_MACH_MEMORY_H 508 help 509 Support for Intel's IXP23xx (XScale) family of processors. 510 511config ARCH_IXP2000 512 bool "IXP2400/2800-based" 513 depends on MMU 514 select CPU_XSCALE 515 select PCI 516 select ARCH_USES_GETTIMEOFFSET 517 select NEED_MACH_MEMORY_H 518 help 519 Support for Intel's IXP2400/2800 (XScale) family of processors. 520 521config ARCH_IXP4XX 522 bool "IXP4xx-based" 523 depends on MMU 524 select CLKSRC_MMIO 525 select CPU_XSCALE 526 select GENERIC_GPIO 527 select GENERIC_CLOCKEVENTS 528 select HAVE_SCHED_CLOCK 529 select MIGHT_HAVE_PCI 530 select DMABOUNCE if PCI 531 help 532 Support for Intel's IXP4XX (XScale) family of processors. 533 534config ARCH_DOVE 535 bool "Marvell Dove" 536 select CPU_V7 537 select PCI 538 select ARCH_REQUIRE_GPIOLIB 539 select GENERIC_CLOCKEVENTS 540 select PLAT_ORION 541 help 542 Support for the Marvell Dove SoC 88AP510 543 544config ARCH_KIRKWOOD 545 bool "Marvell Kirkwood" 546 select CPU_FEROCEON 547 select PCI 548 select ARCH_REQUIRE_GPIOLIB 549 select GENERIC_CLOCKEVENTS 550 select PLAT_ORION 551 help 552 Support for the following Marvell Kirkwood series SoCs: 553 88F6180, 88F6192 and 88F6281. 554 555config ARCH_LPC32XX 556 bool "NXP LPC32XX" 557 select CLKSRC_MMIO 558 select CPU_ARM926T 559 select ARCH_REQUIRE_GPIOLIB 560 select HAVE_IDE 561 select ARM_AMBA 562 select USB_ARCH_HAS_OHCI 563 select CLKDEV_LOOKUP 564 select GENERIC_CLOCKEVENTS 565 help 566 Support for the NXP LPC32XX family of processors 567 568config ARCH_MV78XX0 569 bool "Marvell MV78xx0" 570 select CPU_FEROCEON 571 select PCI 572 select ARCH_REQUIRE_GPIOLIB 573 select GENERIC_CLOCKEVENTS 574 select PLAT_ORION 575 help 576 Support for the following Marvell MV78xx0 series SoCs: 577 MV781x0, MV782x0. 578 579config ARCH_ORION5X 580 bool "Marvell Orion" 581 depends on MMU 582 select CPU_FEROCEON 583 select PCI 584 select ARCH_REQUIRE_GPIOLIB 585 select GENERIC_CLOCKEVENTS 586 select PLAT_ORION 587 help 588 Support for the following Marvell Orion 5x series SoCs: 589 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), 590 Orion-2 (5281), Orion-1-90 (6183). 591 592config ARCH_MMP 593 bool "Marvell PXA168/910/MMP2" 594 depends on MMU 595 select ARCH_REQUIRE_GPIOLIB 596 select CLKDEV_LOOKUP 597 select GENERIC_CLOCKEVENTS 598 select HAVE_SCHED_CLOCK 599 select TICK_ONESHOT 600 select PLAT_PXA 601 select SPARSE_IRQ 602 select GENERIC_ALLOCATOR 603 help 604 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. 605 606config ARCH_KS8695 607 bool "Micrel/Kendin KS8695" 608 select CPU_ARM922T 609 select ARCH_REQUIRE_GPIOLIB 610 select ARCH_USES_GETTIMEOFFSET 611 select NEED_MACH_MEMORY_H 612 help 613 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based 614 System-on-Chip devices. 615 616config ARCH_W90X900 617 bool "Nuvoton W90X900 CPU" 618 select CPU_ARM926T 619 select ARCH_REQUIRE_GPIOLIB 620 select CLKDEV_LOOKUP 621 select CLKSRC_MMIO 622 select GENERIC_CLOCKEVENTS 623 help 624 Support for Nuvoton (Winbond logic dept.) ARM9 processor, 625 At present, the w90x900 has been renamed nuc900, regarding 626 the ARM series product line, you can login the following 627 link address to know more. 628 629 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ 630 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> 631 632config ARCH_TEGRA 633 bool "NVIDIA Tegra" 634 select CLKDEV_LOOKUP 635 select CLKSRC_MMIO 636 select GENERIC_CLOCKEVENTS 637 select GENERIC_GPIO 638 select HAVE_CLK 639 select HAVE_SCHED_CLOCK 640 select ARCH_HAS_CPUFREQ 641 help 642 This enables support for NVIDIA Tegra based systems (Tegra APX, 643 Tegra 6xx and Tegra 2 series). 644 645config ARCH_PICOXCELL 646 bool "Picochip picoXcell" 647 select ARCH_REQUIRE_GPIOLIB 648 select ARM_PATCH_PHYS_VIRT 649 select ARM_VIC 650 select CPU_V6K 651 select DW_APB_TIMER 652 select GENERIC_CLOCKEVENTS 653 select GENERIC_GPIO 654 select HAVE_SCHED_CLOCK 655 select HAVE_TCM 656 select NO_IOPORT 657 select USE_OF 658 help 659 This enables support for systems based on the Picochip picoXcell 660 family of Femtocell devices. The picoxcell support requires device tree 661 for all boards. 662 663config ARCH_PNX4008 664 bool "Philips Nexperia PNX4008 Mobile" 665 select CPU_ARM926T 666 select CLKDEV_LOOKUP 667 select ARCH_USES_GETTIMEOFFSET 668 help 669 This enables support for Philips PNX4008 mobile platform. 670 671config ARCH_PXA 672 bool "PXA2xx/PXA3xx-based" 673 depends on MMU 674 select ARCH_MTD_XIP 675 select ARCH_HAS_CPUFREQ 676 select CLKDEV_LOOKUP 677 select CLKSRC_MMIO 678 select ARCH_REQUIRE_GPIOLIB 679 select GENERIC_CLOCKEVENTS 680 select HAVE_SCHED_CLOCK 681 select TICK_ONESHOT 682 select PLAT_PXA 683 select SPARSE_IRQ 684 select AUTO_ZRELADDR 685 select MULTI_IRQ_HANDLER 686 select ARM_CPU_SUSPEND if PM 687 select HAVE_IDE 688 help 689 Support for Intel/Marvell's PXA2xx/PXA3xx processor line. 690 691config ARCH_MSM 692 bool "Qualcomm MSM" 693 select HAVE_CLK 694 select GENERIC_CLOCKEVENTS 695 select ARCH_REQUIRE_GPIOLIB 696 select CLKDEV_LOOKUP 697 help 698 Support for Qualcomm MSM/QSD based systems. This runs on the 699 apps processor of the MSM/QSD and depends on a shared memory 700 interface to the modem processor which runs the baseband 701 stack and controls some vital subsystems 702 (clock and power control, etc). 703 704config ARCH_SHMOBILE 705 bool "Renesas SH-Mobile / R-Mobile" 706 select HAVE_CLK 707 select CLKDEV_LOOKUP 708 select HAVE_MACH_CLKDEV 709 select GENERIC_CLOCKEVENTS 710 select NO_IOPORT 711 select SPARSE_IRQ 712 select MULTI_IRQ_HANDLER 713 select PM_GENERIC_DOMAINS if PM 714 select NEED_MACH_MEMORY_H 715 help 716 Support for Renesas's SH-Mobile and R-Mobile ARM platforms. 717 718config ARCH_RPC 719 bool "RiscPC" 720 select ARCH_ACORN 721 select FIQ 722 select TIMER_ACORN 723 select ARCH_MAY_HAVE_PC_FDC 724 select HAVE_PATA_PLATFORM 725 select ISA_DMA_API 726 select NO_IOPORT 727 select ARCH_SPARSEMEM_ENABLE 728 select ARCH_USES_GETTIMEOFFSET 729 select HAVE_IDE 730 select NEED_MACH_MEMORY_H 731 help 732 On the Acorn Risc-PC, Linux can support the internal IDE disk and 733 CD-ROM interface, serial and parallel port, and the floppy drive. 734 735config ARCH_SA1100 736 bool "SA1100-based" 737 select CLKSRC_MMIO 738 select CPU_SA1100 739 select ISA 740 select ARCH_SPARSEMEM_ENABLE 741 select ARCH_MTD_XIP 742 select ARCH_HAS_CPUFREQ 743 select CPU_FREQ 744 select GENERIC_CLOCKEVENTS 745 select HAVE_CLK 746 select HAVE_SCHED_CLOCK 747 select TICK_ONESHOT 748 select ARCH_REQUIRE_GPIOLIB 749 select HAVE_IDE 750 select NEED_MACH_MEMORY_H 751 help 752 Support for StrongARM 11x0 based boards. 753 754config ARCH_S3C2410 755 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" 756 select GENERIC_GPIO 757 select ARCH_HAS_CPUFREQ 758 select HAVE_CLK 759 select CLKDEV_LOOKUP 760 select ARCH_USES_GETTIMEOFFSET 761 select HAVE_S3C2410_I2C if I2C 762 help 763 Samsung S3C2410X CPU based systems, such as the Simtec Electronics 764 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or 765 the Samsung SMDK2410 development board (and derivatives). 766 767 Note, the S3C2416 and the S3C2450 are so close that they even share 768 the same SoC ID code. This means that there is no separate machine 769 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. 770 771config ARCH_S3C64XX 772 bool "Samsung S3C64XX" 773 select PLAT_SAMSUNG 774 select CPU_V6 775 select ARM_VIC 776 select HAVE_CLK 777 select HAVE_TCM 778 select CLKDEV_LOOKUP 779 select NO_IOPORT 780 select ARCH_USES_GETTIMEOFFSET 781 select ARCH_HAS_CPUFREQ 782 select ARCH_REQUIRE_GPIOLIB 783 select SAMSUNG_CLKSRC 784 select SAMSUNG_IRQ_VIC_TIMER 785 select S3C_GPIO_TRACK 786 select S3C_DEV_NAND 787 select USB_ARCH_HAS_OHCI 788 select SAMSUNG_GPIOLIB_4BIT 789 select HAVE_S3C2410_I2C if I2C 790 select HAVE_S3C2410_WATCHDOG if WATCHDOG 791 help 792 Samsung S3C64XX series based systems 793 794config ARCH_S5P64X0 795 bool "Samsung S5P6440 S5P6450" 796 select CPU_V6 797 select GENERIC_GPIO 798 select HAVE_CLK 799 select CLKDEV_LOOKUP 800 select CLKSRC_MMIO 801 select HAVE_S3C2410_WATCHDOG if WATCHDOG 802 select GENERIC_CLOCKEVENTS 803 select HAVE_SCHED_CLOCK 804 select HAVE_S3C2410_I2C if I2C 805 select HAVE_S3C_RTC if RTC_CLASS 806 help 807 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, 808 SMDK6450. 809 810config ARCH_S5PC100 811 bool "Samsung S5PC100" 812 select GENERIC_GPIO 813 select HAVE_CLK 814 select CLKDEV_LOOKUP 815 select CPU_V7 816 select ARM_L1_CACHE_SHIFT_6 817 select ARCH_USES_GETTIMEOFFSET 818 select HAVE_S3C2410_I2C if I2C 819 select HAVE_S3C_RTC if RTC_CLASS 820 select HAVE_S3C2410_WATCHDOG if WATCHDOG 821 help 822 Samsung S5PC100 series based systems 823 824config ARCH_S5PV210 825 bool "Samsung S5PV210/S5PC110" 826 select CPU_V7 827 select ARCH_SPARSEMEM_ENABLE 828 select ARCH_HAS_HOLES_MEMORYMODEL 829 select GENERIC_GPIO 830 select HAVE_CLK 831 select CLKDEV_LOOKUP 832 select CLKSRC_MMIO 833 select ARM_L1_CACHE_SHIFT_6 834 select ARCH_HAS_CPUFREQ 835 select GENERIC_CLOCKEVENTS 836 select HAVE_SCHED_CLOCK 837 select HAVE_S3C2410_I2C if I2C 838 select HAVE_S3C_RTC if RTC_CLASS 839 select HAVE_S3C2410_WATCHDOG if WATCHDOG 840 select NEED_MACH_MEMORY_H 841 help 842 Samsung S5PV210/S5PC110 series based systems 843 844config ARCH_EXYNOS 845 bool "SAMSUNG EXYNOS" 846 select CPU_V7 847 select ARCH_SPARSEMEM_ENABLE 848 select ARCH_HAS_HOLES_MEMORYMODEL 849 select GENERIC_GPIO 850 select HAVE_CLK 851 select CLKDEV_LOOKUP 852 select ARCH_HAS_CPUFREQ 853 select GENERIC_CLOCKEVENTS 854 select HAVE_S3C_RTC if RTC_CLASS 855 select HAVE_S3C2410_I2C if I2C 856 select HAVE_S3C2410_WATCHDOG if WATCHDOG 857 select NEED_MACH_MEMORY_H 858 select MULTI_IRQ_HANDLER 859 help 860 Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5) 861 862config ARCH_SHARK 863 bool "Shark" 864 select CPU_SA110 865 select ISA 866 select ISA_DMA 867 select ZONE_DMA 868 select PCI 869 select ARCH_USES_GETTIMEOFFSET 870 select NEED_MACH_MEMORY_H 871 help 872 Support for the StrongARM based Digital DNARD machine, also known 873 as "Shark" (<http://www.shark-linux.de/shark.html>). 874 875config ARCH_TCC_926 876 bool "Telechips TCC ARM926-based systems" 877 select CLKSRC_MMIO 878 select CPU_ARM926T 879 select HAVE_CLK 880 select CLKDEV_LOOKUP 881 select GENERIC_CLOCKEVENTS 882 help 883 Support for Telechips TCC ARM926-based systems. 884 885config ARCH_U300 886 bool "ST-Ericsson U300 Series" 887 depends on MMU 888 select CLKSRC_MMIO 889 select CPU_ARM926T 890 select HAVE_SCHED_CLOCK 891 select HAVE_TCM 892 select ARM_AMBA 893 select ARM_PATCH_PHYS_VIRT 894 select ARM_VIC 895 select GENERIC_CLOCKEVENTS 896 select CLKDEV_LOOKUP 897 select HAVE_MACH_CLKDEV 898 select GENERIC_GPIO 899 select ARCH_REQUIRE_GPIOLIB 900 select NEED_MACH_MEMORY_H 901 help 902 Support for ST-Ericsson U300 series mobile platforms. 903 904config ARCH_U8500 905 bool "ST-Ericsson U8500 Series" 906 select CPU_V7 907 select ARM_AMBA 908 select GENERIC_CLOCKEVENTS 909 select CLKDEV_LOOKUP 910 select ARCH_REQUIRE_GPIOLIB 911 select ARCH_HAS_CPUFREQ 912 help 913 Support for ST-Ericsson's Ux500 architecture 914 915config ARCH_NOMADIK 916 bool "STMicroelectronics Nomadik" 917 select ARM_AMBA 918 select ARM_VIC 919 select CPU_ARM926T 920 select CLKDEV_LOOKUP 921 select GENERIC_CLOCKEVENTS 922 select ARCH_REQUIRE_GPIOLIB 923 help 924 Support for the Nomadik platform by ST-Ericsson 925 926config ARCH_DAVINCI 927 bool "TI DaVinci" 928 select GENERIC_CLOCKEVENTS 929 select ARCH_REQUIRE_GPIOLIB 930 select ZONE_DMA 931 select HAVE_IDE 932 select CLKDEV_LOOKUP 933 select GENERIC_ALLOCATOR 934 select GENERIC_IRQ_CHIP 935 select ARCH_HAS_HOLES_MEMORYMODEL 936 help 937 Support for TI's DaVinci platform. 938 939config ARCH_OMAP 940 bool "TI OMAP" 941 select HAVE_CLK 942 select ARCH_REQUIRE_GPIOLIB 943 select ARCH_HAS_CPUFREQ 944 select CLKSRC_MMIO 945 select GENERIC_CLOCKEVENTS 946 select HAVE_SCHED_CLOCK 947 select ARCH_HAS_HOLES_MEMORYMODEL 948 help 949 Support for TI's OMAP platform (OMAP1/2/3/4). 950 951config PLAT_SPEAR 952 bool "ST SPEAr" 953 select ARM_AMBA 954 select ARCH_REQUIRE_GPIOLIB 955 select CLKDEV_LOOKUP 956 select CLKSRC_MMIO 957 select GENERIC_CLOCKEVENTS 958 select HAVE_CLK 959 help 960 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). 961 962config ARCH_VT8500 963 bool "VIA/WonderMedia 85xx" 964 select CPU_ARM926T 965 select GENERIC_GPIO 966 select ARCH_HAS_CPUFREQ 967 select GENERIC_CLOCKEVENTS 968 select ARCH_REQUIRE_GPIOLIB 969 select HAVE_PWM 970 help 971 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. 972 973config ARCH_ZYNQ 974 bool "Xilinx Zynq ARM Cortex A9 Platform" 975 select CPU_V7 976 select GENERIC_CLOCKEVENTS 977 select CLKDEV_LOOKUP 978 select ARM_GIC 979 select ARM_AMBA 980 select ICST 981 select USE_OF 982 select MULTI_IRQ_HANDLER 983 help 984 Support for Xilinx Zynq ARM Cortex A9 Platform 985endchoice 986 987# 988# This is sorted alphabetically by mach-* pathname. However, plat-* 989# Kconfigs may be included either alphabetically (according to the 990# plat- suffix) or along side the corresponding mach-* source. 991# 992source "arch/arm/mach-at91/Kconfig" 993 994source "arch/arm/mach-bcmring/Kconfig" 995 996source "arch/arm/mach-clps711x/Kconfig" 997 998source "arch/arm/mach-cns3xxx/Kconfig" 999 1000source "arch/arm/mach-davinci/Kconfig" 1001 1002source "arch/arm/mach-dove/Kconfig" 1003 1004source "arch/arm/mach-ep93xx/Kconfig" 1005 1006source "arch/arm/mach-footbridge/Kconfig" 1007 1008source "arch/arm/mach-gemini/Kconfig" 1009 1010source "arch/arm/mach-h720x/Kconfig" 1011 1012source "arch/arm/mach-integrator/Kconfig" 1013 1014source "arch/arm/mach-iop32x/Kconfig" 1015 1016source "arch/arm/mach-iop33x/Kconfig" 1017 1018source "arch/arm/mach-iop13xx/Kconfig" 1019 1020source "arch/arm/mach-ixp4xx/Kconfig" 1021 1022source "arch/arm/mach-ixp2000/Kconfig" 1023 1024source "arch/arm/mach-ixp23xx/Kconfig" 1025 1026source "arch/arm/mach-kirkwood/Kconfig" 1027 1028source "arch/arm/mach-ks8695/Kconfig" 1029 1030source "arch/arm/mach-lpc32xx/Kconfig" 1031 1032source "arch/arm/mach-msm/Kconfig" 1033 1034source "arch/arm/mach-mv78xx0/Kconfig" 1035 1036source "arch/arm/plat-mxc/Kconfig" 1037 1038source "arch/arm/mach-mxs/Kconfig" 1039 1040source "arch/arm/mach-netx/Kconfig" 1041 1042source "arch/arm/mach-nomadik/Kconfig" 1043source "arch/arm/plat-nomadik/Kconfig" 1044 1045source "arch/arm/plat-omap/Kconfig" 1046 1047source "arch/arm/mach-omap1/Kconfig" 1048 1049source "arch/arm/mach-omap2/Kconfig" 1050 1051source "arch/arm/mach-orion5x/Kconfig" 1052 1053source "arch/arm/mach-pxa/Kconfig" 1054source "arch/arm/plat-pxa/Kconfig" 1055 1056source "arch/arm/mach-mmp/Kconfig" 1057 1058source "arch/arm/mach-realview/Kconfig" 1059 1060source "arch/arm/mach-sa1100/Kconfig" 1061 1062source "arch/arm/plat-samsung/Kconfig" 1063source "arch/arm/plat-s3c24xx/Kconfig" 1064source "arch/arm/plat-s5p/Kconfig" 1065 1066source "arch/arm/plat-spear/Kconfig" 1067 1068source "arch/arm/plat-tcc/Kconfig" 1069 1070if ARCH_S3C2410 1071source "arch/arm/mach-s3c2410/Kconfig" 1072source "arch/arm/mach-s3c2412/Kconfig" 1073source "arch/arm/mach-s3c2416/Kconfig" 1074source "arch/arm/mach-s3c2440/Kconfig" 1075source "arch/arm/mach-s3c2443/Kconfig" 1076endif 1077 1078if ARCH_S3C64XX 1079source "arch/arm/mach-s3c64xx/Kconfig" 1080endif 1081 1082source "arch/arm/mach-s5p64x0/Kconfig" 1083 1084source "arch/arm/mach-s5pc100/Kconfig" 1085 1086source "arch/arm/mach-s5pv210/Kconfig" 1087 1088source "arch/arm/mach-exynos/Kconfig" 1089 1090source "arch/arm/mach-shmobile/Kconfig" 1091 1092source "arch/arm/mach-tegra/Kconfig" 1093 1094source "arch/arm/mach-u300/Kconfig" 1095 1096source "arch/arm/mach-ux500/Kconfig" 1097 1098source "arch/arm/mach-versatile/Kconfig" 1099 1100source "arch/arm/mach-vexpress/Kconfig" 1101source "arch/arm/plat-versatile/Kconfig" 1102 1103source "arch/arm/mach-vt8500/Kconfig" 1104 1105source "arch/arm/mach-w90x900/Kconfig" 1106 1107# Definitions to make life easier 1108config ARCH_ACORN 1109 bool 1110 1111config PLAT_IOP 1112 bool 1113 select GENERIC_CLOCKEVENTS 1114 select HAVE_SCHED_CLOCK 1115 1116config PLAT_ORION 1117 bool 1118 select CLKSRC_MMIO 1119 select GENERIC_IRQ_CHIP 1120 select HAVE_SCHED_CLOCK 1121 1122config PLAT_PXA 1123 bool 1124 1125config PLAT_VERSATILE 1126 bool 1127 1128config ARM_TIMER_SP804 1129 bool 1130 select CLKSRC_MMIO 1131 1132source arch/arm/mm/Kconfig 1133 1134config IWMMXT 1135 bool "Enable iWMMXt support" 1136 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 1137 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP 1138 help 1139 Enable support for iWMMXt context switching at run time if 1140 running on a CPU that supports it. 1141 1142# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER 1143config XSCALE_PMU 1144 bool 1145 depends on CPU_XSCALE && !XSCALE_PMU_TIMER 1146 default y 1147 1148config CPU_HAS_PMU 1149 depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \ 1150 (!ARCH_OMAP3 || OMAP3_EMU) 1151 default y 1152 bool 1153 1154config MULTI_IRQ_HANDLER 1155 bool 1156 help 1157 Allow each machine to specify it's own IRQ handler at run time. 1158 1159if !MMU 1160source "arch/arm/Kconfig-nommu" 1161endif 1162 1163config ARM_ERRATA_411920 1164 bool "ARM errata: Invalidation of the Instruction Cache operation can fail" 1165 depends on CPU_V6 || CPU_V6K 1166 help 1167 Invalidation of the Instruction Cache operation can 1168 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. 1169 It does not affect the MPCore. This option enables the ARM Ltd. 1170 recommended workaround. 1171 1172config ARM_ERRATA_430973 1173 bool "ARM errata: Stale prediction on replaced interworking branch" 1174 depends on CPU_V7 1175 help 1176 This option enables the workaround for the 430973 Cortex-A8 1177 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb 1178 interworking branch is replaced with another code sequence at the 1179 same virtual address, whether due to self-modifying code or virtual 1180 to physical address re-mapping, Cortex-A8 does not recover from the 1181 stale interworking branch prediction. This results in Cortex-A8 1182 executing the new code sequence in the incorrect ARM or Thumb state. 1183 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE 1184 and also flushes the branch target cache at every context switch. 1185 Note that setting specific bits in the ACTLR register may not be 1186 available in non-secure mode. 1187 1188config ARM_ERRATA_458693 1189 bool "ARM errata: Processor deadlock when a false hazard is created" 1190 depends on CPU_V7 1191 help 1192 This option enables the workaround for the 458693 Cortex-A8 (r2p0) 1193 erratum. For very specific sequences of memory operations, it is 1194 possible for a hazard condition intended for a cache line to instead 1195 be incorrectly associated with a different cache line. This false 1196 hazard might then cause a processor deadlock. The workaround enables 1197 the L1 caching of the NEON accesses and disables the PLD instruction 1198 in the ACTLR register. Note that setting specific bits in the ACTLR 1199 register may not be available in non-secure mode. 1200 1201config ARM_ERRATA_460075 1202 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" 1203 depends on CPU_V7 1204 help 1205 This option enables the workaround for the 460075 Cortex-A8 (r2p0) 1206 erratum. Any asynchronous access to the L2 cache may encounter a 1207 situation in which recent store transactions to the L2 cache are lost 1208 and overwritten with stale memory contents from external memory. The 1209 workaround disables the write-allocate mode for the L2 cache via the 1210 ACTLR register. Note that setting specific bits in the ACTLR register 1211 may not be available in non-secure mode. 1212 1213config ARM_ERRATA_742230 1214 bool "ARM errata: DMB operation may be faulty" 1215 depends on CPU_V7 && SMP 1216 help 1217 This option enables the workaround for the 742230 Cortex-A9 1218 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction 1219 between two write operations may not ensure the correct visibility 1220 ordering of the two writes. This workaround sets a specific bit in 1221 the diagnostic register of the Cortex-A9 which causes the DMB 1222 instruction to behave as a DSB, ensuring the correct behaviour of 1223 the two writes. 1224 1225config ARM_ERRATA_742231 1226 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" 1227 depends on CPU_V7 && SMP 1228 help 1229 This option enables the workaround for the 742231 Cortex-A9 1230 (r2p0..r2p2) erratum. Under certain conditions, specific to the 1231 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, 1232 accessing some data located in the same cache line, may get corrupted 1233 data due to bad handling of the address hazard when the line gets 1234 replaced from one of the CPUs at the same time as another CPU is 1235 accessing it. This workaround sets specific bits in the diagnostic 1236 register of the Cortex-A9 which reduces the linefill issuing 1237 capabilities of the processor. 1238 1239config PL310_ERRATA_588369 1240 bool "Clean & Invalidate maintenance operations do not invalidate clean lines" 1241 depends on CACHE_L2X0 1242 help 1243 The PL310 L2 cache controller implements three types of Clean & 1244 Invalidate maintenance operations: by Physical Address 1245 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). 1246 They are architecturally defined to behave as the execution of a 1247 clean operation followed immediately by an invalidate operation, 1248 both performing to the same memory location. This functionality 1249 is not correctly implemented in PL310 as clean lines are not 1250 invalidated as a result of these operations. 1251 1252config ARM_ERRATA_720789 1253 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" 1254 depends on CPU_V7 && SMP 1255 help 1256 This option enables the workaround for the 720789 Cortex-A9 (prior to 1257 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the 1258 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. 1259 As a consequence of this erratum, some TLB entries which should be 1260 invalidated are not, resulting in an incoherency in the system page 1261 tables. The workaround changes the TLB flushing routines to invalidate 1262 entries regardless of the ASID. 1263 1264config PL310_ERRATA_727915 1265 bool "Background Clean & Invalidate by Way operation can cause data corruption" 1266 depends on CACHE_L2X0 1267 help 1268 PL310 implements the Clean & Invalidate by Way L2 cache maintenance 1269 operation (offset 0x7FC). This operation runs in background so that 1270 PL310 can handle normal accesses while it is in progress. Under very 1271 rare circumstances, due to this erratum, write data can be lost when 1272 PL310 treats a cacheable write transaction during a Clean & 1273 Invalidate by Way operation. 1274 1275config ARM_ERRATA_743622 1276 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" 1277 depends on CPU_V7 1278 help 1279 This option enables the workaround for the 743622 Cortex-A9 1280 (r2p0..r2p2) erratum. Under very rare conditions, a faulty 1281 optimisation in the Cortex-A9 Store Buffer may lead to data 1282 corruption. This workaround sets a specific bit in the diagnostic 1283 register of the Cortex-A9 which disables the Store Buffer 1284 optimisation, preventing the defect from occurring. This has no 1285 visible impact on the overall performance or power consumption of the 1286 processor. 1287 1288config ARM_ERRATA_751472 1289 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" 1290 depends on CPU_V7 && SMP 1291 help 1292 This option enables the workaround for the 751472 Cortex-A9 (prior 1293 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the 1294 completion of a following broadcasted operation if the second 1295 operation is received by a CPU before the ICIALLUIS has completed, 1296 potentially leading to corrupted entries in the cache or TLB. 1297 1298config ARM_ERRATA_753970 1299 bool "ARM errata: cache sync operation may be faulty" 1300 depends on CACHE_PL310 1301 help 1302 This option enables the workaround for the 753970 PL310 (r3p0) erratum. 1303 1304 Under some condition the effect of cache sync operation on 1305 the store buffer still remains when the operation completes. 1306 This means that the store buffer is always asked to drain and 1307 this prevents it from merging any further writes. The workaround 1308 is to replace the normal offset of cache sync operation (0x730) 1309 by another offset targeting an unmapped PL310 register 0x740. 1310 This has the same effect as the cache sync operation: store buffer 1311 drain and waiting for all buffers empty. 1312 1313config ARM_ERRATA_754322 1314 bool "ARM errata: possible faulty MMU translations following an ASID switch" 1315 depends on CPU_V7 1316 help 1317 This option enables the workaround for the 754322 Cortex-A9 (r2p*, 1318 r3p*) erratum. A speculative memory access may cause a page table walk 1319 which starts prior to an ASID switch but completes afterwards. This 1320 can populate the micro-TLB with a stale entry which may be hit with 1321 the new ASID. This workaround places two dsb instructions in the mm 1322 switching code so that no page table walks can cross the ASID switch. 1323 1324config ARM_ERRATA_754327 1325 bool "ARM errata: no automatic Store Buffer drain" 1326 depends on CPU_V7 && SMP 1327 help 1328 This option enables the workaround for the 754327 Cortex-A9 (prior to 1329 r2p0) erratum. The Store Buffer does not have any automatic draining 1330 mechanism and therefore a livelock may occur if an external agent 1331 continuously polls a memory location waiting to observe an update. 1332 This workaround defines cpu_relax() as smp_mb(), preventing correctly 1333 written polling loops from denying visibility of updates to memory. 1334 1335config ARM_ERRATA_364296 1336 bool "ARM errata: Possible cache data corruption with hit-under-miss enabled" 1337 depends on CPU_V6 && !SMP 1338 help 1339 This options enables the workaround for the 364296 ARM1136 1340 r0p2 erratum (possible cache data corruption with 1341 hit-under-miss enabled). It sets the undocumented bit 31 in 1342 the auxiliary control register and the FI bit in the control 1343 register, thus disabling hit-under-miss without putting the 1344 processor into full low interrupt latency mode. ARM11MPCore 1345 is not affected. 1346 1347config ARM_ERRATA_764369 1348 bool "ARM errata: Data cache line maintenance operation by MVA may not succeed" 1349 depends on CPU_V7 && SMP 1350 help 1351 This option enables the workaround for erratum 764369 1352 affecting Cortex-A9 MPCore with two or more processors (all 1353 current revisions). Under certain timing circumstances, a data 1354 cache line maintenance operation by MVA targeting an Inner 1355 Shareable memory region may fail to proceed up to either the 1356 Point of Coherency or to the Point of Unification of the 1357 system. This workaround adds a DSB instruction before the 1358 relevant cache maintenance functions and sets a specific bit 1359 in the diagnostic control register of the SCU. 1360 1361endmenu 1362 1363source "arch/arm/common/Kconfig" 1364 1365menu "Bus support" 1366 1367config ARM_AMBA 1368 bool 1369 1370config ISA 1371 bool 1372 help 1373 Find out whether you have ISA slots on your motherboard. ISA is the 1374 name of a bus system, i.e. the way the CPU talks to the other stuff 1375 inside your box. Other bus systems are PCI, EISA, MicroChannel 1376 (MCA) or VESA. ISA is an older system, now being displaced by PCI; 1377 newer boards don't support it. If you have ISA, say Y, otherwise N. 1378 1379# Select ISA DMA controller support 1380config ISA_DMA 1381 bool 1382 select ISA_DMA_API 1383 1384# Select ISA DMA interface 1385config ISA_DMA_API 1386 bool 1387 1388config PCI 1389 bool "PCI support" if MIGHT_HAVE_PCI 1390 help 1391 Find out whether you have a PCI motherboard. PCI is the name of a 1392 bus system, i.e. the way the CPU talks to the other stuff inside 1393 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or 1394 VESA. If you have PCI, say Y, otherwise N. 1395 1396config PCI_DOMAINS 1397 bool 1398 depends on PCI 1399 1400config PCI_NANOENGINE 1401 bool "BSE nanoEngine PCI support" 1402 depends on SA1100_NANOENGINE 1403 help 1404 Enable PCI on the BSE nanoEngine board. 1405 1406config PCI_SYSCALL 1407 def_bool PCI 1408 1409# Select the host bridge type 1410config PCI_HOST_VIA82C505 1411 bool 1412 depends on PCI && ARCH_SHARK 1413 default y 1414 1415config PCI_HOST_ITE8152 1416 bool 1417 depends on PCI && MACH_ARMCORE 1418 default y 1419 select DMABOUNCE 1420 1421source "drivers/pci/Kconfig" 1422 1423source "drivers/pcmcia/Kconfig" 1424 1425endmenu 1426 1427menu "Kernel Features" 1428 1429source "kernel/time/Kconfig" 1430 1431config SMP 1432 bool "Symmetric Multi-Processing" 1433 depends on CPU_V6K || CPU_V7 1434 depends on GENERIC_CLOCKEVENTS 1435 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ 1436 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ 1437 ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ 1438 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK || SOC_IMX6Q 1439 depends on MMU 1440 select USE_GENERIC_SMP_HELPERS 1441 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP 1442 help 1443 This enables support for systems with more than one CPU. If you have 1444 a system with only one CPU, like most personal computers, say N. If 1445 you have a system with more than one CPU, say Y. 1446 1447 If you say N here, the kernel will run on single and multiprocessor 1448 machines, but will use only one CPU of a multiprocessor machine. If 1449 you say Y here, the kernel will run on many, but not all, single 1450 processor machines. On a single processor machine, the kernel will 1451 run faster if you say N here. 1452 1453 See also <file:Documentation/x86/i386/IO-APIC.txt>, 1454 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at 1455 <http://tldp.org/HOWTO/SMP-HOWTO.html>. 1456 1457 If you don't know what to do here, say N. 1458 1459config SMP_ON_UP 1460 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" 1461 depends on EXPERIMENTAL 1462 depends on SMP && !XIP_KERNEL 1463 default y 1464 help 1465 SMP kernels contain instructions which fail on non-SMP processors. 1466 Enabling this option allows the kernel to modify itself to make 1467 these instructions safe. Disabling it allows about 1K of space 1468 savings. 1469 1470 If you don't know what to do here, say Y. 1471 1472config ARM_CPU_TOPOLOGY 1473 bool "Support cpu topology definition" 1474 depends on SMP && CPU_V7 1475 default y 1476 help 1477 Support ARM cpu topology definition. The MPIDR register defines 1478 affinity between processors which is then used to describe the cpu 1479 topology of an ARM System. 1480 1481config SCHED_MC 1482 bool "Multi-core scheduler support" 1483 depends on ARM_CPU_TOPOLOGY 1484 help 1485 Multi-core scheduler support improves the CPU scheduler's decision 1486 making when dealing with multi-core CPU chips at a cost of slightly 1487 increased overhead in some places. If unsure say N here. 1488 1489config SCHED_SMT 1490 bool "SMT scheduler support" 1491 depends on ARM_CPU_TOPOLOGY 1492 help 1493 Improves the CPU scheduler's decision making when dealing with 1494 MultiThreading at a cost of slightly increased overhead in some 1495 places. If unsure say N here. 1496 1497config HAVE_ARM_SCU 1498 bool 1499 help 1500 This option enables support for the ARM system coherency unit 1501 1502config HAVE_ARM_TWD 1503 bool 1504 depends on SMP 1505 select TICK_ONESHOT 1506 help 1507 This options enables support for the ARM timer and watchdog unit 1508 1509choice 1510 prompt "Memory split" 1511 default VMSPLIT_3G 1512 help 1513 Select the desired split between kernel and user memory. 1514 1515 If you are not absolutely sure what you are doing, leave this 1516 option alone! 1517 1518 config VMSPLIT_3G 1519 bool "3G/1G user/kernel split" 1520 config VMSPLIT_2G 1521 bool "2G/2G user/kernel split" 1522 config VMSPLIT_1G 1523 bool "1G/3G user/kernel split" 1524endchoice 1525 1526config PAGE_OFFSET 1527 hex 1528 default 0x40000000 if VMSPLIT_1G 1529 default 0x80000000 if VMSPLIT_2G 1530 default 0xC0000000 1531 1532config NR_CPUS 1533 int "Maximum number of CPUs (2-32)" 1534 range 2 32 1535 depends on SMP 1536 default "4" 1537 1538config HOTPLUG_CPU 1539 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" 1540 depends on SMP && HOTPLUG && EXPERIMENTAL 1541 help 1542 Say Y here to experiment with turning CPUs off and on. CPUs 1543 can be controlled through /sys/devices/system/cpu. 1544 1545config LOCAL_TIMERS 1546 bool "Use local timer interrupts" 1547 depends on SMP 1548 default y 1549 select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT) 1550 help 1551 Enable support for local timers on SMP platforms, rather then the 1552 legacy IPI broadcast method. Local timers allows the system 1553 accounting to be spread across the timer interval, preventing a 1554 "thundering herd" at every timer tick. 1555 1556source kernel/Kconfig.preempt 1557 1558config HZ 1559 int 1560 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ 1561 ARCH_S5PV210 || ARCH_EXYNOS4 1562 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER 1563 default AT91_TIMER_HZ if ARCH_AT91 1564 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE 1565 default 100 1566 1567config THUMB2_KERNEL 1568 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" 1569 depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL 1570 select AEABI 1571 select ARM_ASM_UNIFIED 1572 select ARM_UNWIND 1573 help 1574 By enabling this option, the kernel will be compiled in 1575 Thumb-2 mode. A compiler/assembler that understand the unified 1576 ARM-Thumb syntax is needed. 1577 1578 If unsure, say N. 1579 1580config THUMB2_AVOID_R_ARM_THM_JUMP11 1581 bool "Work around buggy Thumb-2 short branch relocations in gas" 1582 depends on THUMB2_KERNEL && MODULES 1583 default y 1584 help 1585 Various binutils versions can resolve Thumb-2 branches to 1586 locally-defined, preemptible global symbols as short-range "b.n" 1587 branch instructions. 1588 1589 This is a problem, because there's no guarantee the final 1590 destination of the symbol, or any candidate locations for a 1591 trampoline, are within range of the branch. For this reason, the 1592 kernel does not support fixing up the R_ARM_THM_JUMP11 (102) 1593 relocation in modules at all, and it makes little sense to add 1594 support. 1595 1596 The symptom is that the kernel fails with an "unsupported 1597 relocation" error when loading some modules. 1598 1599 Until fixed tools are available, passing 1600 -fno-optimize-sibling-calls to gcc should prevent gcc generating 1601 code which hits this problem, at the cost of a bit of extra runtime 1602 stack usage in some cases. 1603 1604 The problem is described in more detail at: 1605 https://bugs.launchpad.net/binutils-linaro/+bug/725126 1606 1607 Only Thumb-2 kernels are affected. 1608 1609 Unless you are sure your tools don't have this problem, say Y. 1610 1611config ARM_ASM_UNIFIED 1612 bool 1613 1614config AEABI 1615 bool "Use the ARM EABI to compile the kernel" 1616 help 1617 This option allows for the kernel to be compiled using the latest 1618 ARM ABI (aka EABI). This is only useful if you are using a user 1619 space environment that is also compiled with EABI. 1620 1621 Since there are major incompatibilities between the legacy ABI and 1622 EABI, especially with regard to structure member alignment, this 1623 option also changes the kernel syscall calling convention to 1624 disambiguate both ABIs and allow for backward compatibility support 1625 (selected with CONFIG_OABI_COMPAT). 1626 1627 To use this you need GCC version 4.0.0 or later. 1628 1629config OABI_COMPAT 1630 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" 1631 depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL 1632 default y 1633 help 1634 This option preserves the old syscall interface along with the 1635 new (ARM EABI) one. It also provides a compatibility layer to 1636 intercept syscalls that have structure arguments which layout 1637 in memory differs between the legacy ABI and the new ARM EABI 1638 (only for non "thumb" binaries). This option adds a tiny 1639 overhead to all syscalls and produces a slightly larger kernel. 1640 If you know you'll be using only pure EABI user space then you 1641 can say N here. If this option is not selected and you attempt 1642 to execute a legacy ABI binary then the result will be 1643 UNPREDICTABLE (in fact it can be predicted that it won't work 1644 at all). If in doubt say Y. 1645 1646config ARCH_HAS_HOLES_MEMORYMODEL 1647 bool 1648 1649config ARCH_SPARSEMEM_ENABLE 1650 bool 1651 1652config ARCH_SPARSEMEM_DEFAULT 1653 def_bool ARCH_SPARSEMEM_ENABLE 1654 1655config ARCH_SELECT_MEMORY_MODEL 1656 def_bool ARCH_SPARSEMEM_ENABLE 1657 1658config HAVE_ARCH_PFN_VALID 1659 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM 1660 1661config HIGHMEM 1662 bool "High Memory Support" 1663 depends on MMU 1664 help 1665 The address space of ARM processors is only 4 Gigabytes large 1666 and it has to accommodate user address space, kernel address 1667 space as well as some memory mapped IO. That means that, if you 1668 have a large amount of physical memory and/or IO, not all of the 1669 memory can be "permanently mapped" by the kernel. The physical 1670 memory that is not permanently mapped is called "high memory". 1671 1672 Depending on the selected kernel/user memory split, minimum 1673 vmalloc space and actual amount of RAM, you may not need this 1674 option which should result in a slightly faster kernel. 1675 1676 If unsure, say n. 1677 1678config HIGHPTE 1679 bool "Allocate 2nd-level pagetables from highmem" 1680 depends on HIGHMEM 1681 1682config HW_PERF_EVENTS 1683 bool "Enable hardware performance counter support for perf events" 1684 depends on PERF_EVENTS && CPU_HAS_PMU 1685 default y 1686 help 1687 Enable hardware performance counter support for perf events. If 1688 disabled, perf events will use software events only. 1689 1690source "mm/Kconfig" 1691 1692config FORCE_MAX_ZONEORDER 1693 int "Maximum zone order" if ARCH_SHMOBILE 1694 range 11 64 if ARCH_SHMOBILE 1695 default "9" if SA1111 1696 default "11" 1697 help 1698 The kernel memory allocator divides physically contiguous memory 1699 blocks into "zones", where each zone is a power of two number of 1700 pages. This option selects the largest power of two that the kernel 1701 keeps in the memory allocator. If you need to allocate very large 1702 blocks of physically contiguous memory, then you may need to 1703 increase this value. 1704 1705 This config option is actually maximum order plus one. For example, 1706 a value of 11 means that the largest free memory block is 2^10 pages. 1707 1708config LEDS 1709 bool "Timer and CPU usage LEDs" 1710 depends on ARCH_CDB89712 || ARCH_EBSA110 || \ 1711 ARCH_EBSA285 || ARCH_INTEGRATOR || \ 1712 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ 1713 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ 1714 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ 1715 ARCH_AT91 || ARCH_DAVINCI || \ 1716 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW 1717 help 1718 If you say Y here, the LEDs on your machine will be used 1719 to provide useful information about your current system status. 1720 1721 If you are compiling a kernel for a NetWinder or EBSA-285, you will 1722 be able to select which LEDs are active using the options below. If 1723 you are compiling a kernel for the EBSA-110 or the LART however, the 1724 red LED will simply flash regularly to indicate that the system is 1725 still functional. It is safe to say Y here if you have a CATS 1726 system, but the driver will do nothing. 1727 1728config LEDS_TIMER 1729 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ 1730 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ 1731 || MACH_OMAP_PERSEUS2 1732 depends on LEDS 1733 depends on !GENERIC_CLOCKEVENTS 1734 default y if ARCH_EBSA110 1735 help 1736 If you say Y here, one of the system LEDs (the green one on the 1737 NetWinder, the amber one on the EBSA285, or the red one on the LART) 1738 will flash regularly to indicate that the system is still 1739 operational. This is mainly useful to kernel hackers who are 1740 debugging unstable kernels. 1741 1742 The LART uses the same LED for both Timer LED and CPU usage LED 1743 functions. You may choose to use both, but the Timer LED function 1744 will overrule the CPU usage LED. 1745 1746config LEDS_CPU 1747 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ 1748 !ARCH_OMAP) \ 1749 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ 1750 || MACH_OMAP_PERSEUS2 1751 depends on LEDS 1752 help 1753 If you say Y here, the red LED will be used to give a good real 1754 time indication of CPU usage, by lighting whenever the idle task 1755 is not currently executing. 1756 1757 The LART uses the same LED for both Timer LED and CPU usage LED 1758 functions. You may choose to use both, but the Timer LED function 1759 will overrule the CPU usage LED. 1760 1761config ALIGNMENT_TRAP 1762 bool 1763 depends on CPU_CP15_MMU 1764 default y if !ARCH_EBSA110 1765 select HAVE_PROC_CPU if PROC_FS 1766 help 1767 ARM processors cannot fetch/store information which is not 1768 naturally aligned on the bus, i.e., a 4 byte fetch must start at an 1769 address divisible by 4. On 32-bit ARM processors, these non-aligned 1770 fetch/store instructions will be emulated in software if you say 1771 here, which has a severe performance impact. This is necessary for 1772 correct operation of some network protocols. With an IP-only 1773 configuration it is safe to say N, otherwise say Y. 1774 1775config UACCESS_WITH_MEMCPY 1776 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" 1777 depends on MMU && EXPERIMENTAL 1778 default y if CPU_FEROCEON 1779 help 1780 Implement faster copy_to_user and clear_user methods for CPU 1781 cores where a 8-word STM instruction give significantly higher 1782 memory write throughput than a sequence of individual 32bit stores. 1783 1784 A possible side effect is a slight increase in scheduling latency 1785 between threads sharing the same address space if they invoke 1786 such copy operations with large buffers. 1787 1788 However, if the CPU data cache is using a write-allocate mode, 1789 this option is unlikely to provide any performance gain. 1790 1791config SECCOMP 1792 bool 1793 prompt "Enable seccomp to safely compute untrusted bytecode" 1794 ---help--- 1795 This kernel feature is useful for number crunching applications 1796 that may need to compute untrusted bytecode during their 1797 execution. By using pipes or other transports made available to 1798 the process as file descriptors supporting the read/write 1799 syscalls, it's possible to isolate those applications in 1800 their own address space using seccomp. Once seccomp is 1801 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled 1802 and the task is only allowed to execute a few safe syscalls 1803 defined by each seccomp mode. 1804 1805config CC_STACKPROTECTOR 1806 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" 1807 depends on EXPERIMENTAL 1808 help 1809 This option turns on the -fstack-protector GCC feature. This 1810 feature puts, at the beginning of functions, a canary value on 1811 the stack just before the return address, and validates 1812 the value just before actually returning. Stack based buffer 1813 overflows (that need to overwrite this return address) now also 1814 overwrite the canary, which gets detected and the attack is then 1815 neutralized via a kernel panic. 1816 This feature requires gcc version 4.2 or above. 1817 1818config DEPRECATED_PARAM_STRUCT 1819 bool "Provide old way to pass kernel parameters" 1820 help 1821 This was deprecated in 2001 and announced to live on for 5 years. 1822 Some old boot loaders still use this way. 1823 1824endmenu 1825 1826menu "Boot options" 1827 1828config USE_OF 1829 bool "Flattened Device Tree support" 1830 select OF 1831 select OF_EARLY_FLATTREE 1832 select IRQ_DOMAIN 1833 help 1834 Include support for flattened device tree machine descriptions. 1835 1836# Compressed boot loader in ROM. Yes, we really want to ask about 1837# TEXT and BSS so we preserve their values in the config files. 1838config ZBOOT_ROM_TEXT 1839 hex "Compressed ROM boot loader base address" 1840 default "0" 1841 help 1842 The physical address at which the ROM-able zImage is to be 1843 placed in the target. Platforms which normally make use of 1844 ROM-able zImage formats normally set this to a suitable 1845 value in their defconfig file. 1846 1847 If ZBOOT_ROM is not enabled, this has no effect. 1848 1849config ZBOOT_ROM_BSS 1850 hex "Compressed ROM boot loader BSS address" 1851 default "0" 1852 help 1853 The base address of an area of read/write memory in the target 1854 for the ROM-able zImage which must be available while the 1855 decompressor is running. It must be large enough to hold the 1856 entire decompressed kernel plus an additional 128 KiB. 1857 Platforms which normally make use of ROM-able zImage formats 1858 normally set this to a suitable value in their defconfig file. 1859 1860 If ZBOOT_ROM is not enabled, this has no effect. 1861 1862config ZBOOT_ROM 1863 bool "Compressed boot loader in ROM/flash" 1864 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS 1865 help 1866 Say Y here if you intend to execute your compressed kernel image 1867 (zImage) directly from ROM or flash. If unsure, say N. 1868 1869choice 1870 prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)" 1871 depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL 1872 default ZBOOT_ROM_NONE 1873 help 1874 Include experimental SD/MMC loading code in the ROM-able zImage. 1875 With this enabled it is possible to write the the ROM-able zImage 1876 kernel image to an MMC or SD card and boot the kernel straight 1877 from the reset vector. At reset the processor Mask ROM will load 1878 the first part of the the ROM-able zImage which in turn loads the 1879 rest the kernel image to RAM. 1880 1881config ZBOOT_ROM_NONE 1882 bool "No SD/MMC loader in zImage (EXPERIMENTAL)" 1883 help 1884 Do not load image from SD or MMC 1885 1886config ZBOOT_ROM_MMCIF 1887 bool "Include MMCIF loader in zImage (EXPERIMENTAL)" 1888 help 1889 Load image from MMCIF hardware block. 1890 1891config ZBOOT_ROM_SH_MOBILE_SDHI 1892 bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)" 1893 help 1894 Load image from SDHI hardware block 1895 1896endchoice 1897 1898config ARM_APPENDED_DTB 1899 bool "Use appended device tree blob to zImage (EXPERIMENTAL)" 1900 depends on OF && !ZBOOT_ROM && EXPERIMENTAL 1901 help 1902 With this option, the boot code will look for a device tree binary 1903 (DTB) appended to zImage 1904 (e.g. cat zImage <filename>.dtb > zImage_w_dtb). 1905 1906 This is meant as a backward compatibility convenience for those 1907 systems with a bootloader that can't be upgraded to accommodate 1908 the documented boot protocol using a device tree. 1909 1910 Beware that there is very little in terms of protection against 1911 this option being confused by leftover garbage in memory that might 1912 look like a DTB header after a reboot if no actual DTB is appended 1913 to zImage. Do not leave this option active in a production kernel 1914 if you don't intend to always append a DTB. Proper passing of the 1915 location into r2 of a bootloader provided DTB is always preferable 1916 to this option. 1917 1918config ARM_ATAG_DTB_COMPAT 1919 bool "Supplement the appended DTB with traditional ATAG information" 1920 depends on ARM_APPENDED_DTB 1921 help 1922 Some old bootloaders can't be updated to a DTB capable one, yet 1923 they provide ATAGs with memory configuration, the ramdisk address, 1924 the kernel cmdline string, etc. Such information is dynamically 1925 provided by the bootloader and can't always be stored in a static 1926 DTB. To allow a device tree enabled kernel to be used with such 1927 bootloaders, this option allows zImage to extract the information 1928 from the ATAG list and store it at run time into the appended DTB. 1929 1930config CMDLINE 1931 string "Default kernel command string" 1932 default "" 1933 help 1934 On some architectures (EBSA110 and CATS), there is currently no way 1935 for the boot loader to pass arguments to the kernel. For these 1936 architectures, you should supply some command-line options at build 1937 time by entering them here. As a minimum, you should specify the 1938 memory size and the root device (e.g., mem=64M root=/dev/nfs). 1939 1940choice 1941 prompt "Kernel command line type" if CMDLINE != "" 1942 default CMDLINE_FROM_BOOTLOADER 1943 1944config CMDLINE_FROM_BOOTLOADER 1945 bool "Use bootloader kernel arguments if available" 1946 help 1947 Uses the command-line options passed by the boot loader. If 1948 the boot loader doesn't provide any, the default kernel command 1949 string provided in CMDLINE will be used. 1950 1951config CMDLINE_EXTEND 1952 bool "Extend bootloader kernel arguments" 1953 help 1954 The command-line arguments provided by the boot loader will be 1955 appended to the default kernel command string. 1956 1957config CMDLINE_FORCE 1958 bool "Always use the default kernel command string" 1959 help 1960 Always use the default kernel command string, even if the boot 1961 loader passes other arguments to the kernel. 1962 This is useful if you cannot or don't want to change the 1963 command-line options your boot loader passes to the kernel. 1964endchoice 1965 1966config XIP_KERNEL 1967 bool "Kernel Execute-In-Place from ROM" 1968 depends on !ZBOOT_ROM 1969 help 1970 Execute-In-Place allows the kernel to run from non-volatile storage 1971 directly addressable by the CPU, such as NOR flash. This saves RAM 1972 space since the text section of the kernel is not loaded from flash 1973 to RAM. Read-write sections, such as the data section and stack, 1974 are still copied to RAM. The XIP kernel is not compressed since 1975 it has to run directly from flash, so it will take more space to 1976 store it. The flash address used to link the kernel object files, 1977 and for storing it, is configuration dependent. Therefore, if you 1978 say Y here, you must know the proper physical address where to 1979 store the kernel image depending on your own flash memory usage. 1980 1981 Also note that the make target becomes "make xipImage" rather than 1982 "make zImage" or "make Image". The final kernel binary to put in 1983 ROM memory will be arch/arm/boot/xipImage. 1984 1985 If unsure, say N. 1986 1987config XIP_PHYS_ADDR 1988 hex "XIP Kernel Physical Location" 1989 depends on XIP_KERNEL 1990 default "0x00080000" 1991 help 1992 This is the physical address in your flash memory the kernel will 1993 be linked for and stored to. This address is dependent on your 1994 own flash usage. 1995 1996config KEXEC 1997 bool "Kexec system call (EXPERIMENTAL)" 1998 depends on EXPERIMENTAL 1999 help 2000 kexec is a system call that implements the ability to shutdown your 2001 current kernel, and to start another kernel. It is like a reboot 2002 but it is independent of the system firmware. And like a reboot 2003 you can start any kernel with it, not just Linux. 2004 2005 It is an ongoing process to be certain the hardware in a machine 2006 is properly shutdown, so do not be surprised if this code does not 2007 initially work for you. It may help to enable device hotplugging 2008 support. 2009 2010config ATAGS_PROC 2011 bool "Export atags in procfs" 2012 depends on KEXEC 2013 default y 2014 help 2015 Should the atags used to boot the kernel be exported in an "atags" 2016 file in procfs. Useful with kexec. 2017 2018config CRASH_DUMP 2019 bool "Build kdump crash kernel (EXPERIMENTAL)" 2020 depends on EXPERIMENTAL 2021 help 2022 Generate crash dump after being started by kexec. This should 2023 be normally only set in special crash dump kernels which are 2024 loaded in the main kernel with kexec-tools into a specially 2025 reserved region and then later executed after a crash by 2026 kdump/kexec. The crash dump kernel must be compiled to a 2027 memory address not used by the main kernel 2028 2029 For more details see Documentation/kdump/kdump.txt 2030 2031config AUTO_ZRELADDR 2032 bool "Auto calculation of the decompressed kernel image address" 2033 depends on !ZBOOT_ROM && !ARCH_U300 2034 help 2035 ZRELADDR is the physical address where the decompressed kernel 2036 image will be placed. If AUTO_ZRELADDR is selected, the address 2037 will be determined at run-time by masking the current IP with 2038 0xf8000000. This assumes the zImage being placed in the first 128MB 2039 from start of memory. 2040 2041endmenu 2042 2043menu "CPU Power Management" 2044 2045if ARCH_HAS_CPUFREQ 2046 2047source "drivers/cpufreq/Kconfig" 2048 2049config CPU_FREQ_IMX 2050 tristate "CPUfreq driver for i.MX CPUs" 2051 depends on ARCH_MXC && CPU_FREQ 2052 help 2053 This enables the CPUfreq driver for i.MX CPUs. 2054 2055config CPU_FREQ_SA1100 2056 bool 2057 2058config CPU_FREQ_SA1110 2059 bool 2060 2061config CPU_FREQ_INTEGRATOR 2062 tristate "CPUfreq driver for ARM Integrator CPUs" 2063 depends on ARCH_INTEGRATOR && CPU_FREQ 2064 default y 2065 help 2066 This enables the CPUfreq driver for ARM Integrator CPUs. 2067 2068 For details, take a look at <file:Documentation/cpu-freq>. 2069 2070 If in doubt, say Y. 2071 2072config CPU_FREQ_PXA 2073 bool 2074 depends on CPU_FREQ && ARCH_PXA && PXA25x 2075 default y 2076 select CPU_FREQ_TABLE 2077 select CPU_FREQ_DEFAULT_GOV_USERSPACE 2078 2079config CPU_FREQ_S3C 2080 bool 2081 help 2082 Internal configuration node for common cpufreq on Samsung SoC 2083 2084config CPU_FREQ_S3C24XX 2085 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" 2086 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL 2087 select CPU_FREQ_S3C 2088 help 2089 This enables the CPUfreq driver for the Samsung S3C24XX family 2090 of CPUs. 2091 2092 For details, take a look at <file:Documentation/cpu-freq>. 2093 2094 If in doubt, say N. 2095 2096config CPU_FREQ_S3C24XX_PLL 2097 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" 2098 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL 2099 help 2100 Compile in support for changing the PLL frequency from the 2101 S3C24XX series CPUfreq driver. The PLL takes time to settle 2102 after a frequency change, so by default it is not enabled. 2103 2104 This also means that the PLL tables for the selected CPU(s) will 2105 be built which may increase the size of the kernel image. 2106 2107config CPU_FREQ_S3C24XX_DEBUG 2108 bool "Debug CPUfreq Samsung driver core" 2109 depends on CPU_FREQ_S3C24XX 2110 help 2111 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core 2112 2113config CPU_FREQ_S3C24XX_IODEBUG 2114 bool "Debug CPUfreq Samsung driver IO timing" 2115 depends on CPU_FREQ_S3C24XX 2116 help 2117 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core 2118 2119config CPU_FREQ_S3C24XX_DEBUGFS 2120 bool "Export debugfs for CPUFreq" 2121 depends on CPU_FREQ_S3C24XX && DEBUG_FS 2122 help 2123 Export status information via debugfs. 2124 2125endif 2126 2127source "drivers/cpuidle/Kconfig" 2128 2129endmenu 2130 2131menu "Floating point emulation" 2132 2133comment "At least one emulation must be selected" 2134 2135config FPE_NWFPE 2136 bool "NWFPE math emulation" 2137 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL 2138 ---help--- 2139 Say Y to include the NWFPE floating point emulator in the kernel. 2140 This is necessary to run most binaries. Linux does not currently 2141 support floating point hardware so you need to say Y here even if 2142 your machine has an FPA or floating point co-processor podule. 2143 2144 You may say N here if you are going to load the Acorn FPEmulator 2145 early in the bootup. 2146 2147config FPE_NWFPE_XP 2148 bool "Support extended precision" 2149 depends on FPE_NWFPE 2150 help 2151 Say Y to include 80-bit support in the kernel floating-point 2152 emulator. Otherwise, only 32 and 64-bit support is compiled in. 2153 Note that gcc does not generate 80-bit operations by default, 2154 so in most cases this option only enlarges the size of the 2155 floating point emulator without any good reason. 2156 2157 You almost surely want to say N here. 2158 2159config FPE_FASTFPE 2160 bool "FastFPE math emulation (EXPERIMENTAL)" 2161 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL 2162 ---help--- 2163 Say Y here to include the FAST floating point emulator in the kernel. 2164 This is an experimental much faster emulator which now also has full 2165 precision for the mantissa. It does not support any exceptions. 2166 It is very simple, and approximately 3-6 times faster than NWFPE. 2167 2168 It should be sufficient for most programs. It may be not suitable 2169 for scientific calculations, but you have to check this for yourself. 2170 If you do not feel you need a faster FP emulation you should better 2171 choose NWFPE. 2172 2173config VFP 2174 bool "VFP-format floating point maths" 2175 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON 2176 help 2177 Say Y to include VFP support code in the kernel. This is needed 2178 if your hardware includes a VFP unit. 2179 2180 Please see <file:Documentation/arm/VFP/release-notes.txt> for 2181 release notes and additional status information. 2182 2183 Say N if your target does not have VFP hardware. 2184 2185config VFPv3 2186 bool 2187 depends on VFP 2188 default y if CPU_V7 2189 2190config NEON 2191 bool "Advanced SIMD (NEON) Extension support" 2192 depends on VFPv3 && CPU_V7 2193 help 2194 Say Y to include support code for NEON, the ARMv7 Advanced SIMD 2195 Extension. 2196 2197endmenu 2198 2199menu "Userspace binary formats" 2200 2201source "fs/Kconfig.binfmt" 2202 2203config ARTHUR 2204 tristate "RISC OS personality" 2205 depends on !AEABI 2206 help 2207 Say Y here to include the kernel code necessary if you want to run 2208 Acorn RISC OS/Arthur binaries under Linux. This code is still very 2209 experimental; if this sounds frightening, say N and sleep in peace. 2210 You can also say M here to compile this support as a module (which 2211 will be called arthur). 2212 2213endmenu 2214 2215menu "Power management options" 2216 2217source "kernel/power/Kconfig" 2218 2219config ARCH_SUSPEND_POSSIBLE 2220 depends on !ARCH_S5PC100 2221 depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \ 2222 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE 2223 def_bool y 2224 2225config ARM_CPU_SUSPEND 2226 def_bool PM_SLEEP 2227 2228endmenu 2229 2230source "net/Kconfig" 2231 2232source "drivers/Kconfig" 2233 2234source "fs/Kconfig" 2235 2236source "arch/arm/Kconfig.debug" 2237 2238source "security/Kconfig" 2239 2240source "crypto/Kconfig" 2241 2242source "lib/Kconfig" 2243