1config ARM 2 bool 3 default y 4 select HAVE_AOUT 5 select HAVE_DMA_API_DEBUG 6 select HAVE_IDE 7 select HAVE_MEMBLOCK 8 select RTC_LIB 9 select SYS_SUPPORTS_APM_EMULATION 10 select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI) 11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS) 12 select HAVE_ARCH_KGDB 13 select HAVE_KPROBES if !XIP_KERNEL 14 select HAVE_KRETPROBES if (HAVE_KPROBES) 15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) 16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) 17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) 18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) 19 select HAVE_GENERIC_DMA_COHERENT 20 select HAVE_KERNEL_GZIP 21 select HAVE_KERNEL_LZO 22 select HAVE_KERNEL_LZMA 23 select HAVE_IRQ_WORK 24 select HAVE_PERF_EVENTS 25 select PERF_USE_VMALLOC 26 select HAVE_REGS_AND_STACK_ACCESS_API 27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)) 28 select HAVE_C_RECORDMCOUNT 29 select HAVE_GENERIC_HARDIRQS 30 select HAVE_SPARSE_IRQ 31 select GENERIC_IRQ_SHOW 32 help 33 The ARM series is a line of low-power-consumption RISC chip designs 34 licensed by ARM Ltd and targeted at embedded applications and 35 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer 36 manufactured, but legacy ARM-based PC hardware remains popular in 37 Europe. There is an ARM Linux project with a web page at 38 <http://www.arm.linux.org.uk/>. 39 40config ARM_HAS_SG_CHAIN 41 bool 42 43config HAVE_PWM 44 bool 45 46config MIGHT_HAVE_PCI 47 bool 48 49config SYS_SUPPORTS_APM_EMULATION 50 bool 51 52config HAVE_SCHED_CLOCK 53 bool 54 55config GENERIC_GPIO 56 bool 57 58config ARCH_USES_GETTIMEOFFSET 59 bool 60 default n 61 62config GENERIC_CLOCKEVENTS 63 bool 64 65config GENERIC_CLOCKEVENTS_BROADCAST 66 bool 67 depends on GENERIC_CLOCKEVENTS 68 default y if SMP 69 70config KTIME_SCALAR 71 bool 72 default y 73 74config HAVE_TCM 75 bool 76 select GENERIC_ALLOCATOR 77 78config HAVE_PROC_CPU 79 bool 80 81config NO_IOPORT 82 bool 83 84config EISA 85 bool 86 ---help--- 87 The Extended Industry Standard Architecture (EISA) bus was 88 developed as an open alternative to the IBM MicroChannel bus. 89 90 The EISA bus provided some of the features of the IBM MicroChannel 91 bus while maintaining backward compatibility with cards made for 92 the older ISA bus. The EISA bus saw limited use between 1988 and 93 1995 when it was made obsolete by the PCI bus. 94 95 Say Y here if you are building a kernel for an EISA-based machine. 96 97 Otherwise, say N. 98 99config SBUS 100 bool 101 102config MCA 103 bool 104 help 105 MicroChannel Architecture is found in some IBM PS/2 machines and 106 laptops. It is a bus system similar to PCI or ISA. See 107 <file:Documentation/mca.txt> (and especially the web page given 108 there) before attempting to build an MCA bus kernel. 109 110config STACKTRACE_SUPPORT 111 bool 112 default y 113 114config HAVE_LATENCYTOP_SUPPORT 115 bool 116 depends on !SMP 117 default y 118 119config LOCKDEP_SUPPORT 120 bool 121 default y 122 123config TRACE_IRQFLAGS_SUPPORT 124 bool 125 default y 126 127config HARDIRQS_SW_RESEND 128 bool 129 default y 130 131config GENERIC_IRQ_PROBE 132 bool 133 default y 134 135config GENERIC_LOCKBREAK 136 bool 137 default y 138 depends on SMP && PREEMPT 139 140config RWSEM_GENERIC_SPINLOCK 141 bool 142 default y 143 144config RWSEM_XCHGADD_ALGORITHM 145 bool 146 147config ARCH_HAS_ILOG2_U32 148 bool 149 150config ARCH_HAS_ILOG2_U64 151 bool 152 153config ARCH_HAS_CPUFREQ 154 bool 155 help 156 Internal node to signify that the ARCH has CPUFREQ support 157 and that the relevant menu configurations are displayed for 158 it. 159 160config ARCH_HAS_CPU_IDLE_WAIT 161 def_bool y 162 163config GENERIC_HWEIGHT 164 bool 165 default y 166 167config GENERIC_CALIBRATE_DELAY 168 bool 169 default y 170 171config ARCH_MAY_HAVE_PC_FDC 172 bool 173 174config ZONE_DMA 175 bool 176 177config NEED_DMA_MAP_STATE 178 def_bool y 179 180config GENERIC_ISA_DMA 181 bool 182 183config FIQ 184 bool 185 186config ARCH_MTD_XIP 187 bool 188 189config VECTORS_BASE 190 hex 191 default 0xffff0000 if MMU || CPU_HIGH_VECTOR 192 default DRAM_BASE if REMAP_VECTORS_TO_RAM 193 default 0x00000000 194 help 195 The base address of exception vectors. 196 197config ARM_PATCH_PHYS_VIRT 198 bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)" 199 depends on EXPERIMENTAL 200 depends on !XIP_KERNEL && MMU 201 depends on !ARCH_REALVIEW || !SPARSEMEM 202 help 203 Patch phys-to-virt and virt-to-phys translation functions at 204 boot and module load time according to the position of the 205 kernel in system memory. 206 207 This can only be used with non-XIP MMU kernels where the base 208 of physical memory is at a 16MB boundary, or theoretically 64K 209 for the MSM machine class. 210 211config ARM_PATCH_PHYS_VIRT_16BIT 212 def_bool y 213 depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM 214 help 215 This option extends the physical to virtual translation patching 216 to allow physical memory down to a theoretical minimum of 64K 217 boundaries. 218 219source "init/Kconfig" 220 221source "kernel/Kconfig.freezer" 222 223menu "System Type" 224 225config MMU 226 bool "MMU-based Paged Memory Management Support" 227 default y 228 help 229 Select if you want MMU-based virtualised addressing space 230 support by paged memory management. If unsure, say 'Y'. 231 232# 233# The "ARM system type" choice list is ordered alphabetically by option 234# text. Please add new entries in the option alphabetic order. 235# 236choice 237 prompt "ARM system type" 238 default ARCH_VERSATILE 239 240config ARCH_INTEGRATOR 241 bool "ARM Ltd. Integrator family" 242 select ARM_AMBA 243 select ARCH_HAS_CPUFREQ 244 select CLKDEV_LOOKUP 245 select HAVE_MACH_CLKDEV 246 select ICST 247 select GENERIC_CLOCKEVENTS 248 select PLAT_VERSATILE 249 select PLAT_VERSATILE_FPGA_IRQ 250 help 251 Support for ARM's Integrator platform. 252 253config ARCH_REALVIEW 254 bool "ARM Ltd. RealView family" 255 select ARM_AMBA 256 select CLKDEV_LOOKUP 257 select HAVE_MACH_CLKDEV 258 select ICST 259 select GENERIC_CLOCKEVENTS 260 select ARCH_WANT_OPTIONAL_GPIOLIB 261 select PLAT_VERSATILE 262 select PLAT_VERSATILE_CLCD 263 select ARM_TIMER_SP804 264 select GPIO_PL061 if GPIOLIB 265 help 266 This enables support for ARM Ltd RealView boards. 267 268config ARCH_VERSATILE 269 bool "ARM Ltd. Versatile family" 270 select ARM_AMBA 271 select ARM_VIC 272 select CLKDEV_LOOKUP 273 select HAVE_MACH_CLKDEV 274 select ICST 275 select GENERIC_CLOCKEVENTS 276 select ARCH_WANT_OPTIONAL_GPIOLIB 277 select PLAT_VERSATILE 278 select PLAT_VERSATILE_CLCD 279 select PLAT_VERSATILE_FPGA_IRQ 280 select ARM_TIMER_SP804 281 help 282 This enables support for ARM Ltd Versatile board. 283 284config ARCH_VEXPRESS 285 bool "ARM Ltd. Versatile Express family" 286 select ARCH_WANT_OPTIONAL_GPIOLIB 287 select ARM_AMBA 288 select ARM_TIMER_SP804 289 select CLKDEV_LOOKUP 290 select HAVE_MACH_CLKDEV 291 select GENERIC_CLOCKEVENTS 292 select HAVE_CLK 293 select HAVE_PATA_PLATFORM 294 select ICST 295 select PLAT_VERSATILE 296 select PLAT_VERSATILE_CLCD 297 help 298 This enables support for the ARM Ltd Versatile Express boards. 299 300config ARCH_AT91 301 bool "Atmel AT91" 302 select ARCH_REQUIRE_GPIOLIB 303 select HAVE_CLK 304 select CLKDEV_LOOKUP 305 select ARM_PATCH_PHYS_VIRT if MMU 306 help 307 This enables support for systems based on the Atmel AT91RM9200, 308 AT91SAM9 and AT91CAP9 processors. 309 310config ARCH_BCMRING 311 bool "Broadcom BCMRING" 312 depends on MMU 313 select CPU_V6 314 select ARM_AMBA 315 select ARM_TIMER_SP804 316 select CLKDEV_LOOKUP 317 select GENERIC_CLOCKEVENTS 318 select ARCH_WANT_OPTIONAL_GPIOLIB 319 help 320 Support for Broadcom's BCMRing platform. 321 322config ARCH_CLPS711X 323 bool "Cirrus Logic CLPS711x/EP721x-based" 324 select CPU_ARM720T 325 select ARCH_USES_GETTIMEOFFSET 326 help 327 Support for Cirrus Logic 711x/721x based boards. 328 329config ARCH_CNS3XXX 330 bool "Cavium Networks CNS3XXX family" 331 select CPU_V6K 332 select GENERIC_CLOCKEVENTS 333 select ARM_GIC 334 select MIGHT_HAVE_PCI 335 select PCI_DOMAINS if PCI 336 help 337 Support for Cavium Networks CNS3XXX platform. 338 339config ARCH_GEMINI 340 bool "Cortina Systems Gemini" 341 select CPU_FA526 342 select ARCH_REQUIRE_GPIOLIB 343 select ARCH_USES_GETTIMEOFFSET 344 help 345 Support for the Cortina Systems Gemini family SoCs 346 347config ARCH_PRIMA2 348 bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" 349 select CPU_V7 350 select GENERIC_TIME 351 select NO_IOPORT 352 select GENERIC_CLOCKEVENTS 353 select CLKDEV_LOOKUP 354 select GENERIC_IRQ_CHIP 355 select USE_OF 356 select ZONE_DMA 357 help 358 Support for CSR SiRFSoC ARM Cortex A9 Platform 359 360config ARCH_EBSA110 361 bool "EBSA-110" 362 select CPU_SA110 363 select ISA 364 select NO_IOPORT 365 select ARCH_USES_GETTIMEOFFSET 366 help 367 This is an evaluation board for the StrongARM processor available 368 from Digital. It has limited hardware on-board, including an 369 Ethernet interface, two PCMCIA sockets, two serial ports and a 370 parallel port. 371 372config ARCH_EP93XX 373 bool "EP93xx-based" 374 select CPU_ARM920T 375 select ARM_AMBA 376 select ARM_VIC 377 select CLKDEV_LOOKUP 378 select ARCH_REQUIRE_GPIOLIB 379 select ARCH_HAS_HOLES_MEMORYMODEL 380 select ARCH_USES_GETTIMEOFFSET 381 help 382 This enables support for the Cirrus EP93xx series of CPUs. 383 384config ARCH_FOOTBRIDGE 385 bool "FootBridge" 386 select CPU_SA110 387 select FOOTBRIDGE 388 select GENERIC_CLOCKEVENTS 389 help 390 Support for systems based on the DC21285 companion chip 391 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. 392 393config ARCH_MXC 394 bool "Freescale MXC/iMX-based" 395 select GENERIC_CLOCKEVENTS 396 select ARCH_REQUIRE_GPIOLIB 397 select CLKDEV_LOOKUP 398 select CLKSRC_MMIO 399 select GENERIC_IRQ_CHIP 400 select HAVE_SCHED_CLOCK 401 help 402 Support for Freescale MXC/iMX-based family of processors 403 404config ARCH_MXS 405 bool "Freescale MXS-based" 406 select GENERIC_CLOCKEVENTS 407 select ARCH_REQUIRE_GPIOLIB 408 select CLKDEV_LOOKUP 409 select CLKSRC_MMIO 410 help 411 Support for Freescale MXS-based family of processors 412 413config ARCH_NETX 414 bool "Hilscher NetX based" 415 select CLKSRC_MMIO 416 select CPU_ARM926T 417 select ARM_VIC 418 select GENERIC_CLOCKEVENTS 419 help 420 This enables support for systems based on the Hilscher NetX Soc 421 422config ARCH_H720X 423 bool "Hynix HMS720x-based" 424 select CPU_ARM720T 425 select ISA_DMA_API 426 select ARCH_USES_GETTIMEOFFSET 427 help 428 This enables support for systems based on the Hynix HMS720x 429 430config ARCH_IOP13XX 431 bool "IOP13xx-based" 432 depends on MMU 433 select CPU_XSC3 434 select PLAT_IOP 435 select PCI 436 select ARCH_SUPPORTS_MSI 437 select VMSPLIT_1G 438 help 439 Support for Intel's IOP13XX (XScale) family of processors. 440 441config ARCH_IOP32X 442 bool "IOP32x-based" 443 depends on MMU 444 select CPU_XSCALE 445 select PLAT_IOP 446 select PCI 447 select ARCH_REQUIRE_GPIOLIB 448 help 449 Support for Intel's 80219 and IOP32X (XScale) family of 450 processors. 451 452config ARCH_IOP33X 453 bool "IOP33x-based" 454 depends on MMU 455 select CPU_XSCALE 456 select PLAT_IOP 457 select PCI 458 select ARCH_REQUIRE_GPIOLIB 459 help 460 Support for Intel's IOP33X (XScale) family of processors. 461 462config ARCH_IXP23XX 463 bool "IXP23XX-based" 464 depends on MMU 465 select CPU_XSC3 466 select PCI 467 select ARCH_USES_GETTIMEOFFSET 468 help 469 Support for Intel's IXP23xx (XScale) family of processors. 470 471config ARCH_IXP2000 472 bool "IXP2400/2800-based" 473 depends on MMU 474 select CPU_XSCALE 475 select PCI 476 select ARCH_USES_GETTIMEOFFSET 477 help 478 Support for Intel's IXP2400/2800 (XScale) family of processors. 479 480config ARCH_IXP4XX 481 bool "IXP4xx-based" 482 depends on MMU 483 select CLKSRC_MMIO 484 select CPU_XSCALE 485 select GENERIC_GPIO 486 select GENERIC_CLOCKEVENTS 487 select HAVE_SCHED_CLOCK 488 select MIGHT_HAVE_PCI 489 select DMABOUNCE if PCI 490 help 491 Support for Intel's IXP4XX (XScale) family of processors. 492 493config ARCH_DOVE 494 bool "Marvell Dove" 495 select CPU_V7 496 select PCI 497 select ARCH_REQUIRE_GPIOLIB 498 select GENERIC_CLOCKEVENTS 499 select PLAT_ORION 500 help 501 Support for the Marvell Dove SoC 88AP510 502 503config ARCH_KIRKWOOD 504 bool "Marvell Kirkwood" 505 select CPU_FEROCEON 506 select PCI 507 select ARCH_REQUIRE_GPIOLIB 508 select GENERIC_CLOCKEVENTS 509 select PLAT_ORION 510 help 511 Support for the following Marvell Kirkwood series SoCs: 512 88F6180, 88F6192 and 88F6281. 513 514config ARCH_LPC32XX 515 bool "NXP LPC32XX" 516 select CLKSRC_MMIO 517 select CPU_ARM926T 518 select ARCH_REQUIRE_GPIOLIB 519 select HAVE_IDE 520 select ARM_AMBA 521 select USB_ARCH_HAS_OHCI 522 select CLKDEV_LOOKUP 523 select GENERIC_TIME 524 select GENERIC_CLOCKEVENTS 525 help 526 Support for the NXP LPC32XX family of processors 527 528config ARCH_MV78XX0 529 bool "Marvell MV78xx0" 530 select CPU_FEROCEON 531 select PCI 532 select ARCH_REQUIRE_GPIOLIB 533 select GENERIC_CLOCKEVENTS 534 select PLAT_ORION 535 help 536 Support for the following Marvell MV78xx0 series SoCs: 537 MV781x0, MV782x0. 538 539config ARCH_ORION5X 540 bool "Marvell Orion" 541 depends on MMU 542 select CPU_FEROCEON 543 select PCI 544 select ARCH_REQUIRE_GPIOLIB 545 select GENERIC_CLOCKEVENTS 546 select PLAT_ORION 547 help 548 Support for the following Marvell Orion 5x series SoCs: 549 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), 550 Orion-2 (5281), Orion-1-90 (6183). 551 552config ARCH_MMP 553 bool "Marvell PXA168/910/MMP2" 554 depends on MMU 555 select ARCH_REQUIRE_GPIOLIB 556 select CLKDEV_LOOKUP 557 select GENERIC_CLOCKEVENTS 558 select HAVE_SCHED_CLOCK 559 select TICK_ONESHOT 560 select PLAT_PXA 561 select SPARSE_IRQ 562 help 563 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. 564 565config ARCH_KS8695 566 bool "Micrel/Kendin KS8695" 567 select CPU_ARM922T 568 select ARCH_REQUIRE_GPIOLIB 569 select ARCH_USES_GETTIMEOFFSET 570 help 571 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based 572 System-on-Chip devices. 573 574config ARCH_W90X900 575 bool "Nuvoton W90X900 CPU" 576 select CPU_ARM926T 577 select ARCH_REQUIRE_GPIOLIB 578 select CLKDEV_LOOKUP 579 select CLKSRC_MMIO 580 select GENERIC_CLOCKEVENTS 581 help 582 Support for Nuvoton (Winbond logic dept.) ARM9 processor, 583 At present, the w90x900 has been renamed nuc900, regarding 584 the ARM series product line, you can login the following 585 link address to know more. 586 587 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ 588 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> 589 590config ARCH_NUC93X 591 bool "Nuvoton NUC93X CPU" 592 select CPU_ARM926T 593 select CLKDEV_LOOKUP 594 help 595 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a 596 low-power and high performance MPEG-4/JPEG multimedia controller chip. 597 598config ARCH_TEGRA 599 bool "NVIDIA Tegra" 600 select CLKDEV_LOOKUP 601 select CLKSRC_MMIO 602 select GENERIC_TIME 603 select GENERIC_CLOCKEVENTS 604 select GENERIC_GPIO 605 select HAVE_CLK 606 select HAVE_SCHED_CLOCK 607 select ARCH_HAS_CPUFREQ 608 help 609 This enables support for NVIDIA Tegra based systems (Tegra APX, 610 Tegra 6xx and Tegra 2 series). 611 612config ARCH_PNX4008 613 bool "Philips Nexperia PNX4008 Mobile" 614 select CPU_ARM926T 615 select CLKDEV_LOOKUP 616 select ARCH_USES_GETTIMEOFFSET 617 help 618 This enables support for Philips PNX4008 mobile platform. 619 620config ARCH_PXA 621 bool "PXA2xx/PXA3xx-based" 622 depends on MMU 623 select ARCH_MTD_XIP 624 select ARCH_HAS_CPUFREQ 625 select CLKDEV_LOOKUP 626 select CLKSRC_MMIO 627 select ARCH_REQUIRE_GPIOLIB 628 select GENERIC_CLOCKEVENTS 629 select HAVE_SCHED_CLOCK 630 select TICK_ONESHOT 631 select PLAT_PXA 632 select SPARSE_IRQ 633 select AUTO_ZRELADDR 634 select MULTI_IRQ_HANDLER 635 help 636 Support for Intel/Marvell's PXA2xx/PXA3xx processor line. 637 638config ARCH_MSM 639 bool "Qualcomm MSM" 640 select HAVE_CLK 641 select GENERIC_CLOCKEVENTS 642 select ARCH_REQUIRE_GPIOLIB 643 select CLKDEV_LOOKUP 644 help 645 Support for Qualcomm MSM/QSD based systems. This runs on the 646 apps processor of the MSM/QSD and depends on a shared memory 647 interface to the modem processor which runs the baseband 648 stack and controls some vital subsystems 649 (clock and power control, etc). 650 651config ARCH_SHMOBILE 652 bool "Renesas SH-Mobile / R-Mobile" 653 select HAVE_CLK 654 select CLKDEV_LOOKUP 655 select HAVE_MACH_CLKDEV 656 select GENERIC_CLOCKEVENTS 657 select NO_IOPORT 658 select SPARSE_IRQ 659 select MULTI_IRQ_HANDLER 660 select PM_GENERIC_DOMAINS if PM 661 help 662 Support for Renesas's SH-Mobile and R-Mobile ARM platforms. 663 664config ARCH_RPC 665 bool "RiscPC" 666 select ARCH_ACORN 667 select FIQ 668 select TIMER_ACORN 669 select ARCH_MAY_HAVE_PC_FDC 670 select HAVE_PATA_PLATFORM 671 select ISA_DMA_API 672 select NO_IOPORT 673 select ARCH_SPARSEMEM_ENABLE 674 select ARCH_USES_GETTIMEOFFSET 675 help 676 On the Acorn Risc-PC, Linux can support the internal IDE disk and 677 CD-ROM interface, serial and parallel port, and the floppy drive. 678 679config ARCH_SA1100 680 bool "SA1100-based" 681 select CLKSRC_MMIO 682 select CPU_SA1100 683 select ISA 684 select ARCH_SPARSEMEM_ENABLE 685 select ARCH_MTD_XIP 686 select ARCH_HAS_CPUFREQ 687 select CPU_FREQ 688 select GENERIC_CLOCKEVENTS 689 select HAVE_CLK 690 select HAVE_SCHED_CLOCK 691 select TICK_ONESHOT 692 select ARCH_REQUIRE_GPIOLIB 693 help 694 Support for StrongARM 11x0 based boards. 695 696config ARCH_S3C2410 697 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" 698 select GENERIC_GPIO 699 select ARCH_HAS_CPUFREQ 700 select HAVE_CLK 701 select CLKDEV_LOOKUP 702 select ARCH_USES_GETTIMEOFFSET 703 select HAVE_S3C2410_I2C if I2C 704 help 705 Samsung S3C2410X CPU based systems, such as the Simtec Electronics 706 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or 707 the Samsung SMDK2410 development board (and derivatives). 708 709 Note, the S3C2416 and the S3C2450 are so close that they even share 710 the same SoC ID code. This means that there is no separate machine 711 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. 712 713config ARCH_S3C64XX 714 bool "Samsung S3C64XX" 715 select PLAT_SAMSUNG 716 select CPU_V6 717 select ARM_VIC 718 select HAVE_CLK 719 select CLKDEV_LOOKUP 720 select NO_IOPORT 721 select ARCH_USES_GETTIMEOFFSET 722 select ARCH_HAS_CPUFREQ 723 select ARCH_REQUIRE_GPIOLIB 724 select SAMSUNG_CLKSRC 725 select SAMSUNG_IRQ_VIC_TIMER 726 select SAMSUNG_IRQ_UART 727 select S3C_GPIO_TRACK 728 select S3C_GPIO_PULL_UPDOWN 729 select S3C_GPIO_CFG_S3C24XX 730 select S3C_GPIO_CFG_S3C64XX 731 select S3C_DEV_NAND 732 select USB_ARCH_HAS_OHCI 733 select SAMSUNG_GPIOLIB_4BIT 734 select HAVE_S3C2410_I2C if I2C 735 select HAVE_S3C2410_WATCHDOG if WATCHDOG 736 help 737 Samsung S3C64XX series based systems 738 739config ARCH_S5P64X0 740 bool "Samsung S5P6440 S5P6450" 741 select CPU_V6 742 select GENERIC_GPIO 743 select HAVE_CLK 744 select CLKDEV_LOOKUP 745 select CLKSRC_MMIO 746 select HAVE_S3C2410_WATCHDOG if WATCHDOG 747 select GENERIC_CLOCKEVENTS 748 select HAVE_SCHED_CLOCK 749 select HAVE_S3C2410_I2C if I2C 750 select HAVE_S3C_RTC if RTC_CLASS 751 help 752 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, 753 SMDK6450. 754 755config ARCH_S5PC100 756 bool "Samsung S5PC100" 757 select GENERIC_GPIO 758 select HAVE_CLK 759 select CLKDEV_LOOKUP 760 select CPU_V7 761 select ARM_L1_CACHE_SHIFT_6 762 select ARCH_USES_GETTIMEOFFSET 763 select HAVE_S3C2410_I2C if I2C 764 select HAVE_S3C_RTC if RTC_CLASS 765 select HAVE_S3C2410_WATCHDOG if WATCHDOG 766 help 767 Samsung S5PC100 series based systems 768 769config ARCH_S5PV210 770 bool "Samsung S5PV210/S5PC110" 771 select CPU_V7 772 select ARCH_SPARSEMEM_ENABLE 773 select ARCH_HAS_HOLES_MEMORYMODEL 774 select GENERIC_GPIO 775 select HAVE_CLK 776 select CLKDEV_LOOKUP 777 select CLKSRC_MMIO 778 select ARM_L1_CACHE_SHIFT_6 779 select ARCH_HAS_CPUFREQ 780 select GENERIC_CLOCKEVENTS 781 select HAVE_SCHED_CLOCK 782 select HAVE_S3C2410_I2C if I2C 783 select HAVE_S3C_RTC if RTC_CLASS 784 select HAVE_S3C2410_WATCHDOG if WATCHDOG 785 help 786 Samsung S5PV210/S5PC110 series based systems 787 788config ARCH_EXYNOS4 789 bool "Samsung EXYNOS4" 790 select CPU_V7 791 select ARCH_SPARSEMEM_ENABLE 792 select ARCH_HAS_HOLES_MEMORYMODEL 793 select GENERIC_GPIO 794 select HAVE_CLK 795 select CLKDEV_LOOKUP 796 select ARCH_HAS_CPUFREQ 797 select GENERIC_CLOCKEVENTS 798 select HAVE_S3C_RTC if RTC_CLASS 799 select HAVE_S3C2410_I2C if I2C 800 select HAVE_S3C2410_WATCHDOG if WATCHDOG 801 help 802 Samsung EXYNOS4 series based systems 803 804config ARCH_SHARK 805 bool "Shark" 806 select CPU_SA110 807 select ISA 808 select ISA_DMA 809 select ZONE_DMA 810 select PCI 811 select ARCH_USES_GETTIMEOFFSET 812 help 813 Support for the StrongARM based Digital DNARD machine, also known 814 as "Shark" (<http://www.shark-linux.de/shark.html>). 815 816config ARCH_TCC_926 817 bool "Telechips TCC ARM926-based systems" 818 select CLKSRC_MMIO 819 select CPU_ARM926T 820 select HAVE_CLK 821 select CLKDEV_LOOKUP 822 select GENERIC_CLOCKEVENTS 823 help 824 Support for Telechips TCC ARM926-based systems. 825 826config ARCH_U300 827 bool "ST-Ericsson U300 Series" 828 depends on MMU 829 select CLKSRC_MMIO 830 select CPU_ARM926T 831 select HAVE_SCHED_CLOCK 832 select HAVE_TCM 833 select ARM_AMBA 834 select ARM_VIC 835 select GENERIC_CLOCKEVENTS 836 select CLKDEV_LOOKUP 837 select HAVE_MACH_CLKDEV 838 select GENERIC_GPIO 839 help 840 Support for ST-Ericsson U300 series mobile platforms. 841 842config ARCH_U8500 843 bool "ST-Ericsson U8500 Series" 844 select CPU_V7 845 select ARM_AMBA 846 select GENERIC_CLOCKEVENTS 847 select CLKDEV_LOOKUP 848 select ARCH_REQUIRE_GPIOLIB 849 select ARCH_HAS_CPUFREQ 850 help 851 Support for ST-Ericsson's Ux500 architecture 852 853config ARCH_NOMADIK 854 bool "STMicroelectronics Nomadik" 855 select ARM_AMBA 856 select ARM_VIC 857 select CPU_ARM926T 858 select CLKDEV_LOOKUP 859 select GENERIC_CLOCKEVENTS 860 select ARCH_REQUIRE_GPIOLIB 861 help 862 Support for the Nomadik platform by ST-Ericsson 863 864config ARCH_DAVINCI 865 bool "TI DaVinci" 866 select GENERIC_CLOCKEVENTS 867 select ARCH_REQUIRE_GPIOLIB 868 select ZONE_DMA 869 select HAVE_IDE 870 select CLKDEV_LOOKUP 871 select GENERIC_ALLOCATOR 872 select GENERIC_IRQ_CHIP 873 select ARCH_HAS_HOLES_MEMORYMODEL 874 help 875 Support for TI's DaVinci platform. 876 877config ARCH_OMAP 878 bool "TI OMAP" 879 select HAVE_CLK 880 select ARCH_REQUIRE_GPIOLIB 881 select ARCH_HAS_CPUFREQ 882 select CLKSRC_MMIO 883 select GENERIC_CLOCKEVENTS 884 select HAVE_SCHED_CLOCK 885 select ARCH_HAS_HOLES_MEMORYMODEL 886 help 887 Support for TI's OMAP platform (OMAP1/2/3/4). 888 889config PLAT_SPEAR 890 bool "ST SPEAr" 891 select ARM_AMBA 892 select ARCH_REQUIRE_GPIOLIB 893 select CLKDEV_LOOKUP 894 select CLKSRC_MMIO 895 select GENERIC_CLOCKEVENTS 896 select HAVE_CLK 897 help 898 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). 899 900config ARCH_VT8500 901 bool "VIA/WonderMedia 85xx" 902 select CPU_ARM926T 903 select GENERIC_GPIO 904 select ARCH_HAS_CPUFREQ 905 select GENERIC_CLOCKEVENTS 906 select ARCH_REQUIRE_GPIOLIB 907 select HAVE_PWM 908 help 909 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. 910 911config ARCH_ZYNQ 912 bool "Xilinx Zynq ARM Cortex A9 Platform" 913 select CPU_V7 914 select GENERIC_TIME 915 select GENERIC_CLOCKEVENTS 916 select CLKDEV_LOOKUP 917 select ARM_GIC 918 select ARM_AMBA 919 select ICST 920 select USE_OF 921 help 922 Support for Xilinx Zynq ARM Cortex A9 Platform 923endchoice 924 925# 926# This is sorted alphabetically by mach-* pathname. However, plat-* 927# Kconfigs may be included either alphabetically (according to the 928# plat- suffix) or along side the corresponding mach-* source. 929# 930source "arch/arm/mach-at91/Kconfig" 931 932source "arch/arm/mach-bcmring/Kconfig" 933 934source "arch/arm/mach-clps711x/Kconfig" 935 936source "arch/arm/mach-cns3xxx/Kconfig" 937 938source "arch/arm/mach-davinci/Kconfig" 939 940source "arch/arm/mach-dove/Kconfig" 941 942source "arch/arm/mach-ep93xx/Kconfig" 943 944source "arch/arm/mach-footbridge/Kconfig" 945 946source "arch/arm/mach-gemini/Kconfig" 947 948source "arch/arm/mach-h720x/Kconfig" 949 950source "arch/arm/mach-integrator/Kconfig" 951 952source "arch/arm/mach-iop32x/Kconfig" 953 954source "arch/arm/mach-iop33x/Kconfig" 955 956source "arch/arm/mach-iop13xx/Kconfig" 957 958source "arch/arm/mach-ixp4xx/Kconfig" 959 960source "arch/arm/mach-ixp2000/Kconfig" 961 962source "arch/arm/mach-ixp23xx/Kconfig" 963 964source "arch/arm/mach-kirkwood/Kconfig" 965 966source "arch/arm/mach-ks8695/Kconfig" 967 968source "arch/arm/mach-lpc32xx/Kconfig" 969 970source "arch/arm/mach-msm/Kconfig" 971 972source "arch/arm/mach-mv78xx0/Kconfig" 973 974source "arch/arm/plat-mxc/Kconfig" 975 976source "arch/arm/mach-mxs/Kconfig" 977 978source "arch/arm/mach-netx/Kconfig" 979 980source "arch/arm/mach-nomadik/Kconfig" 981source "arch/arm/plat-nomadik/Kconfig" 982 983source "arch/arm/mach-nuc93x/Kconfig" 984 985source "arch/arm/plat-omap/Kconfig" 986 987source "arch/arm/mach-omap1/Kconfig" 988 989source "arch/arm/mach-omap2/Kconfig" 990 991source "arch/arm/mach-orion5x/Kconfig" 992 993source "arch/arm/mach-pxa/Kconfig" 994source "arch/arm/plat-pxa/Kconfig" 995 996source "arch/arm/mach-mmp/Kconfig" 997 998source "arch/arm/mach-realview/Kconfig" 999 1000source "arch/arm/mach-sa1100/Kconfig" 1001 1002source "arch/arm/plat-samsung/Kconfig" 1003source "arch/arm/plat-s3c24xx/Kconfig" 1004source "arch/arm/plat-s5p/Kconfig" 1005 1006source "arch/arm/plat-spear/Kconfig" 1007 1008source "arch/arm/plat-tcc/Kconfig" 1009 1010if ARCH_S3C2410 1011source "arch/arm/mach-s3c2410/Kconfig" 1012source "arch/arm/mach-s3c2412/Kconfig" 1013source "arch/arm/mach-s3c2416/Kconfig" 1014source "arch/arm/mach-s3c2440/Kconfig" 1015source "arch/arm/mach-s3c2443/Kconfig" 1016endif 1017 1018if ARCH_S3C64XX 1019source "arch/arm/mach-s3c64xx/Kconfig" 1020endif 1021 1022source "arch/arm/mach-s5p64x0/Kconfig" 1023 1024source "arch/arm/mach-s5pc100/Kconfig" 1025 1026source "arch/arm/mach-s5pv210/Kconfig" 1027 1028source "arch/arm/mach-exynos4/Kconfig" 1029 1030source "arch/arm/mach-shmobile/Kconfig" 1031 1032source "arch/arm/mach-tegra/Kconfig" 1033 1034source "arch/arm/mach-u300/Kconfig" 1035 1036source "arch/arm/mach-ux500/Kconfig" 1037 1038source "arch/arm/mach-versatile/Kconfig" 1039 1040source "arch/arm/mach-vexpress/Kconfig" 1041source "arch/arm/plat-versatile/Kconfig" 1042 1043source "arch/arm/mach-vt8500/Kconfig" 1044 1045source "arch/arm/mach-w90x900/Kconfig" 1046 1047# Definitions to make life easier 1048config ARCH_ACORN 1049 bool 1050 1051config PLAT_IOP 1052 bool 1053 select GENERIC_CLOCKEVENTS 1054 select HAVE_SCHED_CLOCK 1055 1056config PLAT_ORION 1057 bool 1058 select CLKSRC_MMIO 1059 select GENERIC_IRQ_CHIP 1060 select HAVE_SCHED_CLOCK 1061 1062config PLAT_PXA 1063 bool 1064 1065config PLAT_VERSATILE 1066 bool 1067 1068config ARM_TIMER_SP804 1069 bool 1070 select CLKSRC_MMIO 1071 1072source arch/arm/mm/Kconfig 1073 1074config IWMMXT 1075 bool "Enable iWMMXt support" 1076 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 1077 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP 1078 help 1079 Enable support for iWMMXt context switching at run time if 1080 running on a CPU that supports it. 1081 1082# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER 1083config XSCALE_PMU 1084 bool 1085 depends on CPU_XSCALE && !XSCALE_PMU_TIMER 1086 default y 1087 1088config CPU_HAS_PMU 1089 depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \ 1090 (!ARCH_OMAP3 || OMAP3_EMU) 1091 default y 1092 bool 1093 1094config MULTI_IRQ_HANDLER 1095 bool 1096 help 1097 Allow each machine to specify it's own IRQ handler at run time. 1098 1099if !MMU 1100source "arch/arm/Kconfig-nommu" 1101endif 1102 1103config ARM_ERRATA_411920 1104 bool "ARM errata: Invalidation of the Instruction Cache operation can fail" 1105 depends on CPU_V6 || CPU_V6K 1106 help 1107 Invalidation of the Instruction Cache operation can 1108 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. 1109 It does not affect the MPCore. This option enables the ARM Ltd. 1110 recommended workaround. 1111 1112config ARM_ERRATA_430973 1113 bool "ARM errata: Stale prediction on replaced interworking branch" 1114 depends on CPU_V7 1115 help 1116 This option enables the workaround for the 430973 Cortex-A8 1117 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb 1118 interworking branch is replaced with another code sequence at the 1119 same virtual address, whether due to self-modifying code or virtual 1120 to physical address re-mapping, Cortex-A8 does not recover from the 1121 stale interworking branch prediction. This results in Cortex-A8 1122 executing the new code sequence in the incorrect ARM or Thumb state. 1123 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE 1124 and also flushes the branch target cache at every context switch. 1125 Note that setting specific bits in the ACTLR register may not be 1126 available in non-secure mode. 1127 1128config ARM_ERRATA_458693 1129 bool "ARM errata: Processor deadlock when a false hazard is created" 1130 depends on CPU_V7 1131 help 1132 This option enables the workaround for the 458693 Cortex-A8 (r2p0) 1133 erratum. For very specific sequences of memory operations, it is 1134 possible for a hazard condition intended for a cache line to instead 1135 be incorrectly associated with a different cache line. This false 1136 hazard might then cause a processor deadlock. The workaround enables 1137 the L1 caching of the NEON accesses and disables the PLD instruction 1138 in the ACTLR register. Note that setting specific bits in the ACTLR 1139 register may not be available in non-secure mode. 1140 1141config ARM_ERRATA_460075 1142 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" 1143 depends on CPU_V7 1144 help 1145 This option enables the workaround for the 460075 Cortex-A8 (r2p0) 1146 erratum. Any asynchronous access to the L2 cache may encounter a 1147 situation in which recent store transactions to the L2 cache are lost 1148 and overwritten with stale memory contents from external memory. The 1149 workaround disables the write-allocate mode for the L2 cache via the 1150 ACTLR register. Note that setting specific bits in the ACTLR register 1151 may not be available in non-secure mode. 1152 1153config ARM_ERRATA_742230 1154 bool "ARM errata: DMB operation may be faulty" 1155 depends on CPU_V7 && SMP 1156 help 1157 This option enables the workaround for the 742230 Cortex-A9 1158 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction 1159 between two write operations may not ensure the correct visibility 1160 ordering of the two writes. This workaround sets a specific bit in 1161 the diagnostic register of the Cortex-A9 which causes the DMB 1162 instruction to behave as a DSB, ensuring the correct behaviour of 1163 the two writes. 1164 1165config ARM_ERRATA_742231 1166 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" 1167 depends on CPU_V7 && SMP 1168 help 1169 This option enables the workaround for the 742231 Cortex-A9 1170 (r2p0..r2p2) erratum. Under certain conditions, specific to the 1171 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, 1172 accessing some data located in the same cache line, may get corrupted 1173 data due to bad handling of the address hazard when the line gets 1174 replaced from one of the CPUs at the same time as another CPU is 1175 accessing it. This workaround sets specific bits in the diagnostic 1176 register of the Cortex-A9 which reduces the linefill issuing 1177 capabilities of the processor. 1178 1179config PL310_ERRATA_588369 1180 bool "Clean & Invalidate maintenance operations do not invalidate clean lines" 1181 depends on CACHE_L2X0 1182 help 1183 The PL310 L2 cache controller implements three types of Clean & 1184 Invalidate maintenance operations: by Physical Address 1185 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). 1186 They are architecturally defined to behave as the execution of a 1187 clean operation followed immediately by an invalidate operation, 1188 both performing to the same memory location. This functionality 1189 is not correctly implemented in PL310 as clean lines are not 1190 invalidated as a result of these operations. 1191 1192config ARM_ERRATA_720789 1193 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" 1194 depends on CPU_V7 && SMP 1195 help 1196 This option enables the workaround for the 720789 Cortex-A9 (prior to 1197 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the 1198 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. 1199 As a consequence of this erratum, some TLB entries which should be 1200 invalidated are not, resulting in an incoherency in the system page 1201 tables. The workaround changes the TLB flushing routines to invalidate 1202 entries regardless of the ASID. 1203 1204config PL310_ERRATA_727915 1205 bool "Background Clean & Invalidate by Way operation can cause data corruption" 1206 depends on CACHE_L2X0 1207 help 1208 PL310 implements the Clean & Invalidate by Way L2 cache maintenance 1209 operation (offset 0x7FC). This operation runs in background so that 1210 PL310 can handle normal accesses while it is in progress. Under very 1211 rare circumstances, due to this erratum, write data can be lost when 1212 PL310 treats a cacheable write transaction during a Clean & 1213 Invalidate by Way operation. 1214 1215config ARM_ERRATA_743622 1216 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" 1217 depends on CPU_V7 1218 help 1219 This option enables the workaround for the 743622 Cortex-A9 1220 (r2p0..r2p2) erratum. Under very rare conditions, a faulty 1221 optimisation in the Cortex-A9 Store Buffer may lead to data 1222 corruption. This workaround sets a specific bit in the diagnostic 1223 register of the Cortex-A9 which disables the Store Buffer 1224 optimisation, preventing the defect from occurring. This has no 1225 visible impact on the overall performance or power consumption of the 1226 processor. 1227 1228config ARM_ERRATA_751472 1229 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" 1230 depends on CPU_V7 && SMP 1231 help 1232 This option enables the workaround for the 751472 Cortex-A9 (prior 1233 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the 1234 completion of a following broadcasted operation if the second 1235 operation is received by a CPU before the ICIALLUIS has completed, 1236 potentially leading to corrupted entries in the cache or TLB. 1237 1238config ARM_ERRATA_753970 1239 bool "ARM errata: cache sync operation may be faulty" 1240 depends on CACHE_PL310 1241 help 1242 This option enables the workaround for the 753970 PL310 (r3p0) erratum. 1243 1244 Under some condition the effect of cache sync operation on 1245 the store buffer still remains when the operation completes. 1246 This means that the store buffer is always asked to drain and 1247 this prevents it from merging any further writes. The workaround 1248 is to replace the normal offset of cache sync operation (0x730) 1249 by another offset targeting an unmapped PL310 register 0x740. 1250 This has the same effect as the cache sync operation: store buffer 1251 drain and waiting for all buffers empty. 1252 1253config ARM_ERRATA_754322 1254 bool "ARM errata: possible faulty MMU translations following an ASID switch" 1255 depends on CPU_V7 1256 help 1257 This option enables the workaround for the 754322 Cortex-A9 (r2p*, 1258 r3p*) erratum. A speculative memory access may cause a page table walk 1259 which starts prior to an ASID switch but completes afterwards. This 1260 can populate the micro-TLB with a stale entry which may be hit with 1261 the new ASID. This workaround places two dsb instructions in the mm 1262 switching code so that no page table walks can cross the ASID switch. 1263 1264config ARM_ERRATA_754327 1265 bool "ARM errata: no automatic Store Buffer drain" 1266 depends on CPU_V7 && SMP 1267 help 1268 This option enables the workaround for the 754327 Cortex-A9 (prior to 1269 r2p0) erratum. The Store Buffer does not have any automatic draining 1270 mechanism and therefore a livelock may occur if an external agent 1271 continuously polls a memory location waiting to observe an update. 1272 This workaround defines cpu_relax() as smp_mb(), preventing correctly 1273 written polling loops from denying visibility of updates to memory. 1274 1275endmenu 1276 1277source "arch/arm/common/Kconfig" 1278 1279menu "Bus support" 1280 1281config ARM_AMBA 1282 bool 1283 1284config ISA 1285 bool 1286 help 1287 Find out whether you have ISA slots on your motherboard. ISA is the 1288 name of a bus system, i.e. the way the CPU talks to the other stuff 1289 inside your box. Other bus systems are PCI, EISA, MicroChannel 1290 (MCA) or VESA. ISA is an older system, now being displaced by PCI; 1291 newer boards don't support it. If you have ISA, say Y, otherwise N. 1292 1293# Select ISA DMA controller support 1294config ISA_DMA 1295 bool 1296 select ISA_DMA_API 1297 1298# Select ISA DMA interface 1299config ISA_DMA_API 1300 bool 1301 1302config PCI 1303 bool "PCI support" if MIGHT_HAVE_PCI 1304 help 1305 Find out whether you have a PCI motherboard. PCI is the name of a 1306 bus system, i.e. the way the CPU talks to the other stuff inside 1307 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or 1308 VESA. If you have PCI, say Y, otherwise N. 1309 1310config PCI_DOMAINS 1311 bool 1312 depends on PCI 1313 1314config PCI_NANOENGINE 1315 bool "BSE nanoEngine PCI support" 1316 depends on SA1100_NANOENGINE 1317 help 1318 Enable PCI on the BSE nanoEngine board. 1319 1320config PCI_SYSCALL 1321 def_bool PCI 1322 1323# Select the host bridge type 1324config PCI_HOST_VIA82C505 1325 bool 1326 depends on PCI && ARCH_SHARK 1327 default y 1328 1329config PCI_HOST_ITE8152 1330 bool 1331 depends on PCI && MACH_ARMCORE 1332 default y 1333 select DMABOUNCE 1334 1335source "drivers/pci/Kconfig" 1336 1337source "drivers/pcmcia/Kconfig" 1338 1339endmenu 1340 1341menu "Kernel Features" 1342 1343source "kernel/time/Kconfig" 1344 1345config SMP 1346 bool "Symmetric Multi-Processing" 1347 depends on CPU_V6K || CPU_V7 1348 depends on GENERIC_CLOCKEVENTS 1349 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ 1350 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ 1351 ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ 1352 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE 1353 select USE_GENERIC_SMP_HELPERS 1354 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP 1355 help 1356 This enables support for systems with more than one CPU. If you have 1357 a system with only one CPU, like most personal computers, say N. If 1358 you have a system with more than one CPU, say Y. 1359 1360 If you say N here, the kernel will run on single and multiprocessor 1361 machines, but will use only one CPU of a multiprocessor machine. If 1362 you say Y here, the kernel will run on many, but not all, single 1363 processor machines. On a single processor machine, the kernel will 1364 run faster if you say N here. 1365 1366 See also <file:Documentation/i386/IO-APIC.txt>, 1367 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at 1368 <http://tldp.org/HOWTO/SMP-HOWTO.html>. 1369 1370 If you don't know what to do here, say N. 1371 1372config SMP_ON_UP 1373 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" 1374 depends on EXPERIMENTAL 1375 depends on SMP && !XIP_KERNEL 1376 default y 1377 help 1378 SMP kernels contain instructions which fail on non-SMP processors. 1379 Enabling this option allows the kernel to modify itself to make 1380 these instructions safe. Disabling it allows about 1K of space 1381 savings. 1382 1383 If you don't know what to do here, say Y. 1384 1385config HAVE_ARM_SCU 1386 bool 1387 help 1388 This option enables support for the ARM system coherency unit 1389 1390config HAVE_ARM_TWD 1391 bool 1392 depends on SMP 1393 select TICK_ONESHOT 1394 help 1395 This options enables support for the ARM timer and watchdog unit 1396 1397choice 1398 prompt "Memory split" 1399 default VMSPLIT_3G 1400 help 1401 Select the desired split between kernel and user memory. 1402 1403 If you are not absolutely sure what you are doing, leave this 1404 option alone! 1405 1406 config VMSPLIT_3G 1407 bool "3G/1G user/kernel split" 1408 config VMSPLIT_2G 1409 bool "2G/2G user/kernel split" 1410 config VMSPLIT_1G 1411 bool "1G/3G user/kernel split" 1412endchoice 1413 1414config PAGE_OFFSET 1415 hex 1416 default 0x40000000 if VMSPLIT_1G 1417 default 0x80000000 if VMSPLIT_2G 1418 default 0xC0000000 1419 1420config NR_CPUS 1421 int "Maximum number of CPUs (2-32)" 1422 range 2 32 1423 depends on SMP 1424 default "4" 1425 1426config HOTPLUG_CPU 1427 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" 1428 depends on SMP && HOTPLUG && EXPERIMENTAL 1429 help 1430 Say Y here to experiment with turning CPUs off and on. CPUs 1431 can be controlled through /sys/devices/system/cpu. 1432 1433config LOCAL_TIMERS 1434 bool "Use local timer interrupts" 1435 depends on SMP 1436 default y 1437 select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT) 1438 help 1439 Enable support for local timers on SMP platforms, rather then the 1440 legacy IPI broadcast method. Local timers allows the system 1441 accounting to be spread across the timer interval, preventing a 1442 "thundering herd" at every timer tick. 1443 1444source kernel/Kconfig.preempt 1445 1446config HZ 1447 int 1448 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ 1449 ARCH_S5PV210 || ARCH_EXYNOS4 1450 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER 1451 default AT91_TIMER_HZ if ARCH_AT91 1452 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE 1453 default 100 1454 1455config THUMB2_KERNEL 1456 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" 1457 depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL 1458 select AEABI 1459 select ARM_ASM_UNIFIED 1460 help 1461 By enabling this option, the kernel will be compiled in 1462 Thumb-2 mode. A compiler/assembler that understand the unified 1463 ARM-Thumb syntax is needed. 1464 1465 If unsure, say N. 1466 1467config THUMB2_AVOID_R_ARM_THM_JUMP11 1468 bool "Work around buggy Thumb-2 short branch relocations in gas" 1469 depends on THUMB2_KERNEL && MODULES 1470 default y 1471 help 1472 Various binutils versions can resolve Thumb-2 branches to 1473 locally-defined, preemptible global symbols as short-range "b.n" 1474 branch instructions. 1475 1476 This is a problem, because there's no guarantee the final 1477 destination of the symbol, or any candidate locations for a 1478 trampoline, are within range of the branch. For this reason, the 1479 kernel does not support fixing up the R_ARM_THM_JUMP11 (102) 1480 relocation in modules at all, and it makes little sense to add 1481 support. 1482 1483 The symptom is that the kernel fails with an "unsupported 1484 relocation" error when loading some modules. 1485 1486 Until fixed tools are available, passing 1487 -fno-optimize-sibling-calls to gcc should prevent gcc generating 1488 code which hits this problem, at the cost of a bit of extra runtime 1489 stack usage in some cases. 1490 1491 The problem is described in more detail at: 1492 https://bugs.launchpad.net/binutils-linaro/+bug/725126 1493 1494 Only Thumb-2 kernels are affected. 1495 1496 Unless you are sure your tools don't have this problem, say Y. 1497 1498config ARM_ASM_UNIFIED 1499 bool 1500 1501config AEABI 1502 bool "Use the ARM EABI to compile the kernel" 1503 help 1504 This option allows for the kernel to be compiled using the latest 1505 ARM ABI (aka EABI). This is only useful if you are using a user 1506 space environment that is also compiled with EABI. 1507 1508 Since there are major incompatibilities between the legacy ABI and 1509 EABI, especially with regard to structure member alignment, this 1510 option also changes the kernel syscall calling convention to 1511 disambiguate both ABIs and allow for backward compatibility support 1512 (selected with CONFIG_OABI_COMPAT). 1513 1514 To use this you need GCC version 4.0.0 or later. 1515 1516config OABI_COMPAT 1517 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" 1518 depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL 1519 default y 1520 help 1521 This option preserves the old syscall interface along with the 1522 new (ARM EABI) one. It also provides a compatibility layer to 1523 intercept syscalls that have structure arguments which layout 1524 in memory differs between the legacy ABI and the new ARM EABI 1525 (only for non "thumb" binaries). This option adds a tiny 1526 overhead to all syscalls and produces a slightly larger kernel. 1527 If you know you'll be using only pure EABI user space then you 1528 can say N here. If this option is not selected and you attempt 1529 to execute a legacy ABI binary then the result will be 1530 UNPREDICTABLE (in fact it can be predicted that it won't work 1531 at all). If in doubt say Y. 1532 1533config ARCH_HAS_HOLES_MEMORYMODEL 1534 bool 1535 1536config ARCH_SPARSEMEM_ENABLE 1537 bool 1538 1539config ARCH_SPARSEMEM_DEFAULT 1540 def_bool ARCH_SPARSEMEM_ENABLE 1541 1542config ARCH_SELECT_MEMORY_MODEL 1543 def_bool ARCH_SPARSEMEM_ENABLE 1544 1545config HAVE_ARCH_PFN_VALID 1546 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM 1547 1548config HIGHMEM 1549 bool "High Memory Support" 1550 depends on MMU 1551 help 1552 The address space of ARM processors is only 4 Gigabytes large 1553 and it has to accommodate user address space, kernel address 1554 space as well as some memory mapped IO. That means that, if you 1555 have a large amount of physical memory and/or IO, not all of the 1556 memory can be "permanently mapped" by the kernel. The physical 1557 memory that is not permanently mapped is called "high memory". 1558 1559 Depending on the selected kernel/user memory split, minimum 1560 vmalloc space and actual amount of RAM, you may not need this 1561 option which should result in a slightly faster kernel. 1562 1563 If unsure, say n. 1564 1565config HIGHPTE 1566 bool "Allocate 2nd-level pagetables from highmem" 1567 depends on HIGHMEM 1568 1569config HW_PERF_EVENTS 1570 bool "Enable hardware performance counter support for perf events" 1571 depends on PERF_EVENTS && CPU_HAS_PMU 1572 default y 1573 help 1574 Enable hardware performance counter support for perf events. If 1575 disabled, perf events will use software events only. 1576 1577source "mm/Kconfig" 1578 1579config FORCE_MAX_ZONEORDER 1580 int "Maximum zone order" if ARCH_SHMOBILE 1581 range 11 64 if ARCH_SHMOBILE 1582 default "9" if SA1111 1583 default "11" 1584 help 1585 The kernel memory allocator divides physically contiguous memory 1586 blocks into "zones", where each zone is a power of two number of 1587 pages. This option selects the largest power of two that the kernel 1588 keeps in the memory allocator. If you need to allocate very large 1589 blocks of physically contiguous memory, then you may need to 1590 increase this value. 1591 1592 This config option is actually maximum order plus one. For example, 1593 a value of 11 means that the largest free memory block is 2^10 pages. 1594 1595config LEDS 1596 bool "Timer and CPU usage LEDs" 1597 depends on ARCH_CDB89712 || ARCH_EBSA110 || \ 1598 ARCH_EBSA285 || ARCH_INTEGRATOR || \ 1599 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ 1600 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ 1601 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ 1602 ARCH_AT91 || ARCH_DAVINCI || \ 1603 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW 1604 help 1605 If you say Y here, the LEDs on your machine will be used 1606 to provide useful information about your current system status. 1607 1608 If you are compiling a kernel for a NetWinder or EBSA-285, you will 1609 be able to select which LEDs are active using the options below. If 1610 you are compiling a kernel for the EBSA-110 or the LART however, the 1611 red LED will simply flash regularly to indicate that the system is 1612 still functional. It is safe to say Y here if you have a CATS 1613 system, but the driver will do nothing. 1614 1615config LEDS_TIMER 1616 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ 1617 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ 1618 || MACH_OMAP_PERSEUS2 1619 depends on LEDS 1620 depends on !GENERIC_CLOCKEVENTS 1621 default y if ARCH_EBSA110 1622 help 1623 If you say Y here, one of the system LEDs (the green one on the 1624 NetWinder, the amber one on the EBSA285, or the red one on the LART) 1625 will flash regularly to indicate that the system is still 1626 operational. This is mainly useful to kernel hackers who are 1627 debugging unstable kernels. 1628 1629 The LART uses the same LED for both Timer LED and CPU usage LED 1630 functions. You may choose to use both, but the Timer LED function 1631 will overrule the CPU usage LED. 1632 1633config LEDS_CPU 1634 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ 1635 !ARCH_OMAP) \ 1636 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ 1637 || MACH_OMAP_PERSEUS2 1638 depends on LEDS 1639 help 1640 If you say Y here, the red LED will be used to give a good real 1641 time indication of CPU usage, by lighting whenever the idle task 1642 is not currently executing. 1643 1644 The LART uses the same LED for both Timer LED and CPU usage LED 1645 functions. You may choose to use both, but the Timer LED function 1646 will overrule the CPU usage LED. 1647 1648config ALIGNMENT_TRAP 1649 bool 1650 depends on CPU_CP15_MMU 1651 default y if !ARCH_EBSA110 1652 select HAVE_PROC_CPU if PROC_FS 1653 help 1654 ARM processors cannot fetch/store information which is not 1655 naturally aligned on the bus, i.e., a 4 byte fetch must start at an 1656 address divisible by 4. On 32-bit ARM processors, these non-aligned 1657 fetch/store instructions will be emulated in software if you say 1658 here, which has a severe performance impact. This is necessary for 1659 correct operation of some network protocols. With an IP-only 1660 configuration it is safe to say N, otherwise say Y. 1661 1662config UACCESS_WITH_MEMCPY 1663 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" 1664 depends on MMU && EXPERIMENTAL 1665 default y if CPU_FEROCEON 1666 help 1667 Implement faster copy_to_user and clear_user methods for CPU 1668 cores where a 8-word STM instruction give significantly higher 1669 memory write throughput than a sequence of individual 32bit stores. 1670 1671 A possible side effect is a slight increase in scheduling latency 1672 between threads sharing the same address space if they invoke 1673 such copy operations with large buffers. 1674 1675 However, if the CPU data cache is using a write-allocate mode, 1676 this option is unlikely to provide any performance gain. 1677 1678config SECCOMP 1679 bool 1680 prompt "Enable seccomp to safely compute untrusted bytecode" 1681 ---help--- 1682 This kernel feature is useful for number crunching applications 1683 that may need to compute untrusted bytecode during their 1684 execution. By using pipes or other transports made available to 1685 the process as file descriptors supporting the read/write 1686 syscalls, it's possible to isolate those applications in 1687 their own address space using seccomp. Once seccomp is 1688 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled 1689 and the task is only allowed to execute a few safe syscalls 1690 defined by each seccomp mode. 1691 1692config CC_STACKPROTECTOR 1693 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" 1694 depends on EXPERIMENTAL 1695 help 1696 This option turns on the -fstack-protector GCC feature. This 1697 feature puts, at the beginning of functions, a canary value on 1698 the stack just before the return address, and validates 1699 the value just before actually returning. Stack based buffer 1700 overflows (that need to overwrite this return address) now also 1701 overwrite the canary, which gets detected and the attack is then 1702 neutralized via a kernel panic. 1703 This feature requires gcc version 4.2 or above. 1704 1705config DEPRECATED_PARAM_STRUCT 1706 bool "Provide old way to pass kernel parameters" 1707 help 1708 This was deprecated in 2001 and announced to live on for 5 years. 1709 Some old boot loaders still use this way. 1710 1711endmenu 1712 1713menu "Boot options" 1714 1715config USE_OF 1716 bool "Flattened Device Tree support" 1717 select OF 1718 select OF_EARLY_FLATTREE 1719 select IRQ_DOMAIN 1720 help 1721 Include support for flattened device tree machine descriptions. 1722 1723# Compressed boot loader in ROM. Yes, we really want to ask about 1724# TEXT and BSS so we preserve their values in the config files. 1725config ZBOOT_ROM_TEXT 1726 hex "Compressed ROM boot loader base address" 1727 default "0" 1728 help 1729 The physical address at which the ROM-able zImage is to be 1730 placed in the target. Platforms which normally make use of 1731 ROM-able zImage formats normally set this to a suitable 1732 value in their defconfig file. 1733 1734 If ZBOOT_ROM is not enabled, this has no effect. 1735 1736config ZBOOT_ROM_BSS 1737 hex "Compressed ROM boot loader BSS address" 1738 default "0" 1739 help 1740 The base address of an area of read/write memory in the target 1741 for the ROM-able zImage which must be available while the 1742 decompressor is running. It must be large enough to hold the 1743 entire decompressed kernel plus an additional 128 KiB. 1744 Platforms which normally make use of ROM-able zImage formats 1745 normally set this to a suitable value in their defconfig file. 1746 1747 If ZBOOT_ROM is not enabled, this has no effect. 1748 1749config ZBOOT_ROM 1750 bool "Compressed boot loader in ROM/flash" 1751 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS 1752 help 1753 Say Y here if you intend to execute your compressed kernel image 1754 (zImage) directly from ROM or flash. If unsure, say N. 1755 1756choice 1757 prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)" 1758 depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL 1759 default ZBOOT_ROM_NONE 1760 help 1761 Include experimental SD/MMC loading code in the ROM-able zImage. 1762 With this enabled it is possible to write the the ROM-able zImage 1763 kernel image to an MMC or SD card and boot the kernel straight 1764 from the reset vector. At reset the processor Mask ROM will load 1765 the first part of the the ROM-able zImage which in turn loads the 1766 rest the kernel image to RAM. 1767 1768config ZBOOT_ROM_NONE 1769 bool "No SD/MMC loader in zImage (EXPERIMENTAL)" 1770 help 1771 Do not load image from SD or MMC 1772 1773config ZBOOT_ROM_MMCIF 1774 bool "Include MMCIF loader in zImage (EXPERIMENTAL)" 1775 help 1776 Load image from MMCIF hardware block. 1777 1778config ZBOOT_ROM_SH_MOBILE_SDHI 1779 bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)" 1780 help 1781 Load image from SDHI hardware block 1782 1783endchoice 1784 1785config CMDLINE 1786 string "Default kernel command string" 1787 default "" 1788 help 1789 On some architectures (EBSA110 and CATS), there is currently no way 1790 for the boot loader to pass arguments to the kernel. For these 1791 architectures, you should supply some command-line options at build 1792 time by entering them here. As a minimum, you should specify the 1793 memory size and the root device (e.g., mem=64M root=/dev/nfs). 1794 1795choice 1796 prompt "Kernel command line type" if CMDLINE != "" 1797 default CMDLINE_FROM_BOOTLOADER 1798 1799config CMDLINE_FROM_BOOTLOADER 1800 bool "Use bootloader kernel arguments if available" 1801 help 1802 Uses the command-line options passed by the boot loader. If 1803 the boot loader doesn't provide any, the default kernel command 1804 string provided in CMDLINE will be used. 1805 1806config CMDLINE_EXTEND 1807 bool "Extend bootloader kernel arguments" 1808 help 1809 The command-line arguments provided by the boot loader will be 1810 appended to the default kernel command string. 1811 1812config CMDLINE_FORCE 1813 bool "Always use the default kernel command string" 1814 help 1815 Always use the default kernel command string, even if the boot 1816 loader passes other arguments to the kernel. 1817 This is useful if you cannot or don't want to change the 1818 command-line options your boot loader passes to the kernel. 1819endchoice 1820 1821config XIP_KERNEL 1822 bool "Kernel Execute-In-Place from ROM" 1823 depends on !ZBOOT_ROM 1824 help 1825 Execute-In-Place allows the kernel to run from non-volatile storage 1826 directly addressable by the CPU, such as NOR flash. This saves RAM 1827 space since the text section of the kernel is not loaded from flash 1828 to RAM. Read-write sections, such as the data section and stack, 1829 are still copied to RAM. The XIP kernel is not compressed since 1830 it has to run directly from flash, so it will take more space to 1831 store it. The flash address used to link the kernel object files, 1832 and for storing it, is configuration dependent. Therefore, if you 1833 say Y here, you must know the proper physical address where to 1834 store the kernel image depending on your own flash memory usage. 1835 1836 Also note that the make target becomes "make xipImage" rather than 1837 "make zImage" or "make Image". The final kernel binary to put in 1838 ROM memory will be arch/arm/boot/xipImage. 1839 1840 If unsure, say N. 1841 1842config XIP_PHYS_ADDR 1843 hex "XIP Kernel Physical Location" 1844 depends on XIP_KERNEL 1845 default "0x00080000" 1846 help 1847 This is the physical address in your flash memory the kernel will 1848 be linked for and stored to. This address is dependent on your 1849 own flash usage. 1850 1851config KEXEC 1852 bool "Kexec system call (EXPERIMENTAL)" 1853 depends on EXPERIMENTAL 1854 help 1855 kexec is a system call that implements the ability to shutdown your 1856 current kernel, and to start another kernel. It is like a reboot 1857 but it is independent of the system firmware. And like a reboot 1858 you can start any kernel with it, not just Linux. 1859 1860 It is an ongoing process to be certain the hardware in a machine 1861 is properly shutdown, so do not be surprised if this code does not 1862 initially work for you. It may help to enable device hotplugging 1863 support. 1864 1865config ATAGS_PROC 1866 bool "Export atags in procfs" 1867 depends on KEXEC 1868 default y 1869 help 1870 Should the atags used to boot the kernel be exported in an "atags" 1871 file in procfs. Useful with kexec. 1872 1873config CRASH_DUMP 1874 bool "Build kdump crash kernel (EXPERIMENTAL)" 1875 depends on EXPERIMENTAL 1876 help 1877 Generate crash dump after being started by kexec. This should 1878 be normally only set in special crash dump kernels which are 1879 loaded in the main kernel with kexec-tools into a specially 1880 reserved region and then later executed after a crash by 1881 kdump/kexec. The crash dump kernel must be compiled to a 1882 memory address not used by the main kernel 1883 1884 For more details see Documentation/kdump/kdump.txt 1885 1886config AUTO_ZRELADDR 1887 bool "Auto calculation of the decompressed kernel image address" 1888 depends on !ZBOOT_ROM && !ARCH_U300 1889 help 1890 ZRELADDR is the physical address where the decompressed kernel 1891 image will be placed. If AUTO_ZRELADDR is selected, the address 1892 will be determined at run-time by masking the current IP with 1893 0xf8000000. This assumes the zImage being placed in the first 128MB 1894 from start of memory. 1895 1896endmenu 1897 1898menu "CPU Power Management" 1899 1900if ARCH_HAS_CPUFREQ 1901 1902source "drivers/cpufreq/Kconfig" 1903 1904config CPU_FREQ_IMX 1905 tristate "CPUfreq driver for i.MX CPUs" 1906 depends on ARCH_MXC && CPU_FREQ 1907 help 1908 This enables the CPUfreq driver for i.MX CPUs. 1909 1910config CPU_FREQ_SA1100 1911 bool 1912 1913config CPU_FREQ_SA1110 1914 bool 1915 1916config CPU_FREQ_INTEGRATOR 1917 tristate "CPUfreq driver for ARM Integrator CPUs" 1918 depends on ARCH_INTEGRATOR && CPU_FREQ 1919 default y 1920 help 1921 This enables the CPUfreq driver for ARM Integrator CPUs. 1922 1923 For details, take a look at <file:Documentation/cpu-freq>. 1924 1925 If in doubt, say Y. 1926 1927config CPU_FREQ_PXA 1928 bool 1929 depends on CPU_FREQ && ARCH_PXA && PXA25x 1930 default y 1931 select CPU_FREQ_DEFAULT_GOV_USERSPACE 1932 1933config CPU_FREQ_S3C 1934 bool 1935 help 1936 Internal configuration node for common cpufreq on Samsung SoC 1937 1938config CPU_FREQ_S3C24XX 1939 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" 1940 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL 1941 select CPU_FREQ_S3C 1942 help 1943 This enables the CPUfreq driver for the Samsung S3C24XX family 1944 of CPUs. 1945 1946 For details, take a look at <file:Documentation/cpu-freq>. 1947 1948 If in doubt, say N. 1949 1950config CPU_FREQ_S3C24XX_PLL 1951 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" 1952 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL 1953 help 1954 Compile in support for changing the PLL frequency from the 1955 S3C24XX series CPUfreq driver. The PLL takes time to settle 1956 after a frequency change, so by default it is not enabled. 1957 1958 This also means that the PLL tables for the selected CPU(s) will 1959 be built which may increase the size of the kernel image. 1960 1961config CPU_FREQ_S3C24XX_DEBUG 1962 bool "Debug CPUfreq Samsung driver core" 1963 depends on CPU_FREQ_S3C24XX 1964 help 1965 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core 1966 1967config CPU_FREQ_S3C24XX_IODEBUG 1968 bool "Debug CPUfreq Samsung driver IO timing" 1969 depends on CPU_FREQ_S3C24XX 1970 help 1971 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core 1972 1973config CPU_FREQ_S3C24XX_DEBUGFS 1974 bool "Export debugfs for CPUFreq" 1975 depends on CPU_FREQ_S3C24XX && DEBUG_FS 1976 help 1977 Export status information via debugfs. 1978 1979endif 1980 1981source "drivers/cpuidle/Kconfig" 1982 1983endmenu 1984 1985menu "Floating point emulation" 1986 1987comment "At least one emulation must be selected" 1988 1989config FPE_NWFPE 1990 bool "NWFPE math emulation" 1991 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL 1992 ---help--- 1993 Say Y to include the NWFPE floating point emulator in the kernel. 1994 This is necessary to run most binaries. Linux does not currently 1995 support floating point hardware so you need to say Y here even if 1996 your machine has an FPA or floating point co-processor podule. 1997 1998 You may say N here if you are going to load the Acorn FPEmulator 1999 early in the bootup. 2000 2001config FPE_NWFPE_XP 2002 bool "Support extended precision" 2003 depends on FPE_NWFPE 2004 help 2005 Say Y to include 80-bit support in the kernel floating-point 2006 emulator. Otherwise, only 32 and 64-bit support is compiled in. 2007 Note that gcc does not generate 80-bit operations by default, 2008 so in most cases this option only enlarges the size of the 2009 floating point emulator without any good reason. 2010 2011 You almost surely want to say N here. 2012 2013config FPE_FASTFPE 2014 bool "FastFPE math emulation (EXPERIMENTAL)" 2015 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL 2016 ---help--- 2017 Say Y here to include the FAST floating point emulator in the kernel. 2018 This is an experimental much faster emulator which now also has full 2019 precision for the mantissa. It does not support any exceptions. 2020 It is very simple, and approximately 3-6 times faster than NWFPE. 2021 2022 It should be sufficient for most programs. It may be not suitable 2023 for scientific calculations, but you have to check this for yourself. 2024 If you do not feel you need a faster FP emulation you should better 2025 choose NWFPE. 2026 2027config VFP 2028 bool "VFP-format floating point maths" 2029 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON 2030 help 2031 Say Y to include VFP support code in the kernel. This is needed 2032 if your hardware includes a VFP unit. 2033 2034 Please see <file:Documentation/arm/VFP/release-notes.txt> for 2035 release notes and additional status information. 2036 2037 Say N if your target does not have VFP hardware. 2038 2039config VFPv3 2040 bool 2041 depends on VFP 2042 default y if CPU_V7 2043 2044config NEON 2045 bool "Advanced SIMD (NEON) Extension support" 2046 depends on VFPv3 && CPU_V7 2047 help 2048 Say Y to include support code for NEON, the ARMv7 Advanced SIMD 2049 Extension. 2050 2051endmenu 2052 2053menu "Userspace binary formats" 2054 2055source "fs/Kconfig.binfmt" 2056 2057config ARTHUR 2058 tristate "RISC OS personality" 2059 depends on !AEABI 2060 help 2061 Say Y here to include the kernel code necessary if you want to run 2062 Acorn RISC OS/Arthur binaries under Linux. This code is still very 2063 experimental; if this sounds frightening, say N and sleep in peace. 2064 You can also say M here to compile this support as a module (which 2065 will be called arthur). 2066 2067endmenu 2068 2069menu "Power management options" 2070 2071source "kernel/power/Kconfig" 2072 2073config ARCH_SUSPEND_POSSIBLE 2074 depends on !ARCH_S5P64X0 && !ARCH_S5PC100 2075 depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \ 2076 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE 2077 def_bool y 2078 2079endmenu 2080 2081source "net/Kconfig" 2082 2083source "drivers/Kconfig" 2084 2085source "fs/Kconfig" 2086 2087source "arch/arm/Kconfig.debug" 2088 2089source "security/Kconfig" 2090 2091source "crypto/Kconfig" 2092 2093source "lib/Kconfig" 2094