1config ARM 2 bool 3 default y 4 select HAVE_AOUT 5 select HAVE_DMA_API_DEBUG 6 select HAVE_IDE 7 select HAVE_MEMBLOCK 8 select RTC_LIB 9 select SYS_SUPPORTS_APM_EMULATION 10 select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI) 11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS) 12 select HAVE_ARCH_KGDB 13 select HAVE_KPROBES if !XIP_KERNEL 14 select HAVE_KRETPROBES if (HAVE_KPROBES) 15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) 16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) 17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) 18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) 19 select HAVE_GENERIC_DMA_COHERENT 20 select HAVE_KERNEL_GZIP 21 select HAVE_KERNEL_LZO 22 select HAVE_KERNEL_LZMA 23 select HAVE_IRQ_WORK 24 select HAVE_PERF_EVENTS 25 select PERF_USE_VMALLOC 26 select HAVE_REGS_AND_STACK_ACCESS_API 27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)) 28 select HAVE_C_RECORDMCOUNT 29 select HAVE_GENERIC_HARDIRQS 30 select HAVE_SPARSE_IRQ 31 select GENERIC_IRQ_SHOW 32 help 33 The ARM series is a line of low-power-consumption RISC chip designs 34 licensed by ARM Ltd and targeted at embedded applications and 35 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer 36 manufactured, but legacy ARM-based PC hardware remains popular in 37 Europe. There is an ARM Linux project with a web page at 38 <http://www.arm.linux.org.uk/>. 39 40config ARM_HAS_SG_CHAIN 41 bool 42 43config HAVE_PWM 44 bool 45 46config MIGHT_HAVE_PCI 47 bool 48 49config SYS_SUPPORTS_APM_EMULATION 50 bool 51 52config HAVE_SCHED_CLOCK 53 bool 54 55config GENERIC_GPIO 56 bool 57 58config ARCH_USES_GETTIMEOFFSET 59 bool 60 default n 61 62config GENERIC_CLOCKEVENTS 63 bool 64 65config GENERIC_CLOCKEVENTS_BROADCAST 66 bool 67 depends on GENERIC_CLOCKEVENTS 68 default y if SMP 69 70config KTIME_SCALAR 71 bool 72 default y 73 74config HAVE_TCM 75 bool 76 select GENERIC_ALLOCATOR 77 78config HAVE_PROC_CPU 79 bool 80 81config NO_IOPORT 82 bool 83 84config EISA 85 bool 86 ---help--- 87 The Extended Industry Standard Architecture (EISA) bus was 88 developed as an open alternative to the IBM MicroChannel bus. 89 90 The EISA bus provided some of the features of the IBM MicroChannel 91 bus while maintaining backward compatibility with cards made for 92 the older ISA bus. The EISA bus saw limited use between 1988 and 93 1995 when it was made obsolete by the PCI bus. 94 95 Say Y here if you are building a kernel for an EISA-based machine. 96 97 Otherwise, say N. 98 99config SBUS 100 bool 101 102config MCA 103 bool 104 help 105 MicroChannel Architecture is found in some IBM PS/2 machines and 106 laptops. It is a bus system similar to PCI or ISA. See 107 <file:Documentation/mca.txt> (and especially the web page given 108 there) before attempting to build an MCA bus kernel. 109 110config STACKTRACE_SUPPORT 111 bool 112 default y 113 114config HAVE_LATENCYTOP_SUPPORT 115 bool 116 depends on !SMP 117 default y 118 119config LOCKDEP_SUPPORT 120 bool 121 default y 122 123config TRACE_IRQFLAGS_SUPPORT 124 bool 125 default y 126 127config HARDIRQS_SW_RESEND 128 bool 129 default y 130 131config GENERIC_IRQ_PROBE 132 bool 133 default y 134 135config GENERIC_LOCKBREAK 136 bool 137 default y 138 depends on SMP && PREEMPT 139 140config RWSEM_GENERIC_SPINLOCK 141 bool 142 default y 143 144config RWSEM_XCHGADD_ALGORITHM 145 bool 146 147config ARCH_HAS_ILOG2_U32 148 bool 149 150config ARCH_HAS_ILOG2_U64 151 bool 152 153config ARCH_HAS_CPUFREQ 154 bool 155 help 156 Internal node to signify that the ARCH has CPUFREQ support 157 and that the relevant menu configurations are displayed for 158 it. 159 160config ARCH_HAS_CPU_IDLE_WAIT 161 def_bool y 162 163config GENERIC_HWEIGHT 164 bool 165 default y 166 167config GENERIC_CALIBRATE_DELAY 168 bool 169 default y 170 171config ARCH_MAY_HAVE_PC_FDC 172 bool 173 174config ZONE_DMA 175 bool 176 177config NEED_DMA_MAP_STATE 178 def_bool y 179 180config GENERIC_ISA_DMA 181 bool 182 183config FIQ 184 bool 185 186config ARCH_MTD_XIP 187 bool 188 189config VECTORS_BASE 190 hex 191 default 0xffff0000 if MMU || CPU_HIGH_VECTOR 192 default DRAM_BASE if REMAP_VECTORS_TO_RAM 193 default 0x00000000 194 help 195 The base address of exception vectors. 196 197config ARM_PATCH_PHYS_VIRT 198 bool "Patch physical to virtual translations at runtime" 199 depends on !XIP_KERNEL && MMU 200 depends on !ARCH_REALVIEW || !SPARSEMEM 201 help 202 Patch phys-to-virt and virt-to-phys translation functions at 203 boot and module load time according to the position of the 204 kernel in system memory. 205 206 This can only be used with non-XIP MMU kernels where the base 207 of physical memory is at a 16MB boundary, or theoretically 64K 208 for the MSM machine class. 209 210config ARM_PATCH_PHYS_VIRT_16BIT 211 def_bool y 212 depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM 213 help 214 This option extends the physical to virtual translation patching 215 to allow physical memory down to a theoretical minimum of 64K 216 boundaries. 217 218source "init/Kconfig" 219 220source "kernel/Kconfig.freezer" 221 222menu "System Type" 223 224config MMU 225 bool "MMU-based Paged Memory Management Support" 226 default y 227 help 228 Select if you want MMU-based virtualised addressing space 229 support by paged memory management. If unsure, say 'Y'. 230 231# 232# The "ARM system type" choice list is ordered alphabetically by option 233# text. Please add new entries in the option alphabetic order. 234# 235choice 236 prompt "ARM system type" 237 default ARCH_VERSATILE 238 239config ARCH_INTEGRATOR 240 bool "ARM Ltd. Integrator family" 241 select ARM_AMBA 242 select ARCH_HAS_CPUFREQ 243 select CLKDEV_LOOKUP 244 select HAVE_MACH_CLKDEV 245 select ICST 246 select GENERIC_CLOCKEVENTS 247 select PLAT_VERSATILE 248 select PLAT_VERSATILE_FPGA_IRQ 249 help 250 Support for ARM's Integrator platform. 251 252config ARCH_REALVIEW 253 bool "ARM Ltd. RealView family" 254 select ARM_AMBA 255 select CLKDEV_LOOKUP 256 select HAVE_MACH_CLKDEV 257 select ICST 258 select GENERIC_CLOCKEVENTS 259 select ARCH_WANT_OPTIONAL_GPIOLIB 260 select PLAT_VERSATILE 261 select PLAT_VERSATILE_CLCD 262 select ARM_TIMER_SP804 263 select GPIO_PL061 if GPIOLIB 264 help 265 This enables support for ARM Ltd RealView boards. 266 267config ARCH_VERSATILE 268 bool "ARM Ltd. Versatile family" 269 select ARM_AMBA 270 select ARM_VIC 271 select CLKDEV_LOOKUP 272 select HAVE_MACH_CLKDEV 273 select ICST 274 select GENERIC_CLOCKEVENTS 275 select ARCH_WANT_OPTIONAL_GPIOLIB 276 select PLAT_VERSATILE 277 select PLAT_VERSATILE_CLCD 278 select PLAT_VERSATILE_FPGA_IRQ 279 select ARM_TIMER_SP804 280 help 281 This enables support for ARM Ltd Versatile board. 282 283config ARCH_VEXPRESS 284 bool "ARM Ltd. Versatile Express family" 285 select ARCH_WANT_OPTIONAL_GPIOLIB 286 select ARM_AMBA 287 select ARM_TIMER_SP804 288 select CLKDEV_LOOKUP 289 select HAVE_MACH_CLKDEV 290 select GENERIC_CLOCKEVENTS 291 select HAVE_CLK 292 select HAVE_PATA_PLATFORM 293 select ICST 294 select PLAT_VERSATILE 295 select PLAT_VERSATILE_CLCD 296 help 297 This enables support for the ARM Ltd Versatile Express boards. 298 299config ARCH_AT91 300 bool "Atmel AT91" 301 select ARCH_REQUIRE_GPIOLIB 302 select HAVE_CLK 303 select CLKDEV_LOOKUP 304 select ARM_PATCH_PHYS_VIRT if MMU 305 help 306 This enables support for systems based on the Atmel AT91RM9200, 307 AT91SAM9 and AT91CAP9 processors. 308 309config ARCH_BCMRING 310 bool "Broadcom BCMRING" 311 depends on MMU 312 select CPU_V6 313 select ARM_AMBA 314 select ARM_TIMER_SP804 315 select CLKDEV_LOOKUP 316 select GENERIC_CLOCKEVENTS 317 select ARCH_WANT_OPTIONAL_GPIOLIB 318 help 319 Support for Broadcom's BCMRing platform. 320 321config ARCH_CLPS711X 322 bool "Cirrus Logic CLPS711x/EP721x-based" 323 select CPU_ARM720T 324 select ARCH_USES_GETTIMEOFFSET 325 help 326 Support for Cirrus Logic 711x/721x based boards. 327 328config ARCH_CNS3XXX 329 bool "Cavium Networks CNS3XXX family" 330 select CPU_V6K 331 select GENERIC_CLOCKEVENTS 332 select ARM_GIC 333 select MIGHT_HAVE_PCI 334 select PCI_DOMAINS if PCI 335 help 336 Support for Cavium Networks CNS3XXX platform. 337 338config ARCH_GEMINI 339 bool "Cortina Systems Gemini" 340 select CPU_FA526 341 select ARCH_REQUIRE_GPIOLIB 342 select ARCH_USES_GETTIMEOFFSET 343 help 344 Support for the Cortina Systems Gemini family SoCs 345 346config ARCH_PRIMA2 347 bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" 348 select CPU_V7 349 select GENERIC_TIME 350 select NO_IOPORT 351 select GENERIC_CLOCKEVENTS 352 select CLKDEV_LOOKUP 353 select GENERIC_IRQ_CHIP 354 select USE_OF 355 select ZONE_DMA 356 help 357 Support for CSR SiRFSoC ARM Cortex A9 Platform 358 359config ARCH_EBSA110 360 bool "EBSA-110" 361 select CPU_SA110 362 select ISA 363 select NO_IOPORT 364 select ARCH_USES_GETTIMEOFFSET 365 help 366 This is an evaluation board for the StrongARM processor available 367 from Digital. It has limited hardware on-board, including an 368 Ethernet interface, two PCMCIA sockets, two serial ports and a 369 parallel port. 370 371config ARCH_EP93XX 372 bool "EP93xx-based" 373 select CPU_ARM920T 374 select ARM_AMBA 375 select ARM_VIC 376 select CLKDEV_LOOKUP 377 select ARCH_REQUIRE_GPIOLIB 378 select ARCH_HAS_HOLES_MEMORYMODEL 379 select ARCH_USES_GETTIMEOFFSET 380 help 381 This enables support for the Cirrus EP93xx series of CPUs. 382 383config ARCH_FOOTBRIDGE 384 bool "FootBridge" 385 select CPU_SA110 386 select FOOTBRIDGE 387 select GENERIC_CLOCKEVENTS 388 help 389 Support for systems based on the DC21285 companion chip 390 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. 391 392config ARCH_MXC 393 bool "Freescale MXC/iMX-based" 394 select GENERIC_CLOCKEVENTS 395 select ARCH_REQUIRE_GPIOLIB 396 select CLKDEV_LOOKUP 397 select CLKSRC_MMIO 398 select GENERIC_IRQ_CHIP 399 select HAVE_SCHED_CLOCK 400 help 401 Support for Freescale MXC/iMX-based family of processors 402 403config ARCH_MXS 404 bool "Freescale MXS-based" 405 select GENERIC_CLOCKEVENTS 406 select ARCH_REQUIRE_GPIOLIB 407 select CLKDEV_LOOKUP 408 select CLKSRC_MMIO 409 help 410 Support for Freescale MXS-based family of processors 411 412config ARCH_NETX 413 bool "Hilscher NetX based" 414 select CLKSRC_MMIO 415 select CPU_ARM926T 416 select ARM_VIC 417 select GENERIC_CLOCKEVENTS 418 help 419 This enables support for systems based on the Hilscher NetX Soc 420 421config ARCH_H720X 422 bool "Hynix HMS720x-based" 423 select CPU_ARM720T 424 select ISA_DMA_API 425 select ARCH_USES_GETTIMEOFFSET 426 help 427 This enables support for systems based on the Hynix HMS720x 428 429config ARCH_IOP13XX 430 bool "IOP13xx-based" 431 depends on MMU 432 select CPU_XSC3 433 select PLAT_IOP 434 select PCI 435 select ARCH_SUPPORTS_MSI 436 select VMSPLIT_1G 437 help 438 Support for Intel's IOP13XX (XScale) family of processors. 439 440config ARCH_IOP32X 441 bool "IOP32x-based" 442 depends on MMU 443 select CPU_XSCALE 444 select PLAT_IOP 445 select PCI 446 select ARCH_REQUIRE_GPIOLIB 447 help 448 Support for Intel's 80219 and IOP32X (XScale) family of 449 processors. 450 451config ARCH_IOP33X 452 bool "IOP33x-based" 453 depends on MMU 454 select CPU_XSCALE 455 select PLAT_IOP 456 select PCI 457 select ARCH_REQUIRE_GPIOLIB 458 help 459 Support for Intel's IOP33X (XScale) family of processors. 460 461config ARCH_IXP23XX 462 bool "IXP23XX-based" 463 depends on MMU 464 select CPU_XSC3 465 select PCI 466 select ARCH_USES_GETTIMEOFFSET 467 help 468 Support for Intel's IXP23xx (XScale) family of processors. 469 470config ARCH_IXP2000 471 bool "IXP2400/2800-based" 472 depends on MMU 473 select CPU_XSCALE 474 select PCI 475 select ARCH_USES_GETTIMEOFFSET 476 help 477 Support for Intel's IXP2400/2800 (XScale) family of processors. 478 479config ARCH_IXP4XX 480 bool "IXP4xx-based" 481 depends on MMU 482 select CLKSRC_MMIO 483 select CPU_XSCALE 484 select GENERIC_GPIO 485 select GENERIC_CLOCKEVENTS 486 select HAVE_SCHED_CLOCK 487 select MIGHT_HAVE_PCI 488 select DMABOUNCE if PCI 489 help 490 Support for Intel's IXP4XX (XScale) family of processors. 491 492config ARCH_DOVE 493 bool "Marvell Dove" 494 select CPU_V7 495 select PCI 496 select ARCH_REQUIRE_GPIOLIB 497 select GENERIC_CLOCKEVENTS 498 select PLAT_ORION 499 help 500 Support for the Marvell Dove SoC 88AP510 501 502config ARCH_KIRKWOOD 503 bool "Marvell Kirkwood" 504 select CPU_FEROCEON 505 select PCI 506 select ARCH_REQUIRE_GPIOLIB 507 select GENERIC_CLOCKEVENTS 508 select PLAT_ORION 509 help 510 Support for the following Marvell Kirkwood series SoCs: 511 88F6180, 88F6192 and 88F6281. 512 513config ARCH_LPC32XX 514 bool "NXP LPC32XX" 515 select CLKSRC_MMIO 516 select CPU_ARM926T 517 select ARCH_REQUIRE_GPIOLIB 518 select HAVE_IDE 519 select ARM_AMBA 520 select USB_ARCH_HAS_OHCI 521 select CLKDEV_LOOKUP 522 select GENERIC_TIME 523 select GENERIC_CLOCKEVENTS 524 help 525 Support for the NXP LPC32XX family of processors 526 527config ARCH_MV78XX0 528 bool "Marvell MV78xx0" 529 select CPU_FEROCEON 530 select PCI 531 select ARCH_REQUIRE_GPIOLIB 532 select GENERIC_CLOCKEVENTS 533 select PLAT_ORION 534 help 535 Support for the following Marvell MV78xx0 series SoCs: 536 MV781x0, MV782x0. 537 538config ARCH_ORION5X 539 bool "Marvell Orion" 540 depends on MMU 541 select CPU_FEROCEON 542 select PCI 543 select ARCH_REQUIRE_GPIOLIB 544 select GENERIC_CLOCKEVENTS 545 select PLAT_ORION 546 help 547 Support for the following Marvell Orion 5x series SoCs: 548 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), 549 Orion-2 (5281), Orion-1-90 (6183). 550 551config ARCH_MMP 552 bool "Marvell PXA168/910/MMP2" 553 depends on MMU 554 select ARCH_REQUIRE_GPIOLIB 555 select CLKDEV_LOOKUP 556 select GENERIC_CLOCKEVENTS 557 select HAVE_SCHED_CLOCK 558 select TICK_ONESHOT 559 select PLAT_PXA 560 select SPARSE_IRQ 561 help 562 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. 563 564config ARCH_KS8695 565 bool "Micrel/Kendin KS8695" 566 select CPU_ARM922T 567 select ARCH_REQUIRE_GPIOLIB 568 select ARCH_USES_GETTIMEOFFSET 569 help 570 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based 571 System-on-Chip devices. 572 573config ARCH_W90X900 574 bool "Nuvoton W90X900 CPU" 575 select CPU_ARM926T 576 select ARCH_REQUIRE_GPIOLIB 577 select CLKDEV_LOOKUP 578 select CLKSRC_MMIO 579 select GENERIC_CLOCKEVENTS 580 help 581 Support for Nuvoton (Winbond logic dept.) ARM9 processor, 582 At present, the w90x900 has been renamed nuc900, regarding 583 the ARM series product line, you can login the following 584 link address to know more. 585 586 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ 587 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> 588 589config ARCH_NUC93X 590 bool "Nuvoton NUC93X CPU" 591 select CPU_ARM926T 592 select CLKDEV_LOOKUP 593 help 594 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a 595 low-power and high performance MPEG-4/JPEG multimedia controller chip. 596 597config ARCH_TEGRA 598 bool "NVIDIA Tegra" 599 select CLKDEV_LOOKUP 600 select CLKSRC_MMIO 601 select GENERIC_TIME 602 select GENERIC_CLOCKEVENTS 603 select GENERIC_GPIO 604 select HAVE_CLK 605 select HAVE_SCHED_CLOCK 606 select ARCH_HAS_CPUFREQ 607 help 608 This enables support for NVIDIA Tegra based systems (Tegra APX, 609 Tegra 6xx and Tegra 2 series). 610 611config ARCH_PNX4008 612 bool "Philips Nexperia PNX4008 Mobile" 613 select CPU_ARM926T 614 select CLKDEV_LOOKUP 615 select ARCH_USES_GETTIMEOFFSET 616 help 617 This enables support for Philips PNX4008 mobile platform. 618 619config ARCH_PXA 620 bool "PXA2xx/PXA3xx-based" 621 depends on MMU 622 select ARCH_MTD_XIP 623 select ARCH_HAS_CPUFREQ 624 select CLKDEV_LOOKUP 625 select CLKSRC_MMIO 626 select ARCH_REQUIRE_GPIOLIB 627 select GENERIC_CLOCKEVENTS 628 select HAVE_SCHED_CLOCK 629 select TICK_ONESHOT 630 select PLAT_PXA 631 select SPARSE_IRQ 632 select AUTO_ZRELADDR 633 select MULTI_IRQ_HANDLER 634 select ARM_CPU_SUSPEND if PM 635 help 636 Support for Intel/Marvell's PXA2xx/PXA3xx processor line. 637 638config ARCH_MSM 639 bool "Qualcomm MSM" 640 select HAVE_CLK 641 select GENERIC_CLOCKEVENTS 642 select ARCH_REQUIRE_GPIOLIB 643 select CLKDEV_LOOKUP 644 help 645 Support for Qualcomm MSM/QSD based systems. This runs on the 646 apps processor of the MSM/QSD and depends on a shared memory 647 interface to the modem processor which runs the baseband 648 stack and controls some vital subsystems 649 (clock and power control, etc). 650 651config ARCH_SHMOBILE 652 bool "Renesas SH-Mobile / R-Mobile" 653 select HAVE_CLK 654 select CLKDEV_LOOKUP 655 select HAVE_MACH_CLKDEV 656 select GENERIC_CLOCKEVENTS 657 select NO_IOPORT 658 select SPARSE_IRQ 659 select MULTI_IRQ_HANDLER 660 select PM_GENERIC_DOMAINS if PM 661 help 662 Support for Renesas's SH-Mobile and R-Mobile ARM platforms. 663 664config ARCH_RPC 665 bool "RiscPC" 666 select ARCH_ACORN 667 select FIQ 668 select TIMER_ACORN 669 select ARCH_MAY_HAVE_PC_FDC 670 select HAVE_PATA_PLATFORM 671 select ISA_DMA_API 672 select NO_IOPORT 673 select ARCH_SPARSEMEM_ENABLE 674 select ARCH_USES_GETTIMEOFFSET 675 help 676 On the Acorn Risc-PC, Linux can support the internal IDE disk and 677 CD-ROM interface, serial and parallel port, and the floppy drive. 678 679config ARCH_SA1100 680 bool "SA1100-based" 681 select CLKSRC_MMIO 682 select CPU_SA1100 683 select ISA 684 select ARCH_SPARSEMEM_ENABLE 685 select ARCH_MTD_XIP 686 select ARCH_HAS_CPUFREQ 687 select CPU_FREQ 688 select GENERIC_CLOCKEVENTS 689 select HAVE_CLK 690 select HAVE_SCHED_CLOCK 691 select TICK_ONESHOT 692 select ARCH_REQUIRE_GPIOLIB 693 help 694 Support for StrongARM 11x0 based boards. 695 696config ARCH_S3C2410 697 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" 698 select GENERIC_GPIO 699 select ARCH_HAS_CPUFREQ 700 select HAVE_CLK 701 select CLKDEV_LOOKUP 702 select ARCH_USES_GETTIMEOFFSET 703 select HAVE_S3C2410_I2C if I2C 704 help 705 Samsung S3C2410X CPU based systems, such as the Simtec Electronics 706 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or 707 the Samsung SMDK2410 development board (and derivatives). 708 709 Note, the S3C2416 and the S3C2450 are so close that they even share 710 the same SoC ID code. This means that there is no separate machine 711 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. 712 713config ARCH_S3C64XX 714 bool "Samsung S3C64XX" 715 select PLAT_SAMSUNG 716 select CPU_V6 717 select ARM_VIC 718 select HAVE_CLK 719 select CLKDEV_LOOKUP 720 select NO_IOPORT 721 select ARCH_USES_GETTIMEOFFSET 722 select ARCH_HAS_CPUFREQ 723 select ARCH_REQUIRE_GPIOLIB 724 select SAMSUNG_CLKSRC 725 select SAMSUNG_IRQ_VIC_TIMER 726 select SAMSUNG_IRQ_UART 727 select S3C_GPIO_TRACK 728 select S3C_GPIO_PULL_UPDOWN 729 select S3C_GPIO_CFG_S3C24XX 730 select S3C_GPIO_CFG_S3C64XX 731 select S3C_DEV_NAND 732 select USB_ARCH_HAS_OHCI 733 select SAMSUNG_GPIOLIB_4BIT 734 select HAVE_S3C2410_I2C if I2C 735 select HAVE_S3C2410_WATCHDOG if WATCHDOG 736 help 737 Samsung S3C64XX series based systems 738 739config ARCH_S5P64X0 740 bool "Samsung S5P6440 S5P6450" 741 select CPU_V6 742 select GENERIC_GPIO 743 select HAVE_CLK 744 select CLKDEV_LOOKUP 745 select CLKSRC_MMIO 746 select HAVE_S3C2410_WATCHDOG if WATCHDOG 747 select GENERIC_CLOCKEVENTS 748 select HAVE_SCHED_CLOCK 749 select HAVE_S3C2410_I2C if I2C 750 select HAVE_S3C_RTC if RTC_CLASS 751 help 752 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, 753 SMDK6450. 754 755config ARCH_S5PC100 756 bool "Samsung S5PC100" 757 select GENERIC_GPIO 758 select HAVE_CLK 759 select CLKDEV_LOOKUP 760 select CPU_V7 761 select ARM_L1_CACHE_SHIFT_6 762 select ARCH_USES_GETTIMEOFFSET 763 select HAVE_S3C2410_I2C if I2C 764 select HAVE_S3C_RTC if RTC_CLASS 765 select HAVE_S3C2410_WATCHDOG if WATCHDOG 766 help 767 Samsung S5PC100 series based systems 768 769config ARCH_S5PV210 770 bool "Samsung S5PV210/S5PC110" 771 select CPU_V7 772 select ARCH_SPARSEMEM_ENABLE 773 select ARCH_HAS_HOLES_MEMORYMODEL 774 select GENERIC_GPIO 775 select HAVE_CLK 776 select CLKDEV_LOOKUP 777 select CLKSRC_MMIO 778 select ARM_L1_CACHE_SHIFT_6 779 select ARCH_HAS_CPUFREQ 780 select GENERIC_CLOCKEVENTS 781 select HAVE_SCHED_CLOCK 782 select HAVE_S3C2410_I2C if I2C 783 select HAVE_S3C_RTC if RTC_CLASS 784 select HAVE_S3C2410_WATCHDOG if WATCHDOG 785 help 786 Samsung S5PV210/S5PC110 series based systems 787 788config ARCH_EXYNOS4 789 bool "Samsung EXYNOS4" 790 select CPU_V7 791 select ARCH_SPARSEMEM_ENABLE 792 select ARCH_HAS_HOLES_MEMORYMODEL 793 select GENERIC_GPIO 794 select HAVE_CLK 795 select CLKDEV_LOOKUP 796 select ARCH_HAS_CPUFREQ 797 select GENERIC_CLOCKEVENTS 798 select HAVE_S3C_RTC if RTC_CLASS 799 select HAVE_S3C2410_I2C if I2C 800 select HAVE_S3C2410_WATCHDOG if WATCHDOG 801 help 802 Samsung EXYNOS4 series based systems 803 804config ARCH_SHARK 805 bool "Shark" 806 select CPU_SA110 807 select ISA 808 select ISA_DMA 809 select ZONE_DMA 810 select PCI 811 select ARCH_USES_GETTIMEOFFSET 812 help 813 Support for the StrongARM based Digital DNARD machine, also known 814 as "Shark" (<http://www.shark-linux.de/shark.html>). 815 816config ARCH_TCC_926 817 bool "Telechips TCC ARM926-based systems" 818 select CLKSRC_MMIO 819 select CPU_ARM926T 820 select HAVE_CLK 821 select CLKDEV_LOOKUP 822 select GENERIC_CLOCKEVENTS 823 help 824 Support for Telechips TCC ARM926-based systems. 825 826config ARCH_U300 827 bool "ST-Ericsson U300 Series" 828 depends on MMU 829 select CLKSRC_MMIO 830 select CPU_ARM926T 831 select HAVE_SCHED_CLOCK 832 select HAVE_TCM 833 select ARM_AMBA 834 select ARM_VIC 835 select GENERIC_CLOCKEVENTS 836 select CLKDEV_LOOKUP 837 select HAVE_MACH_CLKDEV 838 select GENERIC_GPIO 839 help 840 Support for ST-Ericsson U300 series mobile platforms. 841 842config ARCH_U8500 843 bool "ST-Ericsson U8500 Series" 844 select CPU_V7 845 select ARM_AMBA 846 select GENERIC_CLOCKEVENTS 847 select CLKDEV_LOOKUP 848 select ARCH_REQUIRE_GPIOLIB 849 select ARCH_HAS_CPUFREQ 850 help 851 Support for ST-Ericsson's Ux500 architecture 852 853config ARCH_NOMADIK 854 bool "STMicroelectronics Nomadik" 855 select ARM_AMBA 856 select ARM_VIC 857 select CPU_ARM926T 858 select CLKDEV_LOOKUP 859 select GENERIC_CLOCKEVENTS 860 select ARCH_REQUIRE_GPIOLIB 861 help 862 Support for the Nomadik platform by ST-Ericsson 863 864config ARCH_DAVINCI 865 bool "TI DaVinci" 866 select GENERIC_CLOCKEVENTS 867 select ARCH_REQUIRE_GPIOLIB 868 select ZONE_DMA 869 select HAVE_IDE 870 select CLKDEV_LOOKUP 871 select GENERIC_ALLOCATOR 872 select GENERIC_IRQ_CHIP 873 select ARCH_HAS_HOLES_MEMORYMODEL 874 help 875 Support for TI's DaVinci platform. 876 877config ARCH_OMAP 878 bool "TI OMAP" 879 select HAVE_CLK 880 select ARCH_REQUIRE_GPIOLIB 881 select ARCH_HAS_CPUFREQ 882 select CLKSRC_MMIO 883 select GENERIC_CLOCKEVENTS 884 select HAVE_SCHED_CLOCK 885 select ARCH_HAS_HOLES_MEMORYMODEL 886 help 887 Support for TI's OMAP platform (OMAP1/2/3/4). 888 889config PLAT_SPEAR 890 bool "ST SPEAr" 891 select ARM_AMBA 892 select ARCH_REQUIRE_GPIOLIB 893 select CLKDEV_LOOKUP 894 select CLKSRC_MMIO 895 select GENERIC_CLOCKEVENTS 896 select HAVE_CLK 897 help 898 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). 899 900config ARCH_VT8500 901 bool "VIA/WonderMedia 85xx" 902 select CPU_ARM926T 903 select GENERIC_GPIO 904 select ARCH_HAS_CPUFREQ 905 select GENERIC_CLOCKEVENTS 906 select ARCH_REQUIRE_GPIOLIB 907 select HAVE_PWM 908 help 909 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. 910 911config ARCH_ZYNQ 912 bool "Xilinx Zynq ARM Cortex A9 Platform" 913 select CPU_V7 914 select GENERIC_TIME 915 select GENERIC_CLOCKEVENTS 916 select CLKDEV_LOOKUP 917 select ARM_GIC 918 select ARM_AMBA 919 select ICST 920 select USE_OF 921 help 922 Support for Xilinx Zynq ARM Cortex A9 Platform 923endchoice 924 925# 926# This is sorted alphabetically by mach-* pathname. However, plat-* 927# Kconfigs may be included either alphabetically (according to the 928# plat- suffix) or along side the corresponding mach-* source. 929# 930source "arch/arm/mach-at91/Kconfig" 931 932source "arch/arm/mach-bcmring/Kconfig" 933 934source "arch/arm/mach-clps711x/Kconfig" 935 936source "arch/arm/mach-cns3xxx/Kconfig" 937 938source "arch/arm/mach-davinci/Kconfig" 939 940source "arch/arm/mach-dove/Kconfig" 941 942source "arch/arm/mach-ep93xx/Kconfig" 943 944source "arch/arm/mach-footbridge/Kconfig" 945 946source "arch/arm/mach-gemini/Kconfig" 947 948source "arch/arm/mach-h720x/Kconfig" 949 950source "arch/arm/mach-integrator/Kconfig" 951 952source "arch/arm/mach-iop32x/Kconfig" 953 954source "arch/arm/mach-iop33x/Kconfig" 955 956source "arch/arm/mach-iop13xx/Kconfig" 957 958source "arch/arm/mach-ixp4xx/Kconfig" 959 960source "arch/arm/mach-ixp2000/Kconfig" 961 962source "arch/arm/mach-ixp23xx/Kconfig" 963 964source "arch/arm/mach-kirkwood/Kconfig" 965 966source "arch/arm/mach-ks8695/Kconfig" 967 968source "arch/arm/mach-lpc32xx/Kconfig" 969 970source "arch/arm/mach-msm/Kconfig" 971 972source "arch/arm/mach-mv78xx0/Kconfig" 973 974source "arch/arm/plat-mxc/Kconfig" 975 976source "arch/arm/mach-mxs/Kconfig" 977 978source "arch/arm/mach-netx/Kconfig" 979 980source "arch/arm/mach-nomadik/Kconfig" 981source "arch/arm/plat-nomadik/Kconfig" 982 983source "arch/arm/mach-nuc93x/Kconfig" 984 985source "arch/arm/plat-omap/Kconfig" 986 987source "arch/arm/mach-omap1/Kconfig" 988 989source "arch/arm/mach-omap2/Kconfig" 990 991source "arch/arm/mach-orion5x/Kconfig" 992 993source "arch/arm/mach-pxa/Kconfig" 994source "arch/arm/plat-pxa/Kconfig" 995 996source "arch/arm/mach-mmp/Kconfig" 997 998source "arch/arm/mach-realview/Kconfig" 999 1000source "arch/arm/mach-sa1100/Kconfig" 1001 1002source "arch/arm/plat-samsung/Kconfig" 1003source "arch/arm/plat-s3c24xx/Kconfig" 1004source "arch/arm/plat-s5p/Kconfig" 1005 1006source "arch/arm/plat-spear/Kconfig" 1007 1008source "arch/arm/plat-tcc/Kconfig" 1009 1010if ARCH_S3C2410 1011source "arch/arm/mach-s3c2410/Kconfig" 1012source "arch/arm/mach-s3c2412/Kconfig" 1013source "arch/arm/mach-s3c2416/Kconfig" 1014source "arch/arm/mach-s3c2440/Kconfig" 1015source "arch/arm/mach-s3c2443/Kconfig" 1016endif 1017 1018if ARCH_S3C64XX 1019source "arch/arm/mach-s3c64xx/Kconfig" 1020endif 1021 1022source "arch/arm/mach-s5p64x0/Kconfig" 1023 1024source "arch/arm/mach-s5pc100/Kconfig" 1025 1026source "arch/arm/mach-s5pv210/Kconfig" 1027 1028source "arch/arm/mach-exynos4/Kconfig" 1029 1030source "arch/arm/mach-shmobile/Kconfig" 1031 1032source "arch/arm/mach-tegra/Kconfig" 1033 1034source "arch/arm/mach-u300/Kconfig" 1035 1036source "arch/arm/mach-ux500/Kconfig" 1037 1038source "arch/arm/mach-versatile/Kconfig" 1039 1040source "arch/arm/mach-vexpress/Kconfig" 1041source "arch/arm/plat-versatile/Kconfig" 1042 1043source "arch/arm/mach-vt8500/Kconfig" 1044 1045source "arch/arm/mach-w90x900/Kconfig" 1046 1047# Definitions to make life easier 1048config ARCH_ACORN 1049 bool 1050 1051config PLAT_IOP 1052 bool 1053 select GENERIC_CLOCKEVENTS 1054 select HAVE_SCHED_CLOCK 1055 1056config PLAT_ORION 1057 bool 1058 select CLKSRC_MMIO 1059 select GENERIC_IRQ_CHIP 1060 select HAVE_SCHED_CLOCK 1061 1062config PLAT_PXA 1063 bool 1064 1065config PLAT_VERSATILE 1066 bool 1067 1068config ARM_TIMER_SP804 1069 bool 1070 select CLKSRC_MMIO 1071 1072source arch/arm/mm/Kconfig 1073 1074config IWMMXT 1075 bool "Enable iWMMXt support" 1076 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 1077 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP 1078 help 1079 Enable support for iWMMXt context switching at run time if 1080 running on a CPU that supports it. 1081 1082# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER 1083config XSCALE_PMU 1084 bool 1085 depends on CPU_XSCALE && !XSCALE_PMU_TIMER 1086 default y 1087 1088config CPU_HAS_PMU 1089 depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \ 1090 (!ARCH_OMAP3 || OMAP3_EMU) 1091 default y 1092 bool 1093 1094config MULTI_IRQ_HANDLER 1095 bool 1096 help 1097 Allow each machine to specify it's own IRQ handler at run time. 1098 1099if !MMU 1100source "arch/arm/Kconfig-nommu" 1101endif 1102 1103config ARM_ERRATA_411920 1104 bool "ARM errata: Invalidation of the Instruction Cache operation can fail" 1105 depends on CPU_V6 || CPU_V6K 1106 help 1107 Invalidation of the Instruction Cache operation can 1108 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. 1109 It does not affect the MPCore. This option enables the ARM Ltd. 1110 recommended workaround. 1111 1112config ARM_ERRATA_430973 1113 bool "ARM errata: Stale prediction on replaced interworking branch" 1114 depends on CPU_V7 1115 help 1116 This option enables the workaround for the 430973 Cortex-A8 1117 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb 1118 interworking branch is replaced with another code sequence at the 1119 same virtual address, whether due to self-modifying code or virtual 1120 to physical address re-mapping, Cortex-A8 does not recover from the 1121 stale interworking branch prediction. This results in Cortex-A8 1122 executing the new code sequence in the incorrect ARM or Thumb state. 1123 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE 1124 and also flushes the branch target cache at every context switch. 1125 Note that setting specific bits in the ACTLR register may not be 1126 available in non-secure mode. 1127 1128config ARM_ERRATA_458693 1129 bool "ARM errata: Processor deadlock when a false hazard is created" 1130 depends on CPU_V7 1131 help 1132 This option enables the workaround for the 458693 Cortex-A8 (r2p0) 1133 erratum. For very specific sequences of memory operations, it is 1134 possible for a hazard condition intended for a cache line to instead 1135 be incorrectly associated with a different cache line. This false 1136 hazard might then cause a processor deadlock. The workaround enables 1137 the L1 caching of the NEON accesses and disables the PLD instruction 1138 in the ACTLR register. Note that setting specific bits in the ACTLR 1139 register may not be available in non-secure mode. 1140 1141config ARM_ERRATA_460075 1142 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" 1143 depends on CPU_V7 1144 help 1145 This option enables the workaround for the 460075 Cortex-A8 (r2p0) 1146 erratum. Any asynchronous access to the L2 cache may encounter a 1147 situation in which recent store transactions to the L2 cache are lost 1148 and overwritten with stale memory contents from external memory. The 1149 workaround disables the write-allocate mode for the L2 cache via the 1150 ACTLR register. Note that setting specific bits in the ACTLR register 1151 may not be available in non-secure mode. 1152 1153config ARM_ERRATA_742230 1154 bool "ARM errata: DMB operation may be faulty" 1155 depends on CPU_V7 && SMP 1156 help 1157 This option enables the workaround for the 742230 Cortex-A9 1158 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction 1159 between two write operations may not ensure the correct visibility 1160 ordering of the two writes. This workaround sets a specific bit in 1161 the diagnostic register of the Cortex-A9 which causes the DMB 1162 instruction to behave as a DSB, ensuring the correct behaviour of 1163 the two writes. 1164 1165config ARM_ERRATA_742231 1166 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" 1167 depends on CPU_V7 && SMP 1168 help 1169 This option enables the workaround for the 742231 Cortex-A9 1170 (r2p0..r2p2) erratum. Under certain conditions, specific to the 1171 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, 1172 accessing some data located in the same cache line, may get corrupted 1173 data due to bad handling of the address hazard when the line gets 1174 replaced from one of the CPUs at the same time as another CPU is 1175 accessing it. This workaround sets specific bits in the diagnostic 1176 register of the Cortex-A9 which reduces the linefill issuing 1177 capabilities of the processor. 1178 1179config PL310_ERRATA_588369 1180 bool "Clean & Invalidate maintenance operations do not invalidate clean lines" 1181 depends on CACHE_L2X0 1182 help 1183 The PL310 L2 cache controller implements three types of Clean & 1184 Invalidate maintenance operations: by Physical Address 1185 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). 1186 They are architecturally defined to behave as the execution of a 1187 clean operation followed immediately by an invalidate operation, 1188 both performing to the same memory location. This functionality 1189 is not correctly implemented in PL310 as clean lines are not 1190 invalidated as a result of these operations. 1191 1192config ARM_ERRATA_720789 1193 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" 1194 depends on CPU_V7 && SMP 1195 help 1196 This option enables the workaround for the 720789 Cortex-A9 (prior to 1197 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the 1198 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. 1199 As a consequence of this erratum, some TLB entries which should be 1200 invalidated are not, resulting in an incoherency in the system page 1201 tables. The workaround changes the TLB flushing routines to invalidate 1202 entries regardless of the ASID. 1203 1204config PL310_ERRATA_727915 1205 bool "Background Clean & Invalidate by Way operation can cause data corruption" 1206 depends on CACHE_L2X0 1207 help 1208 PL310 implements the Clean & Invalidate by Way L2 cache maintenance 1209 operation (offset 0x7FC). This operation runs in background so that 1210 PL310 can handle normal accesses while it is in progress. Under very 1211 rare circumstances, due to this erratum, write data can be lost when 1212 PL310 treats a cacheable write transaction during a Clean & 1213 Invalidate by Way operation. 1214 1215config ARM_ERRATA_743622 1216 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" 1217 depends on CPU_V7 1218 help 1219 This option enables the workaround for the 743622 Cortex-A9 1220 (r2p0..r2p2) erratum. Under very rare conditions, a faulty 1221 optimisation in the Cortex-A9 Store Buffer may lead to data 1222 corruption. This workaround sets a specific bit in the diagnostic 1223 register of the Cortex-A9 which disables the Store Buffer 1224 optimisation, preventing the defect from occurring. This has no 1225 visible impact on the overall performance or power consumption of the 1226 processor. 1227 1228config ARM_ERRATA_751472 1229 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" 1230 depends on CPU_V7 && SMP 1231 help 1232 This option enables the workaround for the 751472 Cortex-A9 (prior 1233 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the 1234 completion of a following broadcasted operation if the second 1235 operation is received by a CPU before the ICIALLUIS has completed, 1236 potentially leading to corrupted entries in the cache or TLB. 1237 1238config ARM_ERRATA_753970 1239 bool "ARM errata: cache sync operation may be faulty" 1240 depends on CACHE_PL310 1241 help 1242 This option enables the workaround for the 753970 PL310 (r3p0) erratum. 1243 1244 Under some condition the effect of cache sync operation on 1245 the store buffer still remains when the operation completes. 1246 This means that the store buffer is always asked to drain and 1247 this prevents it from merging any further writes. The workaround 1248 is to replace the normal offset of cache sync operation (0x730) 1249 by another offset targeting an unmapped PL310 register 0x740. 1250 This has the same effect as the cache sync operation: store buffer 1251 drain and waiting for all buffers empty. 1252 1253config ARM_ERRATA_754322 1254 bool "ARM errata: possible faulty MMU translations following an ASID switch" 1255 depends on CPU_V7 1256 help 1257 This option enables the workaround for the 754322 Cortex-A9 (r2p*, 1258 r3p*) erratum. A speculative memory access may cause a page table walk 1259 which starts prior to an ASID switch but completes afterwards. This 1260 can populate the micro-TLB with a stale entry which may be hit with 1261 the new ASID. This workaround places two dsb instructions in the mm 1262 switching code so that no page table walks can cross the ASID switch. 1263 1264config ARM_ERRATA_754327 1265 bool "ARM errata: no automatic Store Buffer drain" 1266 depends on CPU_V7 && SMP 1267 help 1268 This option enables the workaround for the 754327 Cortex-A9 (prior to 1269 r2p0) erratum. The Store Buffer does not have any automatic draining 1270 mechanism and therefore a livelock may occur if an external agent 1271 continuously polls a memory location waiting to observe an update. 1272 This workaround defines cpu_relax() as smp_mb(), preventing correctly 1273 written polling loops from denying visibility of updates to memory. 1274 1275endmenu 1276 1277source "arch/arm/common/Kconfig" 1278 1279menu "Bus support" 1280 1281config ARM_AMBA 1282 bool 1283 1284config ISA 1285 bool 1286 help 1287 Find out whether you have ISA slots on your motherboard. ISA is the 1288 name of a bus system, i.e. the way the CPU talks to the other stuff 1289 inside your box. Other bus systems are PCI, EISA, MicroChannel 1290 (MCA) or VESA. ISA is an older system, now being displaced by PCI; 1291 newer boards don't support it. If you have ISA, say Y, otherwise N. 1292 1293# Select ISA DMA controller support 1294config ISA_DMA 1295 bool 1296 select ISA_DMA_API 1297 1298# Select ISA DMA interface 1299config ISA_DMA_API 1300 bool 1301 1302config PCI 1303 bool "PCI support" if MIGHT_HAVE_PCI 1304 help 1305 Find out whether you have a PCI motherboard. PCI is the name of a 1306 bus system, i.e. the way the CPU talks to the other stuff inside 1307 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or 1308 VESA. If you have PCI, say Y, otherwise N. 1309 1310config PCI_DOMAINS 1311 bool 1312 depends on PCI 1313 1314config PCI_NANOENGINE 1315 bool "BSE nanoEngine PCI support" 1316 depends on SA1100_NANOENGINE 1317 help 1318 Enable PCI on the BSE nanoEngine board. 1319 1320config PCI_SYSCALL 1321 def_bool PCI 1322 1323# Select the host bridge type 1324config PCI_HOST_VIA82C505 1325 bool 1326 depends on PCI && ARCH_SHARK 1327 default y 1328 1329config PCI_HOST_ITE8152 1330 bool 1331 depends on PCI && MACH_ARMCORE 1332 default y 1333 select DMABOUNCE 1334 1335source "drivers/pci/Kconfig" 1336 1337source "drivers/pcmcia/Kconfig" 1338 1339endmenu 1340 1341menu "Kernel Features" 1342 1343source "kernel/time/Kconfig" 1344 1345config SMP 1346 bool "Symmetric Multi-Processing" 1347 depends on CPU_V6K || CPU_V7 1348 depends on GENERIC_CLOCKEVENTS 1349 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ 1350 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ 1351 ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ 1352 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE 1353 depends on MMU 1354 select USE_GENERIC_SMP_HELPERS 1355 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP 1356 help 1357 This enables support for systems with more than one CPU. If you have 1358 a system with only one CPU, like most personal computers, say N. If 1359 you have a system with more than one CPU, say Y. 1360 1361 If you say N here, the kernel will run on single and multiprocessor 1362 machines, but will use only one CPU of a multiprocessor machine. If 1363 you say Y here, the kernel will run on many, but not all, single 1364 processor machines. On a single processor machine, the kernel will 1365 run faster if you say N here. 1366 1367 See also <file:Documentation/i386/IO-APIC.txt>, 1368 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at 1369 <http://tldp.org/HOWTO/SMP-HOWTO.html>. 1370 1371 If you don't know what to do here, say N. 1372 1373config SMP_ON_UP 1374 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" 1375 depends on EXPERIMENTAL 1376 depends on SMP && !XIP_KERNEL 1377 default y 1378 help 1379 SMP kernels contain instructions which fail on non-SMP processors. 1380 Enabling this option allows the kernel to modify itself to make 1381 these instructions safe. Disabling it allows about 1K of space 1382 savings. 1383 1384 If you don't know what to do here, say Y. 1385 1386config HAVE_ARM_SCU 1387 bool 1388 help 1389 This option enables support for the ARM system coherency unit 1390 1391config HAVE_ARM_TWD 1392 bool 1393 depends on SMP 1394 select TICK_ONESHOT 1395 help 1396 This options enables support for the ARM timer and watchdog unit 1397 1398choice 1399 prompt "Memory split" 1400 default VMSPLIT_3G 1401 help 1402 Select the desired split between kernel and user memory. 1403 1404 If you are not absolutely sure what you are doing, leave this 1405 option alone! 1406 1407 config VMSPLIT_3G 1408 bool "3G/1G user/kernel split" 1409 config VMSPLIT_2G 1410 bool "2G/2G user/kernel split" 1411 config VMSPLIT_1G 1412 bool "1G/3G user/kernel split" 1413endchoice 1414 1415config PAGE_OFFSET 1416 hex 1417 default 0x40000000 if VMSPLIT_1G 1418 default 0x80000000 if VMSPLIT_2G 1419 default 0xC0000000 1420 1421config NR_CPUS 1422 int "Maximum number of CPUs (2-32)" 1423 range 2 32 1424 depends on SMP 1425 default "4" 1426 1427config HOTPLUG_CPU 1428 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" 1429 depends on SMP && HOTPLUG && EXPERIMENTAL 1430 help 1431 Say Y here to experiment with turning CPUs off and on. CPUs 1432 can be controlled through /sys/devices/system/cpu. 1433 1434config LOCAL_TIMERS 1435 bool "Use local timer interrupts" 1436 depends on SMP 1437 default y 1438 select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT) 1439 help 1440 Enable support for local timers on SMP platforms, rather then the 1441 legacy IPI broadcast method. Local timers allows the system 1442 accounting to be spread across the timer interval, preventing a 1443 "thundering herd" at every timer tick. 1444 1445source kernel/Kconfig.preempt 1446 1447config HZ 1448 int 1449 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ 1450 ARCH_S5PV210 || ARCH_EXYNOS4 1451 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER 1452 default AT91_TIMER_HZ if ARCH_AT91 1453 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE 1454 default 100 1455 1456config THUMB2_KERNEL 1457 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" 1458 depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL 1459 select AEABI 1460 select ARM_ASM_UNIFIED 1461 select ARM_UNWIND 1462 help 1463 By enabling this option, the kernel will be compiled in 1464 Thumb-2 mode. A compiler/assembler that understand the unified 1465 ARM-Thumb syntax is needed. 1466 1467 If unsure, say N. 1468 1469config THUMB2_AVOID_R_ARM_THM_JUMP11 1470 bool "Work around buggy Thumb-2 short branch relocations in gas" 1471 depends on THUMB2_KERNEL && MODULES 1472 default y 1473 help 1474 Various binutils versions can resolve Thumb-2 branches to 1475 locally-defined, preemptible global symbols as short-range "b.n" 1476 branch instructions. 1477 1478 This is a problem, because there's no guarantee the final 1479 destination of the symbol, or any candidate locations for a 1480 trampoline, are within range of the branch. For this reason, the 1481 kernel does not support fixing up the R_ARM_THM_JUMP11 (102) 1482 relocation in modules at all, and it makes little sense to add 1483 support. 1484 1485 The symptom is that the kernel fails with an "unsupported 1486 relocation" error when loading some modules. 1487 1488 Until fixed tools are available, passing 1489 -fno-optimize-sibling-calls to gcc should prevent gcc generating 1490 code which hits this problem, at the cost of a bit of extra runtime 1491 stack usage in some cases. 1492 1493 The problem is described in more detail at: 1494 https://bugs.launchpad.net/binutils-linaro/+bug/725126 1495 1496 Only Thumb-2 kernels are affected. 1497 1498 Unless you are sure your tools don't have this problem, say Y. 1499 1500config ARM_ASM_UNIFIED 1501 bool 1502 1503config AEABI 1504 bool "Use the ARM EABI to compile the kernel" 1505 help 1506 This option allows for the kernel to be compiled using the latest 1507 ARM ABI (aka EABI). This is only useful if you are using a user 1508 space environment that is also compiled with EABI. 1509 1510 Since there are major incompatibilities between the legacy ABI and 1511 EABI, especially with regard to structure member alignment, this 1512 option also changes the kernel syscall calling convention to 1513 disambiguate both ABIs and allow for backward compatibility support 1514 (selected with CONFIG_OABI_COMPAT). 1515 1516 To use this you need GCC version 4.0.0 or later. 1517 1518config OABI_COMPAT 1519 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" 1520 depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL 1521 default y 1522 help 1523 This option preserves the old syscall interface along with the 1524 new (ARM EABI) one. It also provides a compatibility layer to 1525 intercept syscalls that have structure arguments which layout 1526 in memory differs between the legacy ABI and the new ARM EABI 1527 (only for non "thumb" binaries). This option adds a tiny 1528 overhead to all syscalls and produces a slightly larger kernel. 1529 If you know you'll be using only pure EABI user space then you 1530 can say N here. If this option is not selected and you attempt 1531 to execute a legacy ABI binary then the result will be 1532 UNPREDICTABLE (in fact it can be predicted that it won't work 1533 at all). If in doubt say Y. 1534 1535config ARCH_HAS_HOLES_MEMORYMODEL 1536 bool 1537 1538config ARCH_SPARSEMEM_ENABLE 1539 bool 1540 1541config ARCH_SPARSEMEM_DEFAULT 1542 def_bool ARCH_SPARSEMEM_ENABLE 1543 1544config ARCH_SELECT_MEMORY_MODEL 1545 def_bool ARCH_SPARSEMEM_ENABLE 1546 1547config HAVE_ARCH_PFN_VALID 1548 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM 1549 1550config HIGHMEM 1551 bool "High Memory Support" 1552 depends on MMU 1553 help 1554 The address space of ARM processors is only 4 Gigabytes large 1555 and it has to accommodate user address space, kernel address 1556 space as well as some memory mapped IO. That means that, if you 1557 have a large amount of physical memory and/or IO, not all of the 1558 memory can be "permanently mapped" by the kernel. The physical 1559 memory that is not permanently mapped is called "high memory". 1560 1561 Depending on the selected kernel/user memory split, minimum 1562 vmalloc space and actual amount of RAM, you may not need this 1563 option which should result in a slightly faster kernel. 1564 1565 If unsure, say n. 1566 1567config HIGHPTE 1568 bool "Allocate 2nd-level pagetables from highmem" 1569 depends on HIGHMEM 1570 1571config HW_PERF_EVENTS 1572 bool "Enable hardware performance counter support for perf events" 1573 depends on PERF_EVENTS && CPU_HAS_PMU 1574 default y 1575 help 1576 Enable hardware performance counter support for perf events. If 1577 disabled, perf events will use software events only. 1578 1579source "mm/Kconfig" 1580 1581config FORCE_MAX_ZONEORDER 1582 int "Maximum zone order" if ARCH_SHMOBILE 1583 range 11 64 if ARCH_SHMOBILE 1584 default "9" if SA1111 1585 default "11" 1586 help 1587 The kernel memory allocator divides physically contiguous memory 1588 blocks into "zones", where each zone is a power of two number of 1589 pages. This option selects the largest power of two that the kernel 1590 keeps in the memory allocator. If you need to allocate very large 1591 blocks of physically contiguous memory, then you may need to 1592 increase this value. 1593 1594 This config option is actually maximum order plus one. For example, 1595 a value of 11 means that the largest free memory block is 2^10 pages. 1596 1597config LEDS 1598 bool "Timer and CPU usage LEDs" 1599 depends on ARCH_CDB89712 || ARCH_EBSA110 || \ 1600 ARCH_EBSA285 || ARCH_INTEGRATOR || \ 1601 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ 1602 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ 1603 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ 1604 ARCH_AT91 || ARCH_DAVINCI || \ 1605 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW 1606 help 1607 If you say Y here, the LEDs on your machine will be used 1608 to provide useful information about your current system status. 1609 1610 If you are compiling a kernel for a NetWinder or EBSA-285, you will 1611 be able to select which LEDs are active using the options below. If 1612 you are compiling a kernel for the EBSA-110 or the LART however, the 1613 red LED will simply flash regularly to indicate that the system is 1614 still functional. It is safe to say Y here if you have a CATS 1615 system, but the driver will do nothing. 1616 1617config LEDS_TIMER 1618 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ 1619 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ 1620 || MACH_OMAP_PERSEUS2 1621 depends on LEDS 1622 depends on !GENERIC_CLOCKEVENTS 1623 default y if ARCH_EBSA110 1624 help 1625 If you say Y here, one of the system LEDs (the green one on the 1626 NetWinder, the amber one on the EBSA285, or the red one on the LART) 1627 will flash regularly to indicate that the system is still 1628 operational. This is mainly useful to kernel hackers who are 1629 debugging unstable kernels. 1630 1631 The LART uses the same LED for both Timer LED and CPU usage LED 1632 functions. You may choose to use both, but the Timer LED function 1633 will overrule the CPU usage LED. 1634 1635config LEDS_CPU 1636 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ 1637 !ARCH_OMAP) \ 1638 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ 1639 || MACH_OMAP_PERSEUS2 1640 depends on LEDS 1641 help 1642 If you say Y here, the red LED will be used to give a good real 1643 time indication of CPU usage, by lighting whenever the idle task 1644 is not currently executing. 1645 1646 The LART uses the same LED for both Timer LED and CPU usage LED 1647 functions. You may choose to use both, but the Timer LED function 1648 will overrule the CPU usage LED. 1649 1650config ALIGNMENT_TRAP 1651 bool 1652 depends on CPU_CP15_MMU 1653 default y if !ARCH_EBSA110 1654 select HAVE_PROC_CPU if PROC_FS 1655 help 1656 ARM processors cannot fetch/store information which is not 1657 naturally aligned on the bus, i.e., a 4 byte fetch must start at an 1658 address divisible by 4. On 32-bit ARM processors, these non-aligned 1659 fetch/store instructions will be emulated in software if you say 1660 here, which has a severe performance impact. This is necessary for 1661 correct operation of some network protocols. With an IP-only 1662 configuration it is safe to say N, otherwise say Y. 1663 1664config UACCESS_WITH_MEMCPY 1665 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" 1666 depends on MMU && EXPERIMENTAL 1667 default y if CPU_FEROCEON 1668 help 1669 Implement faster copy_to_user and clear_user methods for CPU 1670 cores where a 8-word STM instruction give significantly higher 1671 memory write throughput than a sequence of individual 32bit stores. 1672 1673 A possible side effect is a slight increase in scheduling latency 1674 between threads sharing the same address space if they invoke 1675 such copy operations with large buffers. 1676 1677 However, if the CPU data cache is using a write-allocate mode, 1678 this option is unlikely to provide any performance gain. 1679 1680config SECCOMP 1681 bool 1682 prompt "Enable seccomp to safely compute untrusted bytecode" 1683 ---help--- 1684 This kernel feature is useful for number crunching applications 1685 that may need to compute untrusted bytecode during their 1686 execution. By using pipes or other transports made available to 1687 the process as file descriptors supporting the read/write 1688 syscalls, it's possible to isolate those applications in 1689 their own address space using seccomp. Once seccomp is 1690 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled 1691 and the task is only allowed to execute a few safe syscalls 1692 defined by each seccomp mode. 1693 1694config CC_STACKPROTECTOR 1695 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" 1696 depends on EXPERIMENTAL 1697 help 1698 This option turns on the -fstack-protector GCC feature. This 1699 feature puts, at the beginning of functions, a canary value on 1700 the stack just before the return address, and validates 1701 the value just before actually returning. Stack based buffer 1702 overflows (that need to overwrite this return address) now also 1703 overwrite the canary, which gets detected and the attack is then 1704 neutralized via a kernel panic. 1705 This feature requires gcc version 4.2 or above. 1706 1707config DEPRECATED_PARAM_STRUCT 1708 bool "Provide old way to pass kernel parameters" 1709 help 1710 This was deprecated in 2001 and announced to live on for 5 years. 1711 Some old boot loaders still use this way. 1712 1713endmenu 1714 1715menu "Boot options" 1716 1717config USE_OF 1718 bool "Flattened Device Tree support" 1719 select OF 1720 select OF_EARLY_FLATTREE 1721 select IRQ_DOMAIN 1722 help 1723 Include support for flattened device tree machine descriptions. 1724 1725# Compressed boot loader in ROM. Yes, we really want to ask about 1726# TEXT and BSS so we preserve their values in the config files. 1727config ZBOOT_ROM_TEXT 1728 hex "Compressed ROM boot loader base address" 1729 default "0" 1730 help 1731 The physical address at which the ROM-able zImage is to be 1732 placed in the target. Platforms which normally make use of 1733 ROM-able zImage formats normally set this to a suitable 1734 value in their defconfig file. 1735 1736 If ZBOOT_ROM is not enabled, this has no effect. 1737 1738config ZBOOT_ROM_BSS 1739 hex "Compressed ROM boot loader BSS address" 1740 default "0" 1741 help 1742 The base address of an area of read/write memory in the target 1743 for the ROM-able zImage which must be available while the 1744 decompressor is running. It must be large enough to hold the 1745 entire decompressed kernel plus an additional 128 KiB. 1746 Platforms which normally make use of ROM-able zImage formats 1747 normally set this to a suitable value in their defconfig file. 1748 1749 If ZBOOT_ROM is not enabled, this has no effect. 1750 1751config ZBOOT_ROM 1752 bool "Compressed boot loader in ROM/flash" 1753 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS 1754 help 1755 Say Y here if you intend to execute your compressed kernel image 1756 (zImage) directly from ROM or flash. If unsure, say N. 1757 1758choice 1759 prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)" 1760 depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL 1761 default ZBOOT_ROM_NONE 1762 help 1763 Include experimental SD/MMC loading code in the ROM-able zImage. 1764 With this enabled it is possible to write the the ROM-able zImage 1765 kernel image to an MMC or SD card and boot the kernel straight 1766 from the reset vector. At reset the processor Mask ROM will load 1767 the first part of the the ROM-able zImage which in turn loads the 1768 rest the kernel image to RAM. 1769 1770config ZBOOT_ROM_NONE 1771 bool "No SD/MMC loader in zImage (EXPERIMENTAL)" 1772 help 1773 Do not load image from SD or MMC 1774 1775config ZBOOT_ROM_MMCIF 1776 bool "Include MMCIF loader in zImage (EXPERIMENTAL)" 1777 help 1778 Load image from MMCIF hardware block. 1779 1780config ZBOOT_ROM_SH_MOBILE_SDHI 1781 bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)" 1782 help 1783 Load image from SDHI hardware block 1784 1785endchoice 1786 1787config CMDLINE 1788 string "Default kernel command string" 1789 default "" 1790 help 1791 On some architectures (EBSA110 and CATS), there is currently no way 1792 for the boot loader to pass arguments to the kernel. For these 1793 architectures, you should supply some command-line options at build 1794 time by entering them here. As a minimum, you should specify the 1795 memory size and the root device (e.g., mem=64M root=/dev/nfs). 1796 1797choice 1798 prompt "Kernel command line type" if CMDLINE != "" 1799 default CMDLINE_FROM_BOOTLOADER 1800 1801config CMDLINE_FROM_BOOTLOADER 1802 bool "Use bootloader kernel arguments if available" 1803 help 1804 Uses the command-line options passed by the boot loader. If 1805 the boot loader doesn't provide any, the default kernel command 1806 string provided in CMDLINE will be used. 1807 1808config CMDLINE_EXTEND 1809 bool "Extend bootloader kernel arguments" 1810 help 1811 The command-line arguments provided by the boot loader will be 1812 appended to the default kernel command string. 1813 1814config CMDLINE_FORCE 1815 bool "Always use the default kernel command string" 1816 help 1817 Always use the default kernel command string, even if the boot 1818 loader passes other arguments to the kernel. 1819 This is useful if you cannot or don't want to change the 1820 command-line options your boot loader passes to the kernel. 1821endchoice 1822 1823config XIP_KERNEL 1824 bool "Kernel Execute-In-Place from ROM" 1825 depends on !ZBOOT_ROM 1826 help 1827 Execute-In-Place allows the kernel to run from non-volatile storage 1828 directly addressable by the CPU, such as NOR flash. This saves RAM 1829 space since the text section of the kernel is not loaded from flash 1830 to RAM. Read-write sections, such as the data section and stack, 1831 are still copied to RAM. The XIP kernel is not compressed since 1832 it has to run directly from flash, so it will take more space to 1833 store it. The flash address used to link the kernel object files, 1834 and for storing it, is configuration dependent. Therefore, if you 1835 say Y here, you must know the proper physical address where to 1836 store the kernel image depending on your own flash memory usage. 1837 1838 Also note that the make target becomes "make xipImage" rather than 1839 "make zImage" or "make Image". The final kernel binary to put in 1840 ROM memory will be arch/arm/boot/xipImage. 1841 1842 If unsure, say N. 1843 1844config XIP_PHYS_ADDR 1845 hex "XIP Kernel Physical Location" 1846 depends on XIP_KERNEL 1847 default "0x00080000" 1848 help 1849 This is the physical address in your flash memory the kernel will 1850 be linked for and stored to. This address is dependent on your 1851 own flash usage. 1852 1853config KEXEC 1854 bool "Kexec system call (EXPERIMENTAL)" 1855 depends on EXPERIMENTAL 1856 help 1857 kexec is a system call that implements the ability to shutdown your 1858 current kernel, and to start another kernel. It is like a reboot 1859 but it is independent of the system firmware. And like a reboot 1860 you can start any kernel with it, not just Linux. 1861 1862 It is an ongoing process to be certain the hardware in a machine 1863 is properly shutdown, so do not be surprised if this code does not 1864 initially work for you. It may help to enable device hotplugging 1865 support. 1866 1867config ATAGS_PROC 1868 bool "Export atags in procfs" 1869 depends on KEXEC 1870 default y 1871 help 1872 Should the atags used to boot the kernel be exported in an "atags" 1873 file in procfs. Useful with kexec. 1874 1875config CRASH_DUMP 1876 bool "Build kdump crash kernel (EXPERIMENTAL)" 1877 depends on EXPERIMENTAL 1878 help 1879 Generate crash dump after being started by kexec. This should 1880 be normally only set in special crash dump kernels which are 1881 loaded in the main kernel with kexec-tools into a specially 1882 reserved region and then later executed after a crash by 1883 kdump/kexec. The crash dump kernel must be compiled to a 1884 memory address not used by the main kernel 1885 1886 For more details see Documentation/kdump/kdump.txt 1887 1888config AUTO_ZRELADDR 1889 bool "Auto calculation of the decompressed kernel image address" 1890 depends on !ZBOOT_ROM && !ARCH_U300 1891 help 1892 ZRELADDR is the physical address where the decompressed kernel 1893 image will be placed. If AUTO_ZRELADDR is selected, the address 1894 will be determined at run-time by masking the current IP with 1895 0xf8000000. This assumes the zImage being placed in the first 128MB 1896 from start of memory. 1897 1898endmenu 1899 1900menu "CPU Power Management" 1901 1902if ARCH_HAS_CPUFREQ 1903 1904source "drivers/cpufreq/Kconfig" 1905 1906config CPU_FREQ_IMX 1907 tristate "CPUfreq driver for i.MX CPUs" 1908 depends on ARCH_MXC && CPU_FREQ 1909 help 1910 This enables the CPUfreq driver for i.MX CPUs. 1911 1912config CPU_FREQ_SA1100 1913 bool 1914 1915config CPU_FREQ_SA1110 1916 bool 1917 1918config CPU_FREQ_INTEGRATOR 1919 tristate "CPUfreq driver for ARM Integrator CPUs" 1920 depends on ARCH_INTEGRATOR && CPU_FREQ 1921 default y 1922 help 1923 This enables the CPUfreq driver for ARM Integrator CPUs. 1924 1925 For details, take a look at <file:Documentation/cpu-freq>. 1926 1927 If in doubt, say Y. 1928 1929config CPU_FREQ_PXA 1930 bool 1931 depends on CPU_FREQ && ARCH_PXA && PXA25x 1932 default y 1933 select CPU_FREQ_DEFAULT_GOV_USERSPACE 1934 1935config CPU_FREQ_S3C 1936 bool 1937 help 1938 Internal configuration node for common cpufreq on Samsung SoC 1939 1940config CPU_FREQ_S3C24XX 1941 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" 1942 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL 1943 select CPU_FREQ_S3C 1944 help 1945 This enables the CPUfreq driver for the Samsung S3C24XX family 1946 of CPUs. 1947 1948 For details, take a look at <file:Documentation/cpu-freq>. 1949 1950 If in doubt, say N. 1951 1952config CPU_FREQ_S3C24XX_PLL 1953 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" 1954 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL 1955 help 1956 Compile in support for changing the PLL frequency from the 1957 S3C24XX series CPUfreq driver. The PLL takes time to settle 1958 after a frequency change, so by default it is not enabled. 1959 1960 This also means that the PLL tables for the selected CPU(s) will 1961 be built which may increase the size of the kernel image. 1962 1963config CPU_FREQ_S3C24XX_DEBUG 1964 bool "Debug CPUfreq Samsung driver core" 1965 depends on CPU_FREQ_S3C24XX 1966 help 1967 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core 1968 1969config CPU_FREQ_S3C24XX_IODEBUG 1970 bool "Debug CPUfreq Samsung driver IO timing" 1971 depends on CPU_FREQ_S3C24XX 1972 help 1973 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core 1974 1975config CPU_FREQ_S3C24XX_DEBUGFS 1976 bool "Export debugfs for CPUFreq" 1977 depends on CPU_FREQ_S3C24XX && DEBUG_FS 1978 help 1979 Export status information via debugfs. 1980 1981endif 1982 1983source "drivers/cpuidle/Kconfig" 1984 1985endmenu 1986 1987menu "Floating point emulation" 1988 1989comment "At least one emulation must be selected" 1990 1991config FPE_NWFPE 1992 bool "NWFPE math emulation" 1993 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL 1994 ---help--- 1995 Say Y to include the NWFPE floating point emulator in the kernel. 1996 This is necessary to run most binaries. Linux does not currently 1997 support floating point hardware so you need to say Y here even if 1998 your machine has an FPA or floating point co-processor podule. 1999 2000 You may say N here if you are going to load the Acorn FPEmulator 2001 early in the bootup. 2002 2003config FPE_NWFPE_XP 2004 bool "Support extended precision" 2005 depends on FPE_NWFPE 2006 help 2007 Say Y to include 80-bit support in the kernel floating-point 2008 emulator. Otherwise, only 32 and 64-bit support is compiled in. 2009 Note that gcc does not generate 80-bit operations by default, 2010 so in most cases this option only enlarges the size of the 2011 floating point emulator without any good reason. 2012 2013 You almost surely want to say N here. 2014 2015config FPE_FASTFPE 2016 bool "FastFPE math emulation (EXPERIMENTAL)" 2017 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL 2018 ---help--- 2019 Say Y here to include the FAST floating point emulator in the kernel. 2020 This is an experimental much faster emulator which now also has full 2021 precision for the mantissa. It does not support any exceptions. 2022 It is very simple, and approximately 3-6 times faster than NWFPE. 2023 2024 It should be sufficient for most programs. It may be not suitable 2025 for scientific calculations, but you have to check this for yourself. 2026 If you do not feel you need a faster FP emulation you should better 2027 choose NWFPE. 2028 2029config VFP 2030 bool "VFP-format floating point maths" 2031 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON 2032 help 2033 Say Y to include VFP support code in the kernel. This is needed 2034 if your hardware includes a VFP unit. 2035 2036 Please see <file:Documentation/arm/VFP/release-notes.txt> for 2037 release notes and additional status information. 2038 2039 Say N if your target does not have VFP hardware. 2040 2041config VFPv3 2042 bool 2043 depends on VFP 2044 default y if CPU_V7 2045 2046config NEON 2047 bool "Advanced SIMD (NEON) Extension support" 2048 depends on VFPv3 && CPU_V7 2049 help 2050 Say Y to include support code for NEON, the ARMv7 Advanced SIMD 2051 Extension. 2052 2053endmenu 2054 2055menu "Userspace binary formats" 2056 2057source "fs/Kconfig.binfmt" 2058 2059config ARTHUR 2060 tristate "RISC OS personality" 2061 depends on !AEABI 2062 help 2063 Say Y here to include the kernel code necessary if you want to run 2064 Acorn RISC OS/Arthur binaries under Linux. This code is still very 2065 experimental; if this sounds frightening, say N and sleep in peace. 2066 You can also say M here to compile this support as a module (which 2067 will be called arthur). 2068 2069endmenu 2070 2071menu "Power management options" 2072 2073source "kernel/power/Kconfig" 2074 2075config ARCH_SUSPEND_POSSIBLE 2076 depends on !ARCH_S5P64X0 && !ARCH_S5PC100 2077 depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \ 2078 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE 2079 def_bool y 2080 2081config ARM_CPU_SUSPEND 2082 def_bool PM_SLEEP 2083 2084endmenu 2085 2086source "net/Kconfig" 2087 2088source "drivers/Kconfig" 2089 2090source "fs/Kconfig" 2091 2092source "arch/arm/Kconfig.debug" 2093 2094source "security/Kconfig" 2095 2096source "crypto/Kconfig" 2097 2098source "lib/Kconfig" 2099