1# 2# For a description of the syntax of this configuration file, 3# see Documentation/kbuild/kconfig-language.txt. 4# 5 6mainmenu "Linux Kernel Configuration" 7 8config ARM 9 bool 10 default y 11 select HAVE_AOUT 12 select HAVE_IDE 13 select HAVE_MEMBLOCK 14 select RTC_LIB 15 select SYS_SUPPORTS_APM_EMULATION 16 select GENERIC_ATOMIC64 if (!CPU_32v6K) 17 select HAVE_OPROFILE if (HAVE_PERF_EVENTS) 18 select HAVE_ARCH_KGDB 19 select HAVE_KPROBES if (!XIP_KERNEL) 20 select HAVE_KRETPROBES if (HAVE_KPROBES) 21 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) 22 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) 23 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) 24 select HAVE_GENERIC_DMA_COHERENT 25 select HAVE_KERNEL_GZIP 26 select HAVE_KERNEL_LZO 27 select HAVE_KERNEL_LZMA 28 select HAVE_IRQ_WORK 29 select HAVE_PERF_EVENTS 30 select PERF_USE_VMALLOC 31 select HAVE_REGS_AND_STACK_ACCESS_API 32 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7)) 33 help 34 The ARM series is a line of low-power-consumption RISC chip designs 35 licensed by ARM Ltd and targeted at embedded applications and 36 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer 37 manufactured, but legacy ARM-based PC hardware remains popular in 38 Europe. There is an ARM Linux project with a web page at 39 <http://www.arm.linux.org.uk/>. 40 41config HAVE_PWM 42 bool 43 44config SYS_SUPPORTS_APM_EMULATION 45 bool 46 47config GENERIC_GPIO 48 bool 49 50config ARCH_USES_GETTIMEOFFSET 51 bool 52 default n 53 54config GENERIC_CLOCKEVENTS 55 bool 56 57config GENERIC_CLOCKEVENTS_BROADCAST 58 bool 59 depends on GENERIC_CLOCKEVENTS 60 default y if SMP 61 62config HAVE_TCM 63 bool 64 select GENERIC_ALLOCATOR 65 66config HAVE_PROC_CPU 67 bool 68 69config NO_IOPORT 70 bool 71 72config EISA 73 bool 74 ---help--- 75 The Extended Industry Standard Architecture (EISA) bus was 76 developed as an open alternative to the IBM MicroChannel bus. 77 78 The EISA bus provided some of the features of the IBM MicroChannel 79 bus while maintaining backward compatibility with cards made for 80 the older ISA bus. The EISA bus saw limited use between 1988 and 81 1995 when it was made obsolete by the PCI bus. 82 83 Say Y here if you are building a kernel for an EISA-based machine. 84 85 Otherwise, say N. 86 87config SBUS 88 bool 89 90config MCA 91 bool 92 help 93 MicroChannel Architecture is found in some IBM PS/2 machines and 94 laptops. It is a bus system similar to PCI or ISA. See 95 <file:Documentation/mca.txt> (and especially the web page given 96 there) before attempting to build an MCA bus kernel. 97 98config GENERIC_HARDIRQS 99 bool 100 default y 101 102config STACKTRACE_SUPPORT 103 bool 104 default y 105 106config HAVE_LATENCYTOP_SUPPORT 107 bool 108 depends on !SMP 109 default y 110 111config LOCKDEP_SUPPORT 112 bool 113 default y 114 115config TRACE_IRQFLAGS_SUPPORT 116 bool 117 default y 118 119config HARDIRQS_SW_RESEND 120 bool 121 default y 122 123config GENERIC_IRQ_PROBE 124 bool 125 default y 126 127config GENERIC_LOCKBREAK 128 bool 129 default y 130 depends on SMP && PREEMPT 131 132config RWSEM_GENERIC_SPINLOCK 133 bool 134 default y 135 136config RWSEM_XCHGADD_ALGORITHM 137 bool 138 139config ARCH_HAS_ILOG2_U32 140 bool 141 142config ARCH_HAS_ILOG2_U64 143 bool 144 145config ARCH_HAS_CPUFREQ 146 bool 147 help 148 Internal node to signify that the ARCH has CPUFREQ support 149 and that the relevant menu configurations are displayed for 150 it. 151 152config ARCH_HAS_CPU_IDLE_WAIT 153 def_bool y 154 155config GENERIC_HWEIGHT 156 bool 157 default y 158 159config GENERIC_CALIBRATE_DELAY 160 bool 161 default y 162 163config ARCH_MAY_HAVE_PC_FDC 164 bool 165 166config ZONE_DMA 167 bool 168 169config NEED_DMA_MAP_STATE 170 def_bool y 171 172config GENERIC_ISA_DMA 173 bool 174 175config FIQ 176 bool 177 178config ARCH_MTD_XIP 179 bool 180 181config GENERIC_HARDIRQS_NO__DO_IRQ 182 def_bool y 183 184config ARM_L1_CACHE_SHIFT_6 185 bool 186 help 187 Setting ARM L1 cache line size to 64 Bytes. 188 189config VECTORS_BASE 190 hex 191 default 0xffff0000 if MMU || CPU_HIGH_VECTOR 192 default DRAM_BASE if REMAP_VECTORS_TO_RAM 193 default 0x00000000 194 help 195 The base address of exception vectors. 196 197source "init/Kconfig" 198 199source "kernel/Kconfig.freezer" 200 201menu "System Type" 202 203config MMU 204 bool "MMU-based Paged Memory Management Support" 205 default y 206 help 207 Select if you want MMU-based virtualised addressing space 208 support by paged memory management. If unsure, say 'Y'. 209 210# 211# The "ARM system type" choice list is ordered alphabetically by option 212# text. Please add new entries in the option alphabetic order. 213# 214choice 215 prompt "ARM system type" 216 default ARCH_VERSATILE 217 218config ARCH_AAEC2000 219 bool "Agilent AAEC-2000 based" 220 select CPU_ARM920T 221 select ARM_AMBA 222 select HAVE_CLK 223 select ARCH_USES_GETTIMEOFFSET 224 help 225 This enables support for systems based on the Agilent AAEC-2000 226 227config ARCH_INTEGRATOR 228 bool "ARM Ltd. Integrator family" 229 select ARM_AMBA 230 select ARCH_HAS_CPUFREQ 231 select COMMON_CLKDEV 232 select ICST 233 select GENERIC_CLOCKEVENTS 234 select PLAT_VERSATILE 235 help 236 Support for ARM's Integrator platform. 237 238config ARCH_REALVIEW 239 bool "ARM Ltd. RealView family" 240 select ARM_AMBA 241 select COMMON_CLKDEV 242 select ICST 243 select GENERIC_CLOCKEVENTS 244 select ARCH_WANT_OPTIONAL_GPIOLIB 245 select PLAT_VERSATILE 246 select ARM_TIMER_SP804 247 select GPIO_PL061 if GPIOLIB 248 help 249 This enables support for ARM Ltd RealView boards. 250 251config ARCH_VERSATILE 252 bool "ARM Ltd. Versatile family" 253 select ARM_AMBA 254 select ARM_VIC 255 select COMMON_CLKDEV 256 select ICST 257 select GENERIC_CLOCKEVENTS 258 select ARCH_WANT_OPTIONAL_GPIOLIB 259 select PLAT_VERSATILE 260 select ARM_TIMER_SP804 261 help 262 This enables support for ARM Ltd Versatile board. 263 264config ARCH_VEXPRESS 265 bool "ARM Ltd. Versatile Express family" 266 select ARCH_WANT_OPTIONAL_GPIOLIB 267 select ARM_AMBA 268 select ARM_TIMER_SP804 269 select COMMON_CLKDEV 270 select GENERIC_CLOCKEVENTS 271 select HAVE_CLK 272 select ICST 273 select PLAT_VERSATILE 274 help 275 This enables support for the ARM Ltd Versatile Express boards. 276 277config ARCH_AT91 278 bool "Atmel AT91" 279 select ARCH_REQUIRE_GPIOLIB 280 select HAVE_CLK 281 help 282 This enables support for systems based on the Atmel AT91RM9200, 283 AT91SAM9 and AT91CAP9 processors. 284 285config ARCH_BCMRING 286 bool "Broadcom BCMRING" 287 depends on MMU 288 select CPU_V6 289 select ARM_AMBA 290 select COMMON_CLKDEV 291 select GENERIC_CLOCKEVENTS 292 select ARCH_WANT_OPTIONAL_GPIOLIB 293 help 294 Support for Broadcom's BCMRing platform. 295 296config ARCH_CLPS711X 297 bool "Cirrus Logic CLPS711x/EP721x-based" 298 select CPU_ARM720T 299 select ARCH_USES_GETTIMEOFFSET 300 help 301 Support for Cirrus Logic 711x/721x based boards. 302 303config ARCH_CNS3XXX 304 bool "Cavium Networks CNS3XXX family" 305 select CPU_V6 306 select GENERIC_CLOCKEVENTS 307 select ARM_GIC 308 select PCI_DOMAINS if PCI 309 help 310 Support for Cavium Networks CNS3XXX platform. 311 312config ARCH_GEMINI 313 bool "Cortina Systems Gemini" 314 select CPU_FA526 315 select ARCH_REQUIRE_GPIOLIB 316 select ARCH_USES_GETTIMEOFFSET 317 help 318 Support for the Cortina Systems Gemini family SoCs 319 320config ARCH_EBSA110 321 bool "EBSA-110" 322 select CPU_SA110 323 select ISA 324 select NO_IOPORT 325 select ARCH_USES_GETTIMEOFFSET 326 help 327 This is an evaluation board for the StrongARM processor available 328 from Digital. It has limited hardware on-board, including an 329 Ethernet interface, two PCMCIA sockets, two serial ports and a 330 parallel port. 331 332config ARCH_EP93XX 333 bool "EP93xx-based" 334 select CPU_ARM920T 335 select ARM_AMBA 336 select ARM_VIC 337 select COMMON_CLKDEV 338 select ARCH_REQUIRE_GPIOLIB 339 select ARCH_HAS_HOLES_MEMORYMODEL 340 select ARCH_USES_GETTIMEOFFSET 341 help 342 This enables support for the Cirrus EP93xx series of CPUs. 343 344config ARCH_FOOTBRIDGE 345 bool "FootBridge" 346 select CPU_SA110 347 select FOOTBRIDGE 348 select ARCH_USES_GETTIMEOFFSET 349 help 350 Support for systems based on the DC21285 companion chip 351 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. 352 353config ARCH_MXC 354 bool "Freescale MXC/iMX-based" 355 select GENERIC_CLOCKEVENTS 356 select ARCH_REQUIRE_GPIOLIB 357 select COMMON_CLKDEV 358 help 359 Support for Freescale MXC/iMX-based family of processors 360 361config ARCH_STMP3XXX 362 bool "Freescale STMP3xxx" 363 select CPU_ARM926T 364 select COMMON_CLKDEV 365 select ARCH_REQUIRE_GPIOLIB 366 select GENERIC_CLOCKEVENTS 367 select USB_ARCH_HAS_EHCI 368 help 369 Support for systems based on the Freescale 3xxx CPUs. 370 371config ARCH_NETX 372 bool "Hilscher NetX based" 373 select CPU_ARM926T 374 select ARM_VIC 375 select GENERIC_CLOCKEVENTS 376 help 377 This enables support for systems based on the Hilscher NetX Soc 378 379config ARCH_H720X 380 bool "Hynix HMS720x-based" 381 select CPU_ARM720T 382 select ISA_DMA_API 383 select ARCH_USES_GETTIMEOFFSET 384 help 385 This enables support for systems based on the Hynix HMS720x 386 387config ARCH_IOP13XX 388 bool "IOP13xx-based" 389 depends on MMU 390 select CPU_XSC3 391 select PLAT_IOP 392 select PCI 393 select ARCH_SUPPORTS_MSI 394 select VMSPLIT_1G 395 help 396 Support for Intel's IOP13XX (XScale) family of processors. 397 398config ARCH_IOP32X 399 bool "IOP32x-based" 400 depends on MMU 401 select CPU_XSCALE 402 select PLAT_IOP 403 select PCI 404 select ARCH_REQUIRE_GPIOLIB 405 help 406 Support for Intel's 80219 and IOP32X (XScale) family of 407 processors. 408 409config ARCH_IOP33X 410 bool "IOP33x-based" 411 depends on MMU 412 select CPU_XSCALE 413 select PLAT_IOP 414 select PCI 415 select ARCH_REQUIRE_GPIOLIB 416 help 417 Support for Intel's IOP33X (XScale) family of processors. 418 419config ARCH_IXP23XX 420 bool "IXP23XX-based" 421 depends on MMU 422 select CPU_XSC3 423 select PCI 424 select ARCH_USES_GETTIMEOFFSET 425 help 426 Support for Intel's IXP23xx (XScale) family of processors. 427 428config ARCH_IXP2000 429 bool "IXP2400/2800-based" 430 depends on MMU 431 select CPU_XSCALE 432 select PCI 433 select ARCH_USES_GETTIMEOFFSET 434 help 435 Support for Intel's IXP2400/2800 (XScale) family of processors. 436 437config ARCH_IXP4XX 438 bool "IXP4xx-based" 439 depends on MMU 440 select CPU_XSCALE 441 select GENERIC_GPIO 442 select GENERIC_CLOCKEVENTS 443 select DMABOUNCE if PCI 444 help 445 Support for Intel's IXP4XX (XScale) family of processors. 446 447config ARCH_DOVE 448 bool "Marvell Dove" 449 select PCI 450 select ARCH_REQUIRE_GPIOLIB 451 select GENERIC_CLOCKEVENTS 452 select PLAT_ORION 453 help 454 Support for the Marvell Dove SoC 88AP510 455 456config ARCH_KIRKWOOD 457 bool "Marvell Kirkwood" 458 select CPU_FEROCEON 459 select PCI 460 select ARCH_REQUIRE_GPIOLIB 461 select GENERIC_CLOCKEVENTS 462 select PLAT_ORION 463 help 464 Support for the following Marvell Kirkwood series SoCs: 465 88F6180, 88F6192 and 88F6281. 466 467config ARCH_LOKI 468 bool "Marvell Loki (88RC8480)" 469 select CPU_FEROCEON 470 select GENERIC_CLOCKEVENTS 471 select PLAT_ORION 472 help 473 Support for the Marvell Loki (88RC8480) SoC. 474 475config ARCH_LPC32XX 476 bool "NXP LPC32XX" 477 select CPU_ARM926T 478 select ARCH_REQUIRE_GPIOLIB 479 select HAVE_IDE 480 select ARM_AMBA 481 select USB_ARCH_HAS_OHCI 482 select COMMON_CLKDEV 483 select GENERIC_TIME 484 select GENERIC_CLOCKEVENTS 485 help 486 Support for the NXP LPC32XX family of processors 487 488config ARCH_MV78XX0 489 bool "Marvell MV78xx0" 490 select CPU_FEROCEON 491 select PCI 492 select ARCH_REQUIRE_GPIOLIB 493 select GENERIC_CLOCKEVENTS 494 select PLAT_ORION 495 help 496 Support for the following Marvell MV78xx0 series SoCs: 497 MV781x0, MV782x0. 498 499config ARCH_ORION5X 500 bool "Marvell Orion" 501 depends on MMU 502 select CPU_FEROCEON 503 select PCI 504 select ARCH_REQUIRE_GPIOLIB 505 select GENERIC_CLOCKEVENTS 506 select PLAT_ORION 507 help 508 Support for the following Marvell Orion 5x series SoCs: 509 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), 510 Orion-2 (5281), Orion-1-90 (6183). 511 512config ARCH_MMP 513 bool "Marvell PXA168/910/MMP2" 514 depends on MMU 515 select ARCH_REQUIRE_GPIOLIB 516 select COMMON_CLKDEV 517 select GENERIC_CLOCKEVENTS 518 select TICK_ONESHOT 519 select PLAT_PXA 520 select SPARSE_IRQ 521 help 522 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. 523 524config ARCH_KS8695 525 bool "Micrel/Kendin KS8695" 526 select CPU_ARM922T 527 select ARCH_REQUIRE_GPIOLIB 528 select ARCH_USES_GETTIMEOFFSET 529 help 530 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based 531 System-on-Chip devices. 532 533config ARCH_NS9XXX 534 bool "NetSilicon NS9xxx" 535 select CPU_ARM926T 536 select GENERIC_GPIO 537 select GENERIC_CLOCKEVENTS 538 select HAVE_CLK 539 help 540 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx 541 System. 542 543 <http://www.digi.com/products/microprocessors/index.jsp> 544 545config ARCH_W90X900 546 bool "Nuvoton W90X900 CPU" 547 select CPU_ARM926T 548 select ARCH_REQUIRE_GPIOLIB 549 select COMMON_CLKDEV 550 select GENERIC_CLOCKEVENTS 551 help 552 Support for Nuvoton (Winbond logic dept.) ARM9 processor, 553 At present, the w90x900 has been renamed nuc900, regarding 554 the ARM series product line, you can login the following 555 link address to know more. 556 557 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ 558 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> 559 560config ARCH_NUC93X 561 bool "Nuvoton NUC93X CPU" 562 select CPU_ARM926T 563 select COMMON_CLKDEV 564 help 565 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a 566 low-power and high performance MPEG-4/JPEG multimedia controller chip. 567 568config ARCH_TEGRA 569 bool "NVIDIA Tegra" 570 select GENERIC_TIME 571 select GENERIC_CLOCKEVENTS 572 select GENERIC_GPIO 573 select HAVE_CLK 574 select COMMON_CLKDEV 575 select ARCH_HAS_BARRIERS if CACHE_L2X0 576 help 577 This enables support for NVIDIA Tegra based systems (Tegra APX, 578 Tegra 6xx and Tegra 2 series). 579 580config ARCH_PNX4008 581 bool "Philips Nexperia PNX4008 Mobile" 582 select CPU_ARM926T 583 select COMMON_CLKDEV 584 select ARCH_USES_GETTIMEOFFSET 585 help 586 This enables support for Philips PNX4008 mobile platform. 587 588config ARCH_PXA 589 bool "PXA2xx/PXA3xx-based" 590 depends on MMU 591 select ARCH_MTD_XIP 592 select ARCH_HAS_CPUFREQ 593 select COMMON_CLKDEV 594 select ARCH_REQUIRE_GPIOLIB 595 select GENERIC_CLOCKEVENTS 596 select TICK_ONESHOT 597 select PLAT_PXA 598 select SPARSE_IRQ 599 help 600 Support for Intel/Marvell's PXA2xx/PXA3xx processor line. 601 602config ARCH_MSM 603 bool "Qualcomm MSM" 604 select HAVE_CLK 605 select GENERIC_CLOCKEVENTS 606 select ARCH_REQUIRE_GPIOLIB 607 help 608 Support for Qualcomm MSM/QSD based systems. This runs on the 609 apps processor of the MSM/QSD and depends on a shared memory 610 interface to the modem processor which runs the baseband 611 stack and controls some vital subsystems 612 (clock and power control, etc). 613 614config ARCH_SHMOBILE 615 bool "Renesas SH-Mobile" 616 help 617 Support for Renesas's SH-Mobile ARM platforms 618 619config ARCH_RPC 620 bool "RiscPC" 621 select ARCH_ACORN 622 select FIQ 623 select TIMER_ACORN 624 select ARCH_MAY_HAVE_PC_FDC 625 select HAVE_PATA_PLATFORM 626 select ISA_DMA_API 627 select NO_IOPORT 628 select ARCH_SPARSEMEM_ENABLE 629 select ARCH_USES_GETTIMEOFFSET 630 help 631 On the Acorn Risc-PC, Linux can support the internal IDE disk and 632 CD-ROM interface, serial and parallel port, and the floppy drive. 633 634config ARCH_SA1100 635 bool "SA1100-based" 636 select CPU_SA1100 637 select ISA 638 select ARCH_SPARSEMEM_ENABLE 639 select ARCH_MTD_XIP 640 select ARCH_HAS_CPUFREQ 641 select CPU_FREQ 642 select GENERIC_CLOCKEVENTS 643 select HAVE_CLK 644 select TICK_ONESHOT 645 select ARCH_REQUIRE_GPIOLIB 646 help 647 Support for StrongARM 11x0 based boards. 648 649config ARCH_S3C2410 650 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" 651 select GENERIC_GPIO 652 select ARCH_HAS_CPUFREQ 653 select HAVE_CLK 654 select ARCH_USES_GETTIMEOFFSET 655 select HAVE_S3C2410_I2C 656 help 657 Samsung S3C2410X CPU based systems, such as the Simtec Electronics 658 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or 659 the Samsung SMDK2410 development board (and derivatives). 660 661 Note, the S3C2416 and the S3C2450 are so close that they even share 662 the same SoC ID code. This means that there is no seperate machine 663 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. 664 665config ARCH_S3C64XX 666 bool "Samsung S3C64XX" 667 select PLAT_SAMSUNG 668 select CPU_V6 669 select ARM_VIC 670 select HAVE_CLK 671 select NO_IOPORT 672 select ARCH_USES_GETTIMEOFFSET 673 select ARCH_HAS_CPUFREQ 674 select ARCH_REQUIRE_GPIOLIB 675 select SAMSUNG_CLKSRC 676 select SAMSUNG_IRQ_VIC_TIMER 677 select SAMSUNG_IRQ_UART 678 select S3C_GPIO_TRACK 679 select S3C_GPIO_PULL_UPDOWN 680 select S3C_GPIO_CFG_S3C24XX 681 select S3C_GPIO_CFG_S3C64XX 682 select S3C_DEV_NAND 683 select USB_ARCH_HAS_OHCI 684 select SAMSUNG_GPIOLIB_4BIT 685 select HAVE_S3C2410_I2C 686 select HAVE_S3C2410_WATCHDOG 687 help 688 Samsung S3C64XX series based systems 689 690config ARCH_S5P64X0 691 bool "Samsung S5P6440 S5P6450" 692 select CPU_V6 693 select GENERIC_GPIO 694 select HAVE_CLK 695 select HAVE_S3C2410_WATCHDOG 696 select ARCH_USES_GETTIMEOFFSET 697 select HAVE_S3C2410_I2C 698 select HAVE_S3C_RTC 699 help 700 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, 701 SMDK6450. 702 703config ARCH_S5P6442 704 bool "Samsung S5P6442" 705 select CPU_V6 706 select GENERIC_GPIO 707 select HAVE_CLK 708 select ARCH_USES_GETTIMEOFFSET 709 select HAVE_S3C2410_WATCHDOG 710 help 711 Samsung S5P6442 CPU based systems 712 713config ARCH_S5PC100 714 bool "Samsung S5PC100" 715 select GENERIC_GPIO 716 select HAVE_CLK 717 select CPU_V7 718 select ARM_L1_CACHE_SHIFT_6 719 select ARCH_USES_GETTIMEOFFSET 720 select HAVE_S3C2410_I2C 721 select HAVE_S3C_RTC 722 select HAVE_S3C2410_WATCHDOG 723 help 724 Samsung S5PC100 series based systems 725 726config ARCH_S5PV210 727 bool "Samsung S5PV210/S5PC110" 728 select CPU_V7 729 select GENERIC_GPIO 730 select HAVE_CLK 731 select ARM_L1_CACHE_SHIFT_6 732 select ARCH_USES_GETTIMEOFFSET 733 select HAVE_S3C2410_I2C 734 select HAVE_S3C_RTC 735 select HAVE_S3C2410_WATCHDOG 736 help 737 Samsung S5PV210/S5PC110 series based systems 738 739config ARCH_S5PV310 740 bool "Samsung S5PV310/S5PC210" 741 select CPU_V7 742 select GENERIC_GPIO 743 select HAVE_CLK 744 select GENERIC_CLOCKEVENTS 745 help 746 Samsung S5PV310 series based systems 747 748config ARCH_SHARK 749 bool "Shark" 750 select CPU_SA110 751 select ISA 752 select ISA_DMA 753 select ZONE_DMA 754 select PCI 755 select ARCH_USES_GETTIMEOFFSET 756 help 757 Support for the StrongARM based Digital DNARD machine, also known 758 as "Shark" (<http://www.shark-linux.de/shark.html>). 759 760config ARCH_TCC_926 761 bool "Telechips TCC ARM926-based systems" 762 select CPU_ARM926T 763 select HAVE_CLK 764 select COMMON_CLKDEV 765 select GENERIC_CLOCKEVENTS 766 help 767 Support for Telechips TCC ARM926-based systems. 768 769config ARCH_LH7A40X 770 bool "Sharp LH7A40X" 771 select CPU_ARM922T 772 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM 773 select ARCH_USES_GETTIMEOFFSET 774 help 775 Say Y here for systems based on one of the Sharp LH7A40X 776 System on a Chip processors. These CPUs include an ARM922T 777 core with a wide array of integrated devices for 778 hand-held and low-power applications. 779 780config ARCH_U300 781 bool "ST-Ericsson U300 Series" 782 depends on MMU 783 select CPU_ARM926T 784 select HAVE_TCM 785 select ARM_AMBA 786 select ARM_VIC 787 select GENERIC_CLOCKEVENTS 788 select COMMON_CLKDEV 789 select GENERIC_GPIO 790 help 791 Support for ST-Ericsson U300 series mobile platforms. 792 793config ARCH_U8500 794 bool "ST-Ericsson U8500 Series" 795 select CPU_V7 796 select ARM_AMBA 797 select GENERIC_CLOCKEVENTS 798 select COMMON_CLKDEV 799 select ARCH_REQUIRE_GPIOLIB 800 help 801 Support for ST-Ericsson's Ux500 architecture 802 803config ARCH_NOMADIK 804 bool "STMicroelectronics Nomadik" 805 select ARM_AMBA 806 select ARM_VIC 807 select CPU_ARM926T 808 select COMMON_CLKDEV 809 select GENERIC_CLOCKEVENTS 810 select ARCH_REQUIRE_GPIOLIB 811 help 812 Support for the Nomadik platform by ST-Ericsson 813 814config ARCH_DAVINCI 815 bool "TI DaVinci" 816 select GENERIC_CLOCKEVENTS 817 select ARCH_REQUIRE_GPIOLIB 818 select ZONE_DMA 819 select HAVE_IDE 820 select COMMON_CLKDEV 821 select GENERIC_ALLOCATOR 822 select ARCH_HAS_HOLES_MEMORYMODEL 823 help 824 Support for TI's DaVinci platform. 825 826config ARCH_OMAP 827 bool "TI OMAP" 828 select HAVE_CLK 829 select ARCH_REQUIRE_GPIOLIB 830 select ARCH_HAS_CPUFREQ 831 select GENERIC_CLOCKEVENTS 832 select ARCH_HAS_HOLES_MEMORYMODEL 833 help 834 Support for TI's OMAP platform (OMAP1 and OMAP2). 835 836config PLAT_SPEAR 837 bool "ST SPEAr" 838 select ARM_AMBA 839 select ARCH_REQUIRE_GPIOLIB 840 select COMMON_CLKDEV 841 select GENERIC_CLOCKEVENTS 842 select HAVE_CLK 843 help 844 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). 845 846endchoice 847 848# 849# This is sorted alphabetically by mach-* pathname. However, plat-* 850# Kconfigs may be included either alphabetically (according to the 851# plat- suffix) or along side the corresponding mach-* source. 852# 853source "arch/arm/mach-aaec2000/Kconfig" 854 855source "arch/arm/mach-at91/Kconfig" 856 857source "arch/arm/mach-bcmring/Kconfig" 858 859source "arch/arm/mach-clps711x/Kconfig" 860 861source "arch/arm/mach-cns3xxx/Kconfig" 862 863source "arch/arm/mach-davinci/Kconfig" 864 865source "arch/arm/mach-dove/Kconfig" 866 867source "arch/arm/mach-ep93xx/Kconfig" 868 869source "arch/arm/mach-footbridge/Kconfig" 870 871source "arch/arm/mach-gemini/Kconfig" 872 873source "arch/arm/mach-h720x/Kconfig" 874 875source "arch/arm/mach-integrator/Kconfig" 876 877source "arch/arm/mach-iop32x/Kconfig" 878 879source "arch/arm/mach-iop33x/Kconfig" 880 881source "arch/arm/mach-iop13xx/Kconfig" 882 883source "arch/arm/mach-ixp4xx/Kconfig" 884 885source "arch/arm/mach-ixp2000/Kconfig" 886 887source "arch/arm/mach-ixp23xx/Kconfig" 888 889source "arch/arm/mach-kirkwood/Kconfig" 890 891source "arch/arm/mach-ks8695/Kconfig" 892 893source "arch/arm/mach-lh7a40x/Kconfig" 894 895source "arch/arm/mach-loki/Kconfig" 896 897source "arch/arm/mach-lpc32xx/Kconfig" 898 899source "arch/arm/mach-msm/Kconfig" 900 901source "arch/arm/mach-mv78xx0/Kconfig" 902 903source "arch/arm/plat-mxc/Kconfig" 904 905source "arch/arm/mach-netx/Kconfig" 906 907source "arch/arm/mach-nomadik/Kconfig" 908source "arch/arm/plat-nomadik/Kconfig" 909 910source "arch/arm/mach-ns9xxx/Kconfig" 911 912source "arch/arm/mach-nuc93x/Kconfig" 913 914source "arch/arm/plat-omap/Kconfig" 915 916source "arch/arm/mach-omap1/Kconfig" 917 918source "arch/arm/mach-omap2/Kconfig" 919 920source "arch/arm/mach-orion5x/Kconfig" 921 922source "arch/arm/mach-pxa/Kconfig" 923source "arch/arm/plat-pxa/Kconfig" 924 925source "arch/arm/mach-mmp/Kconfig" 926 927source "arch/arm/mach-realview/Kconfig" 928 929source "arch/arm/mach-sa1100/Kconfig" 930 931source "arch/arm/plat-samsung/Kconfig" 932source "arch/arm/plat-s3c24xx/Kconfig" 933source "arch/arm/plat-s5p/Kconfig" 934 935source "arch/arm/plat-spear/Kconfig" 936 937source "arch/arm/plat-tcc/Kconfig" 938 939if ARCH_S3C2410 940source "arch/arm/mach-s3c2400/Kconfig" 941source "arch/arm/mach-s3c2410/Kconfig" 942source "arch/arm/mach-s3c2412/Kconfig" 943source "arch/arm/mach-s3c2416/Kconfig" 944source "arch/arm/mach-s3c2440/Kconfig" 945source "arch/arm/mach-s3c2443/Kconfig" 946endif 947 948if ARCH_S3C64XX 949source "arch/arm/mach-s3c64xx/Kconfig" 950endif 951 952source "arch/arm/mach-s5p64x0/Kconfig" 953 954source "arch/arm/mach-s5p6442/Kconfig" 955 956source "arch/arm/mach-s5pc100/Kconfig" 957 958source "arch/arm/mach-s5pv210/Kconfig" 959 960source "arch/arm/mach-s5pv310/Kconfig" 961 962source "arch/arm/mach-shmobile/Kconfig" 963 964source "arch/arm/plat-stmp3xxx/Kconfig" 965 966source "arch/arm/mach-tegra/Kconfig" 967 968source "arch/arm/mach-u300/Kconfig" 969 970source "arch/arm/mach-ux500/Kconfig" 971 972source "arch/arm/mach-versatile/Kconfig" 973 974source "arch/arm/mach-vexpress/Kconfig" 975 976source "arch/arm/mach-w90x900/Kconfig" 977 978# Definitions to make life easier 979config ARCH_ACORN 980 bool 981 982config PLAT_IOP 983 bool 984 select GENERIC_CLOCKEVENTS 985 986config PLAT_ORION 987 bool 988 989config PLAT_PXA 990 bool 991 992config PLAT_VERSATILE 993 bool 994 995config ARM_TIMER_SP804 996 bool 997 998source arch/arm/mm/Kconfig 999 1000config IWMMXT 1001 bool "Enable iWMMXt support" 1002 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK 1003 default y if PXA27x || PXA3xx || ARCH_MMP 1004 help 1005 Enable support for iWMMXt context switching at run time if 1006 running on a CPU that supports it. 1007 1008# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER 1009config XSCALE_PMU 1010 bool 1011 depends on CPU_XSCALE && !XSCALE_PMU_TIMER 1012 default y 1013 1014config CPU_HAS_PMU 1015 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \ 1016 (!ARCH_OMAP3 || OMAP3_EMU) 1017 default y 1018 bool 1019 1020if !MMU 1021source "arch/arm/Kconfig-nommu" 1022endif 1023 1024config ARM_ERRATA_411920 1025 bool "ARM errata: Invalidation of the Instruction Cache operation can fail" 1026 depends on CPU_V6 1027 help 1028 Invalidation of the Instruction Cache operation can 1029 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. 1030 It does not affect the MPCore. This option enables the ARM Ltd. 1031 recommended workaround. 1032 1033config ARM_ERRATA_430973 1034 bool "ARM errata: Stale prediction on replaced interworking branch" 1035 depends on CPU_V7 1036 help 1037 This option enables the workaround for the 430973 Cortex-A8 1038 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb 1039 interworking branch is replaced with another code sequence at the 1040 same virtual address, whether due to self-modifying code or virtual 1041 to physical address re-mapping, Cortex-A8 does not recover from the 1042 stale interworking branch prediction. This results in Cortex-A8 1043 executing the new code sequence in the incorrect ARM or Thumb state. 1044 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE 1045 and also flushes the branch target cache at every context switch. 1046 Note that setting specific bits in the ACTLR register may not be 1047 available in non-secure mode. 1048 1049config ARM_ERRATA_458693 1050 bool "ARM errata: Processor deadlock when a false hazard is created" 1051 depends on CPU_V7 1052 help 1053 This option enables the workaround for the 458693 Cortex-A8 (r2p0) 1054 erratum. For very specific sequences of memory operations, it is 1055 possible for a hazard condition intended for a cache line to instead 1056 be incorrectly associated with a different cache line. This false 1057 hazard might then cause a processor deadlock. The workaround enables 1058 the L1 caching of the NEON accesses and disables the PLD instruction 1059 in the ACTLR register. Note that setting specific bits in the ACTLR 1060 register may not be available in non-secure mode. 1061 1062config ARM_ERRATA_460075 1063 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" 1064 depends on CPU_V7 1065 help 1066 This option enables the workaround for the 460075 Cortex-A8 (r2p0) 1067 erratum. Any asynchronous access to the L2 cache may encounter a 1068 situation in which recent store transactions to the L2 cache are lost 1069 and overwritten with stale memory contents from external memory. The 1070 workaround disables the write-allocate mode for the L2 cache via the 1071 ACTLR register. Note that setting specific bits in the ACTLR register 1072 may not be available in non-secure mode. 1073 1074config ARM_ERRATA_742230 1075 bool "ARM errata: DMB operation may be faulty" 1076 depends on CPU_V7 && SMP 1077 help 1078 This option enables the workaround for the 742230 Cortex-A9 1079 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction 1080 between two write operations may not ensure the correct visibility 1081 ordering of the two writes. This workaround sets a specific bit in 1082 the diagnostic register of the Cortex-A9 which causes the DMB 1083 instruction to behave as a DSB, ensuring the correct behaviour of 1084 the two writes. 1085 1086config ARM_ERRATA_742231 1087 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" 1088 depends on CPU_V7 && SMP 1089 help 1090 This option enables the workaround for the 742231 Cortex-A9 1091 (r2p0..r2p2) erratum. Under certain conditions, specific to the 1092 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, 1093 accessing some data located in the same cache line, may get corrupted 1094 data due to bad handling of the address hazard when the line gets 1095 replaced from one of the CPUs at the same time as another CPU is 1096 accessing it. This workaround sets specific bits in the diagnostic 1097 register of the Cortex-A9 which reduces the linefill issuing 1098 capabilities of the processor. 1099 1100config PL310_ERRATA_588369 1101 bool "Clean & Invalidate maintenance operations do not invalidate clean lines" 1102 depends on CACHE_L2X0 && ARCH_OMAP4 1103 help 1104 The PL310 L2 cache controller implements three types of Clean & 1105 Invalidate maintenance operations: by Physical Address 1106 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). 1107 They are architecturally defined to behave as the execution of a 1108 clean operation followed immediately by an invalidate operation, 1109 both performing to the same memory location. This functionality 1110 is not correctly implemented in PL310 as clean lines are not 1111 invalidated as a result of these operations. Note that this errata 1112 uses Texas Instrument's secure monitor api. 1113 1114config ARM_ERRATA_720789 1115 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" 1116 depends on CPU_V7 && SMP 1117 help 1118 This option enables the workaround for the 720789 Cortex-A9 (prior to 1119 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the 1120 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. 1121 As a consequence of this erratum, some TLB entries which should be 1122 invalidated are not, resulting in an incoherency in the system page 1123 tables. The workaround changes the TLB flushing routines to invalidate 1124 entries regardless of the ASID. 1125 1126config ARM_ERRATA_743622 1127 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" 1128 depends on CPU_V7 1129 help 1130 This option enables the workaround for the 743622 Cortex-A9 1131 (r2p0..r2p2) erratum. Under very rare conditions, a faulty 1132 optimisation in the Cortex-A9 Store Buffer may lead to data 1133 corruption. This workaround sets a specific bit in the diagnostic 1134 register of the Cortex-A9 which disables the Store Buffer 1135 optimisation, preventing the defect from occurring. This has no 1136 visible impact on the overall performance or power consumption of the 1137 processor. 1138 1139endmenu 1140 1141source "arch/arm/common/Kconfig" 1142 1143menu "Bus support" 1144 1145config ARM_AMBA 1146 bool 1147 1148config ISA 1149 bool 1150 help 1151 Find out whether you have ISA slots on your motherboard. ISA is the 1152 name of a bus system, i.e. the way the CPU talks to the other stuff 1153 inside your box. Other bus systems are PCI, EISA, MicroChannel 1154 (MCA) or VESA. ISA is an older system, now being displaced by PCI; 1155 newer boards don't support it. If you have ISA, say Y, otherwise N. 1156 1157# Select ISA DMA controller support 1158config ISA_DMA 1159 bool 1160 select ISA_DMA_API 1161 1162# Select ISA DMA interface 1163config ISA_DMA_API 1164 bool 1165 1166config PCI 1167 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX 1168 help 1169 Find out whether you have a PCI motherboard. PCI is the name of a 1170 bus system, i.e. the way the CPU talks to the other stuff inside 1171 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or 1172 VESA. If you have PCI, say Y, otherwise N. 1173 1174config PCI_DOMAINS 1175 bool 1176 depends on PCI 1177 1178config PCI_SYSCALL 1179 def_bool PCI 1180 1181# Select the host bridge type 1182config PCI_HOST_VIA82C505 1183 bool 1184 depends on PCI && ARCH_SHARK 1185 default y 1186 1187config PCI_HOST_ITE8152 1188 bool 1189 depends on PCI && MACH_ARMCORE 1190 default y 1191 select DMABOUNCE 1192 1193source "drivers/pci/Kconfig" 1194 1195source "drivers/pcmcia/Kconfig" 1196 1197endmenu 1198 1199menu "Kernel Features" 1200 1201source "kernel/time/Kconfig" 1202 1203config SMP 1204 bool "Symmetric Multi-Processing (EXPERIMENTAL)" 1205 depends on EXPERIMENTAL 1206 depends on GENERIC_CLOCKEVENTS 1207 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ 1208 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\ 1209 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 1210 select USE_GENERIC_SMP_HELPERS 1211 select HAVE_ARM_SCU 1212 help 1213 This enables support for systems with more than one CPU. If you have 1214 a system with only one CPU, like most personal computers, say N. If 1215 you have a system with more than one CPU, say Y. 1216 1217 If you say N here, the kernel will run on single and multiprocessor 1218 machines, but will use only one CPU of a multiprocessor machine. If 1219 you say Y here, the kernel will run on many, but not all, single 1220 processor machines. On a single processor machine, the kernel will 1221 run faster if you say N here. 1222 1223 See also <file:Documentation/i386/IO-APIC.txt>, 1224 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at 1225 <http://www.linuxdoc.org/docs.html#howto>. 1226 1227 If you don't know what to do here, say N. 1228 1229config SMP_ON_UP 1230 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" 1231 depends on EXPERIMENTAL 1232 depends on SMP && !XIP && !THUMB2_KERNEL 1233 default y 1234 help 1235 SMP kernels contain instructions which fail on non-SMP processors. 1236 Enabling this option allows the kernel to modify itself to make 1237 these instructions safe. Disabling it allows about 1K of space 1238 savings. 1239 1240 If you don't know what to do here, say Y. 1241 1242config HAVE_ARM_SCU 1243 bool 1244 depends on SMP 1245 help 1246 This option enables support for the ARM system coherency unit 1247 1248config HAVE_ARM_TWD 1249 bool 1250 depends on SMP 1251 help 1252 This options enables support for the ARM timer and watchdog unit 1253 1254choice 1255 prompt "Memory split" 1256 default VMSPLIT_3G 1257 help 1258 Select the desired split between kernel and user memory. 1259 1260 If you are not absolutely sure what you are doing, leave this 1261 option alone! 1262 1263 config VMSPLIT_3G 1264 bool "3G/1G user/kernel split" 1265 config VMSPLIT_2G 1266 bool "2G/2G user/kernel split" 1267 config VMSPLIT_1G 1268 bool "1G/3G user/kernel split" 1269endchoice 1270 1271config PAGE_OFFSET 1272 hex 1273 default 0x40000000 if VMSPLIT_1G 1274 default 0x80000000 if VMSPLIT_2G 1275 default 0xC0000000 1276 1277config NR_CPUS 1278 int "Maximum number of CPUs (2-32)" 1279 range 2 32 1280 depends on SMP 1281 default "4" 1282 1283config HOTPLUG_CPU 1284 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" 1285 depends on SMP && HOTPLUG && EXPERIMENTAL 1286 help 1287 Say Y here to experiment with turning CPUs off and on. CPUs 1288 can be controlled through /sys/devices/system/cpu. 1289 1290config LOCAL_TIMERS 1291 bool "Use local timer interrupts" 1292 depends on SMP 1293 default y 1294 select HAVE_ARM_TWD 1295 help 1296 Enable support for local timers on SMP platforms, rather then the 1297 legacy IPI broadcast method. Local timers allows the system 1298 accounting to be spread across the timer interval, preventing a 1299 "thundering herd" at every timer tick. 1300 1301source kernel/Kconfig.preempt 1302 1303config HZ 1304 int 1305 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ 1306 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310 1307 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER 1308 default AT91_TIMER_HZ if ARCH_AT91 1309 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE 1310 default 100 1311 1312config THUMB2_KERNEL 1313 bool "Compile the kernel in Thumb-2 mode" 1314 depends on CPU_V7 && EXPERIMENTAL 1315 select AEABI 1316 select ARM_ASM_UNIFIED 1317 help 1318 By enabling this option, the kernel will be compiled in 1319 Thumb-2 mode. A compiler/assembler that understand the unified 1320 ARM-Thumb syntax is needed. 1321 1322 If unsure, say N. 1323 1324config ARM_ASM_UNIFIED 1325 bool 1326 1327config AEABI 1328 bool "Use the ARM EABI to compile the kernel" 1329 help 1330 This option allows for the kernel to be compiled using the latest 1331 ARM ABI (aka EABI). This is only useful if you are using a user 1332 space environment that is also compiled with EABI. 1333 1334 Since there are major incompatibilities between the legacy ABI and 1335 EABI, especially with regard to structure member alignment, this 1336 option also changes the kernel syscall calling convention to 1337 disambiguate both ABIs and allow for backward compatibility support 1338 (selected with CONFIG_OABI_COMPAT). 1339 1340 To use this you need GCC version 4.0.0 or later. 1341 1342config OABI_COMPAT 1343 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" 1344 depends on AEABI && EXPERIMENTAL 1345 default y 1346 help 1347 This option preserves the old syscall interface along with the 1348 new (ARM EABI) one. It also provides a compatibility layer to 1349 intercept syscalls that have structure arguments which layout 1350 in memory differs between the legacy ABI and the new ARM EABI 1351 (only for non "thumb" binaries). This option adds a tiny 1352 overhead to all syscalls and produces a slightly larger kernel. 1353 If you know you'll be using only pure EABI user space then you 1354 can say N here. If this option is not selected and you attempt 1355 to execute a legacy ABI binary then the result will be 1356 UNPREDICTABLE (in fact it can be predicted that it won't work 1357 at all). If in doubt say Y. 1358 1359config ARCH_HAS_HOLES_MEMORYMODEL 1360 bool 1361 1362config ARCH_SPARSEMEM_ENABLE 1363 bool 1364 1365config ARCH_SPARSEMEM_DEFAULT 1366 def_bool ARCH_SPARSEMEM_ENABLE 1367 1368config ARCH_SELECT_MEMORY_MODEL 1369 def_bool ARCH_SPARSEMEM_ENABLE 1370 1371config HIGHMEM 1372 bool "High Memory Support (EXPERIMENTAL)" 1373 depends on MMU && EXPERIMENTAL 1374 help 1375 The address space of ARM processors is only 4 Gigabytes large 1376 and it has to accommodate user address space, kernel address 1377 space as well as some memory mapped IO. That means that, if you 1378 have a large amount of physical memory and/or IO, not all of the 1379 memory can be "permanently mapped" by the kernel. The physical 1380 memory that is not permanently mapped is called "high memory". 1381 1382 Depending on the selected kernel/user memory split, minimum 1383 vmalloc space and actual amount of RAM, you may not need this 1384 option which should result in a slightly faster kernel. 1385 1386 If unsure, say n. 1387 1388config HIGHPTE 1389 bool "Allocate 2nd-level pagetables from highmem" 1390 depends on HIGHMEM 1391 depends on !OUTER_CACHE 1392 1393config HW_PERF_EVENTS 1394 bool "Enable hardware performance counter support for perf events" 1395 depends on PERF_EVENTS && CPU_HAS_PMU 1396 default y 1397 help 1398 Enable hardware performance counter support for perf events. If 1399 disabled, perf events will use software events only. 1400 1401config SPARSE_IRQ 1402 def_bool n 1403 help 1404 This enables support for sparse irqs. This is useful in general 1405 as most CPUs have a fairly sparse array of IRQ vectors, which 1406 the irq_desc then maps directly on to. Systems with a high 1407 number of off-chip IRQs will want to treat this as 1408 experimental until they have been independently verified. 1409 1410source "mm/Kconfig" 1411 1412config FORCE_MAX_ZONEORDER 1413 int "Maximum zone order" if ARCH_SHMOBILE 1414 range 11 64 if ARCH_SHMOBILE 1415 default "9" if SA1111 1416 default "11" 1417 help 1418 The kernel memory allocator divides physically contiguous memory 1419 blocks into "zones", where each zone is a power of two number of 1420 pages. This option selects the largest power of two that the kernel 1421 keeps in the memory allocator. If you need to allocate very large 1422 blocks of physically contiguous memory, then you may need to 1423 increase this value. 1424 1425 This config option is actually maximum order plus one. For example, 1426 a value of 11 means that the largest free memory block is 2^10 pages. 1427 1428config LEDS 1429 bool "Timer and CPU usage LEDs" 1430 depends on ARCH_CDB89712 || ARCH_EBSA110 || \ 1431 ARCH_EBSA285 || ARCH_INTEGRATOR || \ 1432 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ 1433 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ 1434 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ 1435 ARCH_AT91 || ARCH_DAVINCI || \ 1436 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW 1437 help 1438 If you say Y here, the LEDs on your machine will be used 1439 to provide useful information about your current system status. 1440 1441 If you are compiling a kernel for a NetWinder or EBSA-285, you will 1442 be able to select which LEDs are active using the options below. If 1443 you are compiling a kernel for the EBSA-110 or the LART however, the 1444 red LED will simply flash regularly to indicate that the system is 1445 still functional. It is safe to say Y here if you have a CATS 1446 system, but the driver will do nothing. 1447 1448config LEDS_TIMER 1449 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ 1450 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ 1451 || MACH_OMAP_PERSEUS2 1452 depends on LEDS 1453 depends on !GENERIC_CLOCKEVENTS 1454 default y if ARCH_EBSA110 1455 help 1456 If you say Y here, one of the system LEDs (the green one on the 1457 NetWinder, the amber one on the EBSA285, or the red one on the LART) 1458 will flash regularly to indicate that the system is still 1459 operational. This is mainly useful to kernel hackers who are 1460 debugging unstable kernels. 1461 1462 The LART uses the same LED for both Timer LED and CPU usage LED 1463 functions. You may choose to use both, but the Timer LED function 1464 will overrule the CPU usage LED. 1465 1466config LEDS_CPU 1467 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ 1468 !ARCH_OMAP) \ 1469 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ 1470 || MACH_OMAP_PERSEUS2 1471 depends on LEDS 1472 help 1473 If you say Y here, the red LED will be used to give a good real 1474 time indication of CPU usage, by lighting whenever the idle task 1475 is not currently executing. 1476 1477 The LART uses the same LED for both Timer LED and CPU usage LED 1478 functions. You may choose to use both, but the Timer LED function 1479 will overrule the CPU usage LED. 1480 1481config ALIGNMENT_TRAP 1482 bool 1483 depends on CPU_CP15_MMU 1484 default y if !ARCH_EBSA110 1485 select HAVE_PROC_CPU if PROC_FS 1486 help 1487 ARM processors cannot fetch/store information which is not 1488 naturally aligned on the bus, i.e., a 4 byte fetch must start at an 1489 address divisible by 4. On 32-bit ARM processors, these non-aligned 1490 fetch/store instructions will be emulated in software if you say 1491 here, which has a severe performance impact. This is necessary for 1492 correct operation of some network protocols. With an IP-only 1493 configuration it is safe to say N, otherwise say Y. 1494 1495config UACCESS_WITH_MEMCPY 1496 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" 1497 depends on MMU && EXPERIMENTAL 1498 default y if CPU_FEROCEON 1499 help 1500 Implement faster copy_to_user and clear_user methods for CPU 1501 cores where a 8-word STM instruction give significantly higher 1502 memory write throughput than a sequence of individual 32bit stores. 1503 1504 A possible side effect is a slight increase in scheduling latency 1505 between threads sharing the same address space if they invoke 1506 such copy operations with large buffers. 1507 1508 However, if the CPU data cache is using a write-allocate mode, 1509 this option is unlikely to provide any performance gain. 1510 1511config SECCOMP 1512 bool 1513 prompt "Enable seccomp to safely compute untrusted bytecode" 1514 ---help--- 1515 This kernel feature is useful for number crunching applications 1516 that may need to compute untrusted bytecode during their 1517 execution. By using pipes or other transports made available to 1518 the process as file descriptors supporting the read/write 1519 syscalls, it's possible to isolate those applications in 1520 their own address space using seccomp. Once seccomp is 1521 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled 1522 and the task is only allowed to execute a few safe syscalls 1523 defined by each seccomp mode. 1524 1525config CC_STACKPROTECTOR 1526 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" 1527 help 1528 This option turns on the -fstack-protector GCC feature. This 1529 feature puts, at the beginning of functions, a canary value on 1530 the stack just before the return address, and validates 1531 the value just before actually returning. Stack based buffer 1532 overflows (that need to overwrite this return address) now also 1533 overwrite the canary, which gets detected and the attack is then 1534 neutralized via a kernel panic. 1535 This feature requires gcc version 4.2 or above. 1536 1537config DEPRECATED_PARAM_STRUCT 1538 bool "Provide old way to pass kernel parameters" 1539 help 1540 This was deprecated in 2001 and announced to live on for 5 years. 1541 Some old boot loaders still use this way. 1542 1543endmenu 1544 1545menu "Boot options" 1546 1547# Compressed boot loader in ROM. Yes, we really want to ask about 1548# TEXT and BSS so we preserve their values in the config files. 1549config ZBOOT_ROM_TEXT 1550 hex "Compressed ROM boot loader base address" 1551 default "0" 1552 help 1553 The physical address at which the ROM-able zImage is to be 1554 placed in the target. Platforms which normally make use of 1555 ROM-able zImage formats normally set this to a suitable 1556 value in their defconfig file. 1557 1558 If ZBOOT_ROM is not enabled, this has no effect. 1559 1560config ZBOOT_ROM_BSS 1561 hex "Compressed ROM boot loader BSS address" 1562 default "0" 1563 help 1564 The base address of an area of read/write memory in the target 1565 for the ROM-able zImage which must be available while the 1566 decompressor is running. It must be large enough to hold the 1567 entire decompressed kernel plus an additional 128 KiB. 1568 Platforms which normally make use of ROM-able zImage formats 1569 normally set this to a suitable value in their defconfig file. 1570 1571 If ZBOOT_ROM is not enabled, this has no effect. 1572 1573config ZBOOT_ROM 1574 bool "Compressed boot loader in ROM/flash" 1575 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS 1576 help 1577 Say Y here if you intend to execute your compressed kernel image 1578 (zImage) directly from ROM or flash. If unsure, say N. 1579 1580config CMDLINE 1581 string "Default kernel command string" 1582 default "" 1583 help 1584 On some architectures (EBSA110 and CATS), there is currently no way 1585 for the boot loader to pass arguments to the kernel. For these 1586 architectures, you should supply some command-line options at build 1587 time by entering them here. As a minimum, you should specify the 1588 memory size and the root device (e.g., mem=64M root=/dev/nfs). 1589 1590config CMDLINE_FORCE 1591 bool "Always use the default kernel command string" 1592 depends on CMDLINE != "" 1593 help 1594 Always use the default kernel command string, even if the boot 1595 loader passes other arguments to the kernel. 1596 This is useful if you cannot or don't want to change the 1597 command-line options your boot loader passes to the kernel. 1598 1599 If unsure, say N. 1600 1601config XIP_KERNEL 1602 bool "Kernel Execute-In-Place from ROM" 1603 depends on !ZBOOT_ROM 1604 help 1605 Execute-In-Place allows the kernel to run from non-volatile storage 1606 directly addressable by the CPU, such as NOR flash. This saves RAM 1607 space since the text section of the kernel is not loaded from flash 1608 to RAM. Read-write sections, such as the data section and stack, 1609 are still copied to RAM. The XIP kernel is not compressed since 1610 it has to run directly from flash, so it will take more space to 1611 store it. The flash address used to link the kernel object files, 1612 and for storing it, is configuration dependent. Therefore, if you 1613 say Y here, you must know the proper physical address where to 1614 store the kernel image depending on your own flash memory usage. 1615 1616 Also note that the make target becomes "make xipImage" rather than 1617 "make zImage" or "make Image". The final kernel binary to put in 1618 ROM memory will be arch/arm/boot/xipImage. 1619 1620 If unsure, say N. 1621 1622config XIP_PHYS_ADDR 1623 hex "XIP Kernel Physical Location" 1624 depends on XIP_KERNEL 1625 default "0x00080000" 1626 help 1627 This is the physical address in your flash memory the kernel will 1628 be linked for and stored to. This address is dependent on your 1629 own flash usage. 1630 1631config KEXEC 1632 bool "Kexec system call (EXPERIMENTAL)" 1633 depends on EXPERIMENTAL 1634 help 1635 kexec is a system call that implements the ability to shutdown your 1636 current kernel, and to start another kernel. It is like a reboot 1637 but it is independent of the system firmware. And like a reboot 1638 you can start any kernel with it, not just Linux. 1639 1640 It is an ongoing process to be certain the hardware in a machine 1641 is properly shutdown, so do not be surprised if this code does not 1642 initially work for you. It may help to enable device hotplugging 1643 support. 1644 1645config ATAGS_PROC 1646 bool "Export atags in procfs" 1647 depends on KEXEC 1648 default y 1649 help 1650 Should the atags used to boot the kernel be exported in an "atags" 1651 file in procfs. Useful with kexec. 1652 1653config AUTO_ZRELADDR 1654 bool "Auto calculation of the decompressed kernel image address" 1655 depends on !ZBOOT_ROM && !ARCH_U300 1656 help 1657 ZRELADDR is the physical address where the decompressed kernel 1658 image will be placed. If AUTO_ZRELADDR is selected, the address 1659 will be determined at run-time by masking the current IP with 1660 0xf8000000. This assumes the zImage being placed in the first 128MB 1661 from start of memory. 1662 1663endmenu 1664 1665menu "CPU Power Management" 1666 1667if ARCH_HAS_CPUFREQ 1668 1669source "drivers/cpufreq/Kconfig" 1670 1671config CPU_FREQ_SA1100 1672 bool 1673 1674config CPU_FREQ_SA1110 1675 bool 1676 1677config CPU_FREQ_INTEGRATOR 1678 tristate "CPUfreq driver for ARM Integrator CPUs" 1679 depends on ARCH_INTEGRATOR && CPU_FREQ 1680 default y 1681 help 1682 This enables the CPUfreq driver for ARM Integrator CPUs. 1683 1684 For details, take a look at <file:Documentation/cpu-freq>. 1685 1686 If in doubt, say Y. 1687 1688config CPU_FREQ_PXA 1689 bool 1690 depends on CPU_FREQ && ARCH_PXA && PXA25x 1691 default y 1692 select CPU_FREQ_DEFAULT_GOV_USERSPACE 1693 1694config CPU_FREQ_S3C64XX 1695 bool "CPUfreq support for Samsung S3C64XX CPUs" 1696 depends on CPU_FREQ && CPU_S3C6410 1697 1698config CPU_FREQ_S3C 1699 bool 1700 help 1701 Internal configuration node for common cpufreq on Samsung SoC 1702 1703config CPU_FREQ_S3C24XX 1704 bool "CPUfreq driver for Samsung S3C24XX series CPUs" 1705 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL 1706 select CPU_FREQ_S3C 1707 help 1708 This enables the CPUfreq driver for the Samsung S3C24XX family 1709 of CPUs. 1710 1711 For details, take a look at <file:Documentation/cpu-freq>. 1712 1713 If in doubt, say N. 1714 1715config CPU_FREQ_S3C24XX_PLL 1716 bool "Support CPUfreq changing of PLL frequency" 1717 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL 1718 help 1719 Compile in support for changing the PLL frequency from the 1720 S3C24XX series CPUfreq driver. The PLL takes time to settle 1721 after a frequency change, so by default it is not enabled. 1722 1723 This also means that the PLL tables for the selected CPU(s) will 1724 be built which may increase the size of the kernel image. 1725 1726config CPU_FREQ_S3C24XX_DEBUG 1727 bool "Debug CPUfreq Samsung driver core" 1728 depends on CPU_FREQ_S3C24XX 1729 help 1730 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core 1731 1732config CPU_FREQ_S3C24XX_IODEBUG 1733 bool "Debug CPUfreq Samsung driver IO timing" 1734 depends on CPU_FREQ_S3C24XX 1735 help 1736 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core 1737 1738config CPU_FREQ_S3C24XX_DEBUGFS 1739 bool "Export debugfs for CPUFreq" 1740 depends on CPU_FREQ_S3C24XX && DEBUG_FS 1741 help 1742 Export status information via debugfs. 1743 1744endif 1745 1746source "drivers/cpuidle/Kconfig" 1747 1748endmenu 1749 1750menu "Floating point emulation" 1751 1752comment "At least one emulation must be selected" 1753 1754config FPE_NWFPE 1755 bool "NWFPE math emulation" 1756 depends on !AEABI || OABI_COMPAT 1757 ---help--- 1758 Say Y to include the NWFPE floating point emulator in the kernel. 1759 This is necessary to run most binaries. Linux does not currently 1760 support floating point hardware so you need to say Y here even if 1761 your machine has an FPA or floating point co-processor podule. 1762 1763 You may say N here if you are going to load the Acorn FPEmulator 1764 early in the bootup. 1765 1766config FPE_NWFPE_XP 1767 bool "Support extended precision" 1768 depends on FPE_NWFPE 1769 help 1770 Say Y to include 80-bit support in the kernel floating-point 1771 emulator. Otherwise, only 32 and 64-bit support is compiled in. 1772 Note that gcc does not generate 80-bit operations by default, 1773 so in most cases this option only enlarges the size of the 1774 floating point emulator without any good reason. 1775 1776 You almost surely want to say N here. 1777 1778config FPE_FASTFPE 1779 bool "FastFPE math emulation (EXPERIMENTAL)" 1780 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL 1781 ---help--- 1782 Say Y here to include the FAST floating point emulator in the kernel. 1783 This is an experimental much faster emulator which now also has full 1784 precision for the mantissa. It does not support any exceptions. 1785 It is very simple, and approximately 3-6 times faster than NWFPE. 1786 1787 It should be sufficient for most programs. It may be not suitable 1788 for scientific calculations, but you have to check this for yourself. 1789 If you do not feel you need a faster FP emulation you should better 1790 choose NWFPE. 1791 1792config VFP 1793 bool "VFP-format floating point maths" 1794 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON 1795 help 1796 Say Y to include VFP support code in the kernel. This is needed 1797 if your hardware includes a VFP unit. 1798 1799 Please see <file:Documentation/arm/VFP/release-notes.txt> for 1800 release notes and additional status information. 1801 1802 Say N if your target does not have VFP hardware. 1803 1804config VFPv3 1805 bool 1806 depends on VFP 1807 default y if CPU_V7 1808 1809config NEON 1810 bool "Advanced SIMD (NEON) Extension support" 1811 depends on VFPv3 && CPU_V7 1812 help 1813 Say Y to include support code for NEON, the ARMv7 Advanced SIMD 1814 Extension. 1815 1816endmenu 1817 1818menu "Userspace binary formats" 1819 1820source "fs/Kconfig.binfmt" 1821 1822config ARTHUR 1823 tristate "RISC OS personality" 1824 depends on !AEABI 1825 help 1826 Say Y here to include the kernel code necessary if you want to run 1827 Acorn RISC OS/Arthur binaries under Linux. This code is still very 1828 experimental; if this sounds frightening, say N and sleep in peace. 1829 You can also say M here to compile this support as a module (which 1830 will be called arthur). 1831 1832endmenu 1833 1834menu "Power management options" 1835 1836source "kernel/power/Kconfig" 1837 1838config ARCH_SUSPEND_POSSIBLE 1839 def_bool y 1840 1841endmenu 1842 1843source "net/Kconfig" 1844 1845source "drivers/Kconfig" 1846 1847source "fs/Kconfig" 1848 1849source "arch/arm/Kconfig.debug" 1850 1851source "security/Kconfig" 1852 1853source "crypto/Kconfig" 1854 1855source "lib/Kconfig" 1856