11da177e4SLinus Torvaldsconfig ARM 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 47563bbf8SMark Brown select ARCH_HAVE_CUSTOM_GPIO_H 5e17c6d56SDavid Woodhouse select HAVE_AOUT 624056f52SRussell King select HAVE_DMA_API_DEBUG 7d0ee9f40SArnd Bergmann select HAVE_IDE if PCI || ISA || PCMCIA 82dc6a016SMarek Szyprowski select HAVE_DMA_ATTRS 9c7909509SMarek Szyprowski select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7) 102778f620SRussell King select HAVE_MEMBLOCK 1112b824fbSAlessandro Zummo select RTC_LIB 1275e7153aSRalf Baechle select SYS_SUPPORTS_APM_EMULATION 13a41297a0SRussell King select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI) 14*7463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 15fe166148SWill Deacon select HAVE_OPROFILE if (HAVE_PERF_EVENTS) 1609f05d85SRabin Vincent select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL 175cbad0ebSJason Wessel select HAVE_ARCH_KGDB 180693bf68SWade Farnsworth select HAVE_ARCH_TRACEHOOK 19856bc356SJon Medhurst select HAVE_KPROBES if !XIP_KERNEL 209edddaa2SAnanth N Mavinakayanahalli select HAVE_KRETPROBES if (HAVE_KPROBES) 21606576ceSSteven Rostedt select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) 2280be7a7fSRabin Vincent select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) 2380be7a7fSRabin Vincent select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) 240e341af8SRabin Vincent select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) 25e39f5602SDavid Daney select ARCH_BINFMT_ELF_RANDOMIZE_PIE 261fe53268SDmitry Baryshkov select HAVE_GENERIC_DMA_COHERENT 27e7db7b42SAlbin Tonnerre select HAVE_KERNEL_GZIP 28e7db7b42SAlbin Tonnerre select HAVE_KERNEL_LZO 296e8699f7SAlbin Tonnerre select HAVE_KERNEL_LZMA 30a7f464f3SImre Kaloz select HAVE_KERNEL_XZ 31e360adbeSPeter Zijlstra select HAVE_IRQ_WORK 327ada189fSJamie Iles select HAVE_PERF_EVENTS 337ada189fSJamie Iles select PERF_USE_VMALLOC 34e513f8bfSWill Deacon select HAVE_REGS_AND_STACK_ACCESS_API 35e399b1a4SRussell King select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)) 36ed60453fSRabin Vincent select HAVE_C_RECORDMCOUNT 37e2a93eccSLennert Buytenhek select HAVE_GENERIC_HARDIRQS 3837e74bebSStephen Boyd select HARDIRQS_SW_RESEND 3937e74bebSStephen Boyd select GENERIC_IRQ_PROBE 4025a5662aSThomas Gleixner select GENERIC_IRQ_SHOW 41d4aa8b15SThomas Gleixner select GENERIC_IRQ_PROBE 42d4aa8b15SThomas Gleixner select HARDIRQS_SW_RESEND 431fb90263SSantosh Shilimkar select CPU_PM if (SUSPEND || CPU_IDLE) 44e5bfb72cSMichael S. Tsirkin select GENERIC_PCI_IOMAP 45e47b65b0SSam Ravnborg select HAVE_BPF_JIT 4684ec6d57SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 473d92a71aSAnna-Maria Gleixner select KTIME_SCALAR 483d92a71aSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS_BROADCAST if SMP 498c56cc8bSWill Deacon select GENERIC_STRNCPY_FROM_USER 508c56cc8bSWill Deacon select GENERIC_STRNLEN_USER 51b9a50f74SWill Deacon select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN 521da177e4SLinus Torvalds help 531da177e4SLinus Torvalds The ARM series is a line of low-power-consumption RISC chip designs 54f6c8965aSMartin Michlmayr licensed by ARM Ltd and targeted at embedded applications and 551da177e4SLinus Torvalds handhelds such as the Compaq IPAQ. ARM-based PCs are no longer 561da177e4SLinus Torvalds manufactured, but legacy ARM-based PC hardware remains popular in 571da177e4SLinus Torvalds Europe. There is an ARM Linux project with a web page at 581da177e4SLinus Torvalds <http://www.arm.linux.org.uk/>. 591da177e4SLinus Torvalds 6074facffeSRussell Kingconfig ARM_HAS_SG_CHAIN 6174facffeSRussell King bool 6274facffeSRussell King 634ce63fcdSMarek Szyprowskiconfig NEED_SG_DMA_LENGTH 644ce63fcdSMarek Szyprowski bool 654ce63fcdSMarek Szyprowski 664ce63fcdSMarek Szyprowskiconfig ARM_DMA_USE_IOMMU 674ce63fcdSMarek Szyprowski select NEED_SG_DMA_LENGTH 684ce63fcdSMarek Szyprowski select ARM_HAS_SG_CHAIN 694ce63fcdSMarek Szyprowski bool 704ce63fcdSMarek Szyprowski 711a189b97SRussell Kingconfig HAVE_PWM 721a189b97SRussell King bool 731a189b97SRussell King 740b05da72SHans Ulli Krollconfig MIGHT_HAVE_PCI 750b05da72SHans Ulli Kroll bool 760b05da72SHans Ulli Kroll 7775e7153aSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 7875e7153aSRalf Baechle bool 7975e7153aSRalf Baechle 800a938b97SDavid Brownellconfig GENERIC_GPIO 810a938b97SDavid Brownell bool 820a938b97SDavid Brownell 83bc581770SLinus Walleijconfig HAVE_TCM 84bc581770SLinus Walleij bool 85bc581770SLinus Walleij select GENERIC_ALLOCATOR 86bc581770SLinus Walleij 87e119bfffSRussell Kingconfig HAVE_PROC_CPU 88e119bfffSRussell King bool 89e119bfffSRussell King 905ea81769SAl Viroconfig NO_IOPORT 915ea81769SAl Viro bool 925ea81769SAl Viro 931da177e4SLinus Torvaldsconfig EISA 941da177e4SLinus Torvalds bool 951da177e4SLinus Torvalds ---help--- 961da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 971da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 981da177e4SLinus Torvalds 991da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 1001da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 1011da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 1021da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 1031da177e4SLinus Torvalds 1041da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 1051da177e4SLinus Torvalds 1061da177e4SLinus Torvalds Otherwise, say N. 1071da177e4SLinus Torvalds 1081da177e4SLinus Torvaldsconfig SBUS 1091da177e4SLinus Torvalds bool 1101da177e4SLinus Torvalds 111f16fb1ecSRussell Kingconfig STACKTRACE_SUPPORT 112f16fb1ecSRussell King bool 113f16fb1ecSRussell King default y 114f16fb1ecSRussell King 115f76e9154SNicolas Pitreconfig HAVE_LATENCYTOP_SUPPORT 116f76e9154SNicolas Pitre bool 117f76e9154SNicolas Pitre depends on !SMP 118f76e9154SNicolas Pitre default y 119f76e9154SNicolas Pitre 120f16fb1ecSRussell Kingconfig LOCKDEP_SUPPORT 121f16fb1ecSRussell King bool 122f16fb1ecSRussell King default y 123f16fb1ecSRussell King 1247ad1bcb2SRussell Kingconfig TRACE_IRQFLAGS_SUPPORT 1257ad1bcb2SRussell King bool 1267ad1bcb2SRussell King default y 1277ad1bcb2SRussell King 12895c354feSNick Pigginconfig GENERIC_LOCKBREAK 12995c354feSNick Piggin bool 13095c354feSNick Piggin default y 13195c354feSNick Piggin depends on SMP && PREEMPT 13295c354feSNick Piggin 1331da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 1341da177e4SLinus Torvalds bool 1351da177e4SLinus Torvalds default y 1361da177e4SLinus Torvalds 1371da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 1381da177e4SLinus Torvalds bool 1391da177e4SLinus Torvalds 140f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 141f0d1b0b3SDavid Howells bool 142f0d1b0b3SDavid Howells 143f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 144f0d1b0b3SDavid Howells bool 145f0d1b0b3SDavid Howells 14689c52ed4SBen Dooksconfig ARCH_HAS_CPUFREQ 14789c52ed4SBen Dooks bool 14889c52ed4SBen Dooks help 14989c52ed4SBen Dooks Internal node to signify that the ARCH has CPUFREQ support 15089c52ed4SBen Dooks and that the relevant menu configurations are displayed for 15189c52ed4SBen Dooks it. 15289c52ed4SBen Dooks 153b89c3b16SAkinobu Mitaconfig GENERIC_HWEIGHT 154b89c3b16SAkinobu Mita bool 155b89c3b16SAkinobu Mita default y 156b89c3b16SAkinobu Mita 1571da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 1581da177e4SLinus Torvalds bool 1591da177e4SLinus Torvalds default y 1601da177e4SLinus Torvalds 161a08b6b79Sviro@ZenIV.linux.org.ukconfig ARCH_MAY_HAVE_PC_FDC 162a08b6b79Sviro@ZenIV.linux.org.uk bool 163a08b6b79Sviro@ZenIV.linux.org.uk 1645ac6da66SChristoph Lameterconfig ZONE_DMA 1655ac6da66SChristoph Lameter bool 1665ac6da66SChristoph Lameter 167ccd7ab7fSFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 168ccd7ab7fSFUJITA Tomonori def_bool y 169ccd7ab7fSFUJITA Tomonori 17058af4a24SRob Herringconfig ARCH_HAS_DMA_SET_COHERENT_MASK 17158af4a24SRob Herring bool 17258af4a24SRob Herring 1731da177e4SLinus Torvaldsconfig GENERIC_ISA_DMA 1741da177e4SLinus Torvalds bool 1751da177e4SLinus Torvalds 1761da177e4SLinus Torvaldsconfig FIQ 1771da177e4SLinus Torvalds bool 1781da177e4SLinus Torvalds 17913a5045dSRob Herringconfig NEED_RET_TO_USER 18013a5045dSRob Herring bool 18113a5045dSRob Herring 182034d2f5aSAl Viroconfig ARCH_MTD_XIP 183034d2f5aSAl Viro bool 184034d2f5aSAl Viro 185c760fc19SHyok S. Choiconfig VECTORS_BASE 186c760fc19SHyok S. Choi hex 1876afd6faeSHyok S. Choi default 0xffff0000 if MMU || CPU_HIGH_VECTOR 188c760fc19SHyok S. Choi default DRAM_BASE if REMAP_VECTORS_TO_RAM 189c760fc19SHyok S. Choi default 0x00000000 190c760fc19SHyok S. Choi help 191c760fc19SHyok S. Choi The base address of exception vectors. 192c760fc19SHyok S. Choi 193dc21af99SRussell Kingconfig ARM_PATCH_PHYS_VIRT 194c1becedcSRussell King bool "Patch physical to virtual translations at runtime" if EMBEDDED 195c1becedcSRussell King default y 196b511d75dSNicolas Pitre depends on !XIP_KERNEL && MMU 197dc21af99SRussell King depends on !ARCH_REALVIEW || !SPARSEMEM 198dc21af99SRussell King help 199111e9a5cSRussell King Patch phys-to-virt and virt-to-phys translation functions at 200111e9a5cSRussell King boot and module load time according to the position of the 201111e9a5cSRussell King kernel in system memory. 202dc21af99SRussell King 203111e9a5cSRussell King This can only be used with non-XIP MMU kernels where the base 204daece596SNicolas Pitre of physical memory is at a 16MB boundary. 205dc21af99SRussell King 206c1becedcSRussell King Only disable this option if you know that you do not require 207c1becedcSRussell King this feature (eg, building a kernel for a single machine) and 208c1becedcSRussell King you need to shrink the kernel to the minimal size. 209c1becedcSRussell King 210c334bc15SRob Herringconfig NEED_MACH_IO_H 211c334bc15SRob Herring bool 212c334bc15SRob Herring help 213c334bc15SRob Herring Select this when mach/io.h is required to provide special 214c334bc15SRob Herring definitions for this platform. The need for mach/io.h should 215c334bc15SRob Herring be avoided when possible. 216c334bc15SRob Herring 2170cdc8b92SNicolas Pitreconfig NEED_MACH_MEMORY_H 2181b9f95f8SNicolas Pitre bool 219111e9a5cSRussell King help 2200cdc8b92SNicolas Pitre Select this when mach/memory.h is required to provide special 2210cdc8b92SNicolas Pitre definitions for this platform. The need for mach/memory.h should 2220cdc8b92SNicolas Pitre be avoided when possible. 2231b9f95f8SNicolas Pitre 2241b9f95f8SNicolas Pitreconfig PHYS_OFFSET 225974c0724SNicolas Pitre hex "Physical address of main memory" if MMU 2260cdc8b92SNicolas Pitre depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H 227974c0724SNicolas Pitre default DRAM_BASE if !MMU 2281b9f95f8SNicolas Pitre help 2291b9f95f8SNicolas Pitre Please provide the physical address corresponding to the 2301b9f95f8SNicolas Pitre location of main memory in your system. 231cada3c08SRussell King 23287e040b6SSimon Glassconfig GENERIC_BUG 23387e040b6SSimon Glass def_bool y 23487e040b6SSimon Glass depends on BUG 23587e040b6SSimon Glass 2361da177e4SLinus Torvaldssource "init/Kconfig" 2371da177e4SLinus Torvalds 238dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 239dc52ddc0SMatt Helsley 2401da177e4SLinus Torvaldsmenu "System Type" 2411da177e4SLinus Torvalds 2423c427975SHyok S. Choiconfig MMU 2433c427975SHyok S. Choi bool "MMU-based Paged Memory Management Support" 2443c427975SHyok S. Choi default y 2453c427975SHyok S. Choi help 2463c427975SHyok S. Choi Select if you want MMU-based virtualised addressing space 2473c427975SHyok S. Choi support by paged memory management. If unsure, say 'Y'. 2483c427975SHyok S. Choi 249ccf50e23SRussell King# 250ccf50e23SRussell King# The "ARM system type" choice list is ordered alphabetically by option 251ccf50e23SRussell King# text. Please add new entries in the option alphabetic order. 252ccf50e23SRussell King# 2531da177e4SLinus Torvaldschoice 2541da177e4SLinus Torvalds prompt "ARM system type" 2556a0e2430SCatalin Marinas default ARCH_VERSATILE 2561da177e4SLinus Torvalds 25766314223SDinh Nguyenconfig ARCH_SOCFPGA 25866314223SDinh Nguyen bool "Altera SOCFPGA family" 25966314223SDinh Nguyen select ARCH_WANT_OPTIONAL_GPIOLIB 26066314223SDinh Nguyen select ARM_AMBA 26166314223SDinh Nguyen select ARM_GIC 26266314223SDinh Nguyen select CACHE_L2X0 26366314223SDinh Nguyen select CLKDEV_LOOKUP 26466314223SDinh Nguyen select COMMON_CLK 26566314223SDinh Nguyen select CPU_V7 26666314223SDinh Nguyen select DW_APB_TIMER 26766314223SDinh Nguyen select DW_APB_TIMER_OF 26866314223SDinh Nguyen select GENERIC_CLOCKEVENTS 26966314223SDinh Nguyen select GPIO_PL061 if GPIOLIB 27066314223SDinh Nguyen select HAVE_ARM_SCU 27166314223SDinh Nguyen select SPARSE_IRQ 27266314223SDinh Nguyen select USE_OF 27366314223SDinh Nguyen help 27466314223SDinh Nguyen This enables support for Altera SOCFPGA Cyclone V platform 27566314223SDinh Nguyen 2764af6fee1SDeepak Saxenaconfig ARCH_INTEGRATOR 2774af6fee1SDeepak Saxena bool "ARM Ltd. Integrator family" 2784af6fee1SDeepak Saxena select ARM_AMBA 27989c52ed4SBen Dooks select ARCH_HAS_CPUFREQ 280a613163dSLinus Walleij select COMMON_CLK 281a613163dSLinus Walleij select CLK_VERSATILE 2829904f793SLinus Walleij select HAVE_TCM 283c5a0adb5SRussell King select ICST 28413edd86dSRussell King select GENERIC_CLOCKEVENTS 285f4b8b319SRussell King select PLAT_VERSATILE 286c41b16f8SRussell King select PLAT_VERSATILE_FPGA_IRQ 287c334bc15SRob Herring select NEED_MACH_IO_H 2880cdc8b92SNicolas Pitre select NEED_MACH_MEMORY_H 289695436e3SLinus Walleij select SPARSE_IRQ 2903108e6abSLinus Walleij select MULTI_IRQ_HANDLER 2914af6fee1SDeepak Saxena help 2924af6fee1SDeepak Saxena Support for ARM's Integrator platform. 2934af6fee1SDeepak Saxena 2944af6fee1SDeepak Saxenaconfig ARCH_REALVIEW 2954af6fee1SDeepak Saxena bool "ARM Ltd. RealView family" 2964af6fee1SDeepak Saxena select ARM_AMBA 2976d803ba7SJean-Christop PLAGNIOL-VILLARD select CLKDEV_LOOKUP 298aa3831cfSKyungmin Park select HAVE_MACH_CLKDEV 299c5a0adb5SRussell King select ICST 300ae30ceacSCatalin Marinas select GENERIC_CLOCKEVENTS 301eb7fffa3SRussell King select ARCH_WANT_OPTIONAL_GPIOLIB 302f4b8b319SRussell King select PLAT_VERSATILE 30356a34b03SPawel Moll select PLAT_VERSATILE_CLOCK 3043cb5ee49SRussell King select PLAT_VERSATILE_CLCD 305e3887714SRussell King select ARM_TIMER_SP804 306b56ba8aaSColin Tuckley select GPIO_PL061 if GPIOLIB 3070cdc8b92SNicolas Pitre select NEED_MACH_MEMORY_H 3084af6fee1SDeepak Saxena help 3094af6fee1SDeepak Saxena This enables support for ARM Ltd RealView boards. 3104af6fee1SDeepak Saxena 3114af6fee1SDeepak Saxenaconfig ARCH_VERSATILE 3124af6fee1SDeepak Saxena bool "ARM Ltd. Versatile family" 3134af6fee1SDeepak Saxena select ARM_AMBA 3144af6fee1SDeepak Saxena select ARM_VIC 3156d803ba7SJean-Christop PLAGNIOL-VILLARD select CLKDEV_LOOKUP 316aa3831cfSKyungmin Park select HAVE_MACH_CLKDEV 317c5a0adb5SRussell King select ICST 31889df1272SKevin Hilman select GENERIC_CLOCKEVENTS 319bbeddc43SRussell King select ARCH_WANT_OPTIONAL_GPIOLIB 3209b0f7e39SArnd Bergmann select NEED_MACH_IO_H if PCI 321f4b8b319SRussell King select PLAT_VERSATILE 32256a34b03SPawel Moll select PLAT_VERSATILE_CLOCK 3233414ba8cSRussell King select PLAT_VERSATILE_CLCD 324c41b16f8SRussell King select PLAT_VERSATILE_FPGA_IRQ 325e3887714SRussell King select ARM_TIMER_SP804 3264af6fee1SDeepak Saxena help 3274af6fee1SDeepak Saxena This enables support for ARM Ltd Versatile board. 3284af6fee1SDeepak Saxena 329ceade897SRussell Kingconfig ARCH_VEXPRESS 330ceade897SRussell King bool "ARM Ltd. Versatile Express family" 331ceade897SRussell King select ARCH_WANT_OPTIONAL_GPIOLIB 332ceade897SRussell King select ARM_AMBA 333ceade897SRussell King select ARM_TIMER_SP804 3346d803ba7SJean-Christop PLAGNIOL-VILLARD select CLKDEV_LOOKUP 335d1b8a775SPawel Moll select COMMON_CLK 336ceade897SRussell King select GENERIC_CLOCKEVENTS 337ceade897SRussell King select HAVE_CLK 33895c34f83SNick Bowler select HAVE_PATA_PLATFORM 339ceade897SRussell King select ICST 340ba81f502SRussell King select NO_IOPORT 341ceade897SRussell King select PLAT_VERSATILE 3420fb44b91SRussell King select PLAT_VERSATILE_CLCD 343b2a54ff0SPawel Moll select REGULATOR_FIXED_VOLTAGE if REGULATOR 344ceade897SRussell King help 345ceade897SRussell King This enables support for the ARM Ltd Versatile Express boards. 346ceade897SRussell King 3478fc5ffa0SAndrew Victorconfig ARCH_AT91 3488fc5ffa0SAndrew Victor bool "Atmel AT91" 349f373e8c0SRyan Mallon select ARCH_REQUIRE_GPIOLIB 35093686ae8SDavid Brownell select HAVE_CLK 351bd602995SJean-Christophe PLAGNIOL-VILLARD select CLKDEV_LOOKUP 352e261501dSNicolas Ferre select IRQ_DOMAIN 3531ac02d79SRob Herring select NEED_MACH_IO_H if PCCARD 3544af6fee1SDeepak Saxena help 355929e994fSNicolas Ferre This enables support for systems based on Atmel 356929e994fSNicolas Ferre AT91RM9200 and AT91SAM9* processors. 3574af6fee1SDeepak Saxena 358ccf50e23SRussell Kingconfig ARCH_BCMRING 359ccf50e23SRussell King bool "Broadcom BCMRING" 360ccf50e23SRussell King depends on MMU 361ccf50e23SRussell King select CPU_V6 362ccf50e23SRussell King select ARM_AMBA 36382d63734SRussell King select ARM_TIMER_SP804 3646d803ba7SJean-Christop PLAGNIOL-VILLARD select CLKDEV_LOOKUP 365ccf50e23SRussell King select GENERIC_CLOCKEVENTS 366ccf50e23SRussell King select ARCH_WANT_OPTIONAL_GPIOLIB 367ccf50e23SRussell King help 368ccf50e23SRussell King Support for Broadcom's BCMRing platform. 369ccf50e23SRussell King 370220e6cf7SRob Herringconfig ARCH_HIGHBANK 371220e6cf7SRob Herring bool "Calxeda Highbank-based" 372220e6cf7SRob Herring select ARCH_WANT_OPTIONAL_GPIOLIB 373220e6cf7SRob Herring select ARM_AMBA 374220e6cf7SRob Herring select ARM_GIC 375220e6cf7SRob Herring select ARM_TIMER_SP804 37622d80379SDave Martin select CACHE_L2X0 377220e6cf7SRob Herring select CLKDEV_LOOKUP 3788d4d9f52SRob Herring select COMMON_CLK 379220e6cf7SRob Herring select CPU_V7 380220e6cf7SRob Herring select GENERIC_CLOCKEVENTS 381220e6cf7SRob Herring select HAVE_ARM_SCU 3823b55658aSDave Martin select HAVE_SMP 383fdfa64a4SRob Herring select SPARSE_IRQ 384220e6cf7SRob Herring select USE_OF 385220e6cf7SRob Herring help 386220e6cf7SRob Herring Support for the Calxeda Highbank SoC based boards. 387220e6cf7SRob Herring 3881da177e4SLinus Torvaldsconfig ARCH_CLPS711X 3890e2fce59SAlexander Shiyan bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" 390c750815eSRussell King select CPU_ARM720T 3915cfc8ee0SJohn Stultz select ARCH_USES_GETTIMEOFFSET 3920cdc8b92SNicolas Pitre select NEED_MACH_MEMORY_H 393f999b8bdSMartin Michlmayr help 3940e2fce59SAlexander Shiyan Support for Cirrus Logic 711x/721x/731x based boards. 3951da177e4SLinus Torvalds 396d94f944eSAnton Vorontsovconfig ARCH_CNS3XXX 397d94f944eSAnton Vorontsov bool "Cavium Networks CNS3XXX family" 39800d2711dSImre Kaloz select CPU_V6K 399d94f944eSAnton Vorontsov select GENERIC_CLOCKEVENTS 400d94f944eSAnton Vorontsov select ARM_GIC 401ce5ea9f3SDave Martin select MIGHT_HAVE_CACHE_L2X0 4020b05da72SHans Ulli Kroll select MIGHT_HAVE_PCI 4035f32f7a0SAnton Vorontsov select PCI_DOMAINS if PCI 404d94f944eSAnton Vorontsov help 405d94f944eSAnton Vorontsov Support for Cavium Networks CNS3XXX platform. 406d94f944eSAnton Vorontsov 407788c9700SRussell Kingconfig ARCH_GEMINI 408788c9700SRussell King bool "Cortina Systems Gemini" 409788c9700SRussell King select CPU_FA526 410788c9700SRussell King select ARCH_REQUIRE_GPIOLIB 4115cfc8ee0SJohn Stultz select ARCH_USES_GETTIMEOFFSET 412788c9700SRussell King help 413788c9700SRussell King Support for the Cortina Systems Gemini family SoCs 414788c9700SRussell King 4153a6cb8ceSArnd Bergmannconfig ARCH_PRIMA2 4163a6cb8ceSArnd Bergmann bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" 4173a6cb8ceSArnd Bergmann select CPU_V7 4183a6cb8ceSArnd Bergmann select NO_IOPORT 419f6387092SArnd Bergmann select ARCH_REQUIRE_GPIOLIB 4203a6cb8ceSArnd Bergmann select GENERIC_CLOCKEVENTS 4213a6cb8ceSArnd Bergmann select CLKDEV_LOOKUP 4223a6cb8ceSArnd Bergmann select GENERIC_IRQ_CHIP 423ce5ea9f3SDave Martin select MIGHT_HAVE_CACHE_L2X0 424cbd8d842SBarry Song select PINCTRL 425cbd8d842SBarry Song select PINCTRL_SIRF 4263a6cb8ceSArnd Bergmann select USE_OF 4273a6cb8ceSArnd Bergmann select ZONE_DMA 4283a6cb8ceSArnd Bergmann help 4293a6cb8ceSArnd Bergmann Support for CSR SiRFSoC ARM Cortex A9 Platform 4303a6cb8ceSArnd Bergmann 4311da177e4SLinus Torvaldsconfig ARCH_EBSA110 4321da177e4SLinus Torvalds bool "EBSA-110" 433c750815eSRussell King select CPU_SA110 434f7e68bbfSRussell King select ISA 435c5eb2a2bSRussell King select NO_IOPORT 4365cfc8ee0SJohn Stultz select ARCH_USES_GETTIMEOFFSET 437c334bc15SRob Herring select NEED_MACH_IO_H 4380cdc8b92SNicolas Pitre select NEED_MACH_MEMORY_H 4391da177e4SLinus Torvalds help 4401da177e4SLinus Torvalds This is an evaluation board for the StrongARM processor available 441f6c8965aSMartin Michlmayr from Digital. It has limited hardware on-board, including an 4421da177e4SLinus Torvalds Ethernet interface, two PCMCIA sockets, two serial ports and a 4431da177e4SLinus Torvalds parallel port. 4441da177e4SLinus Torvalds 445e7736d47SLennert Buytenhekconfig ARCH_EP93XX 446e7736d47SLennert Buytenhek bool "EP93xx-based" 447c750815eSRussell King select CPU_ARM920T 448e7736d47SLennert Buytenhek select ARM_AMBA 449e7736d47SLennert Buytenhek select ARM_VIC 4506d803ba7SJean-Christop PLAGNIOL-VILLARD select CLKDEV_LOOKUP 4517444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 452eb33575cSMel Gorman select ARCH_HAS_HOLES_MEMORYMODEL 4535cfc8ee0SJohn Stultz select ARCH_USES_GETTIMEOFFSET 4545725aeaeSArnd Bergmann select NEED_MACH_MEMORY_H 455e7736d47SLennert Buytenhek help 456e7736d47SLennert Buytenhek This enables support for the Cirrus EP93xx series of CPUs. 457e7736d47SLennert Buytenhek 4581da177e4SLinus Torvaldsconfig ARCH_FOOTBRIDGE 4591da177e4SLinus Torvalds bool "FootBridge" 460c750815eSRussell King select CPU_SA110 4611da177e4SLinus Torvalds select FOOTBRIDGE 4624e8d7637SRussell King select GENERIC_CLOCKEVENTS 463d0ee9f40SArnd Bergmann select HAVE_IDE 464c334bc15SRob Herring select NEED_MACH_IO_H 4650cdc8b92SNicolas Pitre select NEED_MACH_MEMORY_H 466f999b8bdSMartin Michlmayr help 467f999b8bdSMartin Michlmayr Support for systems based on the DC21285 companion chip 468f999b8bdSMartin Michlmayr ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. 4691da177e4SLinus Torvalds 470788c9700SRussell Kingconfig ARCH_MXC 471788c9700SRussell King bool "Freescale MXC/iMX-based" 472788c9700SRussell King select GENERIC_CLOCKEVENTS 473788c9700SRussell King select ARCH_REQUIRE_GPIOLIB 4746d803ba7SJean-Christop PLAGNIOL-VILLARD select CLKDEV_LOOKUP 475234b6cedSRussell King select CLKSRC_MMIO 4768b6c44f1SShawn Guo select GENERIC_IRQ_CHIP 477ffa2ea3fSSascha Hauer select MULTI_IRQ_HANDLER 4788842a9e2SShawn Guo select SPARSE_IRQ 4793e62af82SUwe Kleine-König select USE_OF 480788c9700SRussell King help 481788c9700SRussell King Support for Freescale MXC/iMX-based family of processors 482788c9700SRussell King 4831d3f33d5SShawn Guoconfig ARCH_MXS 4841d3f33d5SShawn Guo bool "Freescale MXS-based" 4851d3f33d5SShawn Guo select GENERIC_CLOCKEVENTS 4861d3f33d5SShawn Guo select ARCH_REQUIRE_GPIOLIB 487b9214b97SSascha Hauer select CLKDEV_LOOKUP 4885c61ddcfSRussell King select CLKSRC_MMIO 4892664681fSShawn Guo select COMMON_CLK 4906abda3e1SShawn Guo select HAVE_CLK_PREPARE 491a0f5e363SShawn Guo select PINCTRL 4926c4d4efbSShawn Guo select USE_OF 4931d3f33d5SShawn Guo help 4941d3f33d5SShawn Guo Support for Freescale MXS-based family of processors 4951d3f33d5SShawn Guo 4964af6fee1SDeepak Saxenaconfig ARCH_NETX 4974af6fee1SDeepak Saxena bool "Hilscher NetX based" 498234b6cedSRussell King select CLKSRC_MMIO 499c750815eSRussell King select CPU_ARM926T 5004af6fee1SDeepak Saxena select ARM_VIC 5012fcfe6b8SUwe Kleine-König select GENERIC_CLOCKEVENTS 502f999b8bdSMartin Michlmayr help 5034af6fee1SDeepak Saxena This enables support for systems based on the Hilscher NetX Soc 5044af6fee1SDeepak Saxena 5054af6fee1SDeepak Saxenaconfig ARCH_H720X 5064af6fee1SDeepak Saxena bool "Hynix HMS720x-based" 507c750815eSRussell King select CPU_ARM720T 5084af6fee1SDeepak Saxena select ISA_DMA_API 5095cfc8ee0SJohn Stultz select ARCH_USES_GETTIMEOFFSET 5104af6fee1SDeepak Saxena help 5114af6fee1SDeepak Saxena This enables support for systems based on the Hynix HMS720x 5124af6fee1SDeepak Saxena 5133b938be6SRussell Kingconfig ARCH_IOP13XX 5143b938be6SRussell King bool "IOP13xx-based" 5153b938be6SRussell King depends on MMU 516c750815eSRussell King select CPU_XSC3 5173b938be6SRussell King select PLAT_IOP 5183b938be6SRussell King select PCI 5193b938be6SRussell King select ARCH_SUPPORTS_MSI 5208d5796d2SLennert Buytenhek select VMSPLIT_1G 521c334bc15SRob Herring select NEED_MACH_IO_H 5220cdc8b92SNicolas Pitre select NEED_MACH_MEMORY_H 52313a5045dSRob Herring select NEED_RET_TO_USER 5243b938be6SRussell King help 5253b938be6SRussell King Support for Intel's IOP13XX (XScale) family of processors. 5263b938be6SRussell King 5273f7e5815SLennert Buytenhekconfig ARCH_IOP32X 5283f7e5815SLennert Buytenhek bool "IOP32x-based" 529a4f7e763SRussell King depends on MMU 530c750815eSRussell King select CPU_XSCALE 531c334bc15SRob Herring select NEED_MACH_IO_H 53213a5045dSRob Herring select NEED_RET_TO_USER 5337ae1f7ecSLennert Buytenhek select PLAT_IOP 534f7e68bbfSRussell King select PCI 535bb2b180cSRussell King select ARCH_REQUIRE_GPIOLIB 536f999b8bdSMartin Michlmayr help 5373f7e5815SLennert Buytenhek Support for Intel's 80219 and IOP32X (XScale) family of 5383f7e5815SLennert Buytenhek processors. 5393f7e5815SLennert Buytenhek 5403f7e5815SLennert Buytenhekconfig ARCH_IOP33X 5413f7e5815SLennert Buytenhek bool "IOP33x-based" 5423f7e5815SLennert Buytenhek depends on MMU 543c750815eSRussell King select CPU_XSCALE 544c334bc15SRob Herring select NEED_MACH_IO_H 54513a5045dSRob Herring select NEED_RET_TO_USER 5467ae1f7ecSLennert Buytenhek select PLAT_IOP 5473f7e5815SLennert Buytenhek select PCI 548bb2b180cSRussell King select ARCH_REQUIRE_GPIOLIB 5493f7e5815SLennert Buytenhek help 5503f7e5815SLennert Buytenhek Support for Intel's IOP33X (XScale) family of processors. 5511da177e4SLinus Torvalds 5523b938be6SRussell Kingconfig ARCH_IXP4XX 5533b938be6SRussell King bool "IXP4xx-based" 554a4f7e763SRussell King depends on MMU 55558af4a24SRob Herring select ARCH_HAS_DMA_SET_COHERENT_MASK 556234b6cedSRussell King select CLKSRC_MMIO 557c750815eSRussell King select CPU_XSCALE 5589dde0ae3SRichard Cochran select ARCH_REQUIRE_GPIOLIB 5593b938be6SRussell King select GENERIC_CLOCKEVENTS 5600b05da72SHans Ulli Kroll select MIGHT_HAVE_PCI 561c334bc15SRob Herring select NEED_MACH_IO_H 562485bdde7SRussell King select DMABOUNCE if PCI 563c4713074SLennert Buytenhek help 5643b938be6SRussell King Support for Intel's IXP4XX (XScale) family of processors. 565c4713074SLennert Buytenhek 5663e93a22bSGregory CLEMENTconfig ARCH_MVEBU 5673e93a22bSGregory CLEMENT bool "Marvell SOCs with Device Tree support" 5683e93a22bSGregory CLEMENT select GENERIC_CLOCKEVENTS 5693e93a22bSGregory CLEMENT select MULTI_IRQ_HANDLER 5703e93a22bSGregory CLEMENT select SPARSE_IRQ 5713e93a22bSGregory CLEMENT select CLKSRC_MMIO 5723e93a22bSGregory CLEMENT select GENERIC_IRQ_CHIP 5733e93a22bSGregory CLEMENT select IRQ_DOMAIN 5743e93a22bSGregory CLEMENT select COMMON_CLK 5753e93a22bSGregory CLEMENT help 5763e93a22bSGregory CLEMENT Support for the Marvell SoC Family with device tree support 5773e93a22bSGregory CLEMENT 578edabd38eSSaeed Bisharaconfig ARCH_DOVE 579edabd38eSSaeed Bishara bool "Marvell Dove" 5807b769bb3SKonstantin Porotchkin select CPU_V7 581edabd38eSSaeed Bishara select PCI 582edabd38eSSaeed Bishara select ARCH_REQUIRE_GPIOLIB 583edabd38eSSaeed Bishara select GENERIC_CLOCKEVENTS 584c334bc15SRob Herring select NEED_MACH_IO_H 585edabd38eSSaeed Bishara select PLAT_ORION 586edabd38eSSaeed Bishara help 587edabd38eSSaeed Bishara Support for the Marvell Dove SoC 88AP510 588edabd38eSSaeed Bishara 589651c74c7SSaeed Bisharaconfig ARCH_KIRKWOOD 590651c74c7SSaeed Bishara bool "Marvell Kirkwood" 591c750815eSRussell King select CPU_FEROCEON 592651c74c7SSaeed Bishara select PCI 593a8865655SErik Benada select ARCH_REQUIRE_GPIOLIB 594651c74c7SSaeed Bishara select GENERIC_CLOCKEVENTS 595c334bc15SRob Herring select NEED_MACH_IO_H 596651c74c7SSaeed Bishara select PLAT_ORION 597651c74c7SSaeed Bishara help 598651c74c7SSaeed Bishara Support for the following Marvell Kirkwood series SoCs: 599651c74c7SSaeed Bishara 88F6180, 88F6192 and 88F6281. 600651c74c7SSaeed Bishara 60140805949SKevin Wellsconfig ARCH_LPC32XX 60240805949SKevin Wells bool "NXP LPC32XX" 603234b6cedSRussell King select CLKSRC_MMIO 60440805949SKevin Wells select CPU_ARM926T 60540805949SKevin Wells select ARCH_REQUIRE_GPIOLIB 60640805949SKevin Wells select HAVE_IDE 60740805949SKevin Wells select ARM_AMBA 60840805949SKevin Wells select USB_ARCH_HAS_OHCI 6096d803ba7SJean-Christop PLAGNIOL-VILLARD select CLKDEV_LOOKUP 61040805949SKevin Wells select GENERIC_CLOCKEVENTS 611f5c42271SRoland Stigge select USE_OF 612c49a1830SAlexandre Pereira da Silva select HAVE_PWM 61340805949SKevin Wells help 61440805949SKevin Wells Support for the NXP LPC32XX family of processors 61540805949SKevin Wells 616788c9700SRussell Kingconfig ARCH_MV78XX0 617788c9700SRussell King bool "Marvell MV78xx0" 618788c9700SRussell King select CPU_FEROCEON 619788c9700SRussell King select PCI 620a8865655SErik Benada select ARCH_REQUIRE_GPIOLIB 621788c9700SRussell King select GENERIC_CLOCKEVENTS 622c334bc15SRob Herring select NEED_MACH_IO_H 623788c9700SRussell King select PLAT_ORION 624788c9700SRussell King help 625788c9700SRussell King Support for the following Marvell MV78xx0 series SoCs: 626788c9700SRussell King MV781x0, MV782x0. 627788c9700SRussell King 628788c9700SRussell Kingconfig ARCH_ORION5X 629788c9700SRussell King bool "Marvell Orion" 630788c9700SRussell King depends on MMU 631788c9700SRussell King select CPU_FEROCEON 632788c9700SRussell King select PCI 633a8865655SErik Benada select ARCH_REQUIRE_GPIOLIB 634788c9700SRussell King select GENERIC_CLOCKEVENTS 635b5e12229SAndrew Lunn select NEED_MACH_IO_H 636788c9700SRussell King select PLAT_ORION 637788c9700SRussell King help 638788c9700SRussell King Support for the following Marvell Orion 5x series SoCs: 639788c9700SRussell King Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), 640788c9700SRussell King Orion-2 (5281), Orion-1-90 (6183). 641788c9700SRussell King 642788c9700SRussell Kingconfig ARCH_MMP 6432f7e8faeSHaojian Zhuang bool "Marvell PXA168/910/MMP2" 644788c9700SRussell King depends on MMU 645788c9700SRussell King select ARCH_REQUIRE_GPIOLIB 6466d803ba7SJean-Christop PLAGNIOL-VILLARD select CLKDEV_LOOKUP 647788c9700SRussell King select GENERIC_CLOCKEVENTS 648157d2644SHaojian Zhuang select GPIO_PXA 649c24b3114SHaojian Zhuang select IRQ_DOMAIN 650788c9700SRussell King select PLAT_PXA 6510bd86961SHaojian Zhuang select SPARSE_IRQ 6523c7241bdSLeo Yan select GENERIC_ALLOCATOR 653788c9700SRussell King help 6542f7e8faeSHaojian Zhuang Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. 655788c9700SRussell King 656c53c9cf6SAndrew Victorconfig ARCH_KS8695 657c53c9cf6SAndrew Victor bool "Micrel/Kendin KS8695" 658c750815eSRussell King select CPU_ARM922T 65972880ad8SDaniel Silverstone select ARCH_REQUIRE_GPIOLIB 6605cfc8ee0SJohn Stultz select ARCH_USES_GETTIMEOFFSET 6610cdc8b92SNicolas Pitre select NEED_MACH_MEMORY_H 662c53c9cf6SAndrew Victor help 663c53c9cf6SAndrew Victor Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based 664c53c9cf6SAndrew Victor System-on-Chip devices. 665c53c9cf6SAndrew Victor 666788c9700SRussell Kingconfig ARCH_W90X900 667788c9700SRussell King bool "Nuvoton W90X900 CPU" 668788c9700SRussell King select CPU_ARM926T 669c52d3d68Swanzongshun select ARCH_REQUIRE_GPIOLIB 6706d803ba7SJean-Christop PLAGNIOL-VILLARD select CLKDEV_LOOKUP 6716fa5d5f7SRussell King select CLKSRC_MMIO 67258b5369eSwanzongshun select GENERIC_CLOCKEVENTS 673777f9bebSLennert Buytenhek help 674a8bc4eadSwanzongshun Support for Nuvoton (Winbond logic dept.) ARM9 processor, 675a8bc4eadSwanzongshun At present, the w90x900 has been renamed nuc900, regarding 676a8bc4eadSwanzongshun the ARM series product line, you can login the following 677a8bc4eadSwanzongshun link address to know more. 678a8bc4eadSwanzongshun 679a8bc4eadSwanzongshun <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ 680a8bc4eadSwanzongshun ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> 681585cf175STzachi Perelstein 682c5f80065SErik Gillingconfig ARCH_TEGRA 683c5f80065SErik Gilling bool "NVIDIA Tegra" 6844073723aSRussell King select CLKDEV_LOOKUP 685234b6cedSRussell King select CLKSRC_MMIO 686c5f80065SErik Gilling select GENERIC_CLOCKEVENTS 687c5f80065SErik Gilling select GENERIC_GPIO 688c5f80065SErik Gilling select HAVE_CLK 6893b55658aSDave Martin select HAVE_SMP 690ce5ea9f3SDave Martin select MIGHT_HAVE_CACHE_L2X0 691c334bc15SRob Herring select NEED_MACH_IO_H if PCI 6927056d423SColin Cross select ARCH_HAS_CPUFREQ 6932c95b7e0SStephen Warren select USE_OF 694c5f80065SErik Gilling help 695c5f80065SErik Gilling This enables support for NVIDIA Tegra based systems (Tegra APX, 696c5f80065SErik Gilling Tegra 6xx and Tegra 2 series). 697c5f80065SErik Gilling 698af75655cSJamie Ilesconfig ARCH_PICOXCELL 699af75655cSJamie Iles bool "Picochip picoXcell" 700af75655cSJamie Iles select ARCH_REQUIRE_GPIOLIB 701af75655cSJamie Iles select ARM_PATCH_PHYS_VIRT 702af75655cSJamie Iles select ARM_VIC 703af75655cSJamie Iles select CPU_V6K 704af75655cSJamie Iles select DW_APB_TIMER 705cfda5901SDinh Nguyen select DW_APB_TIMER_OF 706af75655cSJamie Iles select GENERIC_CLOCKEVENTS 707af75655cSJamie Iles select GENERIC_GPIO 708af75655cSJamie Iles select HAVE_TCM 709af75655cSJamie Iles select NO_IOPORT 71098e27a5cSJamie Iles select SPARSE_IRQ 711af75655cSJamie Iles select USE_OF 712af75655cSJamie Iles help 713af75655cSJamie Iles This enables support for systems based on the Picochip picoXcell 714af75655cSJamie Iles family of Femtocell devices. The picoxcell support requires device tree 715af75655cSJamie Iles for all boards. 716af75655cSJamie Iles 7174af6fee1SDeepak Saxenaconfig ARCH_PNX4008 7184af6fee1SDeepak Saxena bool "Philips Nexperia PNX4008 Mobile" 719c750815eSRussell King select CPU_ARM926T 7206d803ba7SJean-Christop PLAGNIOL-VILLARD select CLKDEV_LOOKUP 7215cfc8ee0SJohn Stultz select ARCH_USES_GETTIMEOFFSET 7224af6fee1SDeepak Saxena help 7234af6fee1SDeepak Saxena This enables support for Philips PNX4008 mobile platform. 7244af6fee1SDeepak Saxena 7251da177e4SLinus Torvaldsconfig ARCH_PXA 7262c8086a5Seric miao bool "PXA2xx/PXA3xx-based" 727a4f7e763SRussell King depends on MMU 728034d2f5aSAl Viro select ARCH_MTD_XIP 72989c52ed4SBen Dooks select ARCH_HAS_CPUFREQ 7306d803ba7SJean-Christop PLAGNIOL-VILLARD select CLKDEV_LOOKUP 731234b6cedSRussell King select CLKSRC_MMIO 7327444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 733981d0f39SEric Miao select GENERIC_CLOCKEVENTS 734157d2644SHaojian Zhuang select GPIO_PXA 735bd5ce433SEric Miao select PLAT_PXA 7366ac6b817SHaojian Zhuang select SPARSE_IRQ 7374e234cc0SEric Miao select AUTO_ZRELADDR 7388a97ae2fSEric Miao select MULTI_IRQ_HANDLER 73915e0d9e3SArnd Bergmann select ARM_CPU_SUSPEND if PM 740d0ee9f40SArnd Bergmann select HAVE_IDE 741f999b8bdSMartin Michlmayr help 7422c8086a5Seric miao Support for Intel/Marvell's PXA2xx/PXA3xx processor line. 7431da177e4SLinus Torvalds 744788c9700SRussell Kingconfig ARCH_MSM 745788c9700SRussell King bool "Qualcomm MSM" 7464b536b8dSSteve Muckle select HAVE_CLK 74749cbe786SEric Miao select GENERIC_CLOCKEVENTS 748923a081cSPavel Machek select ARCH_REQUIRE_GPIOLIB 749bd32344aSStephen Boyd select CLKDEV_LOOKUP 75049cbe786SEric Miao help 7514b53eb4fSDaniel Walker Support for Qualcomm MSM/QSD based systems. This runs on the 7524b53eb4fSDaniel Walker apps processor of the MSM/QSD and depends on a shared memory 7534b53eb4fSDaniel Walker interface to the modem processor which runs the baseband 7544b53eb4fSDaniel Walker stack and controls some vital subsystems 7554b53eb4fSDaniel Walker (clock and power control, etc). 75649cbe786SEric Miao 757c793c1b0SMagnus Dammconfig ARCH_SHMOBILE 7586d72ad35SPaul Mundt bool "Renesas SH-Mobile / R-Mobile" 7596d72ad35SPaul Mundt select HAVE_CLK 7605e93c6b4SPaul Mundt select CLKDEV_LOOKUP 761aa3831cfSKyungmin Park select HAVE_MACH_CLKDEV 7623b55658aSDave Martin select HAVE_SMP 7636d72ad35SPaul Mundt select GENERIC_CLOCKEVENTS 764ce5ea9f3SDave Martin select MIGHT_HAVE_CACHE_L2X0 7656d72ad35SPaul Mundt select NO_IOPORT 7666d72ad35SPaul Mundt select SPARSE_IRQ 76760f1435cSMagnus Damm select MULTI_IRQ_HANDLER 768e3e01091SRafael J. Wysocki select PM_GENERIC_DOMAINS if PM 7690cdc8b92SNicolas Pitre select NEED_MACH_MEMORY_H 770c793c1b0SMagnus Damm help 7716d72ad35SPaul Mundt Support for Renesas's SH-Mobile and R-Mobile ARM platforms. 772c793c1b0SMagnus Damm 7731da177e4SLinus Torvaldsconfig ARCH_RPC 7741da177e4SLinus Torvalds bool "RiscPC" 7751da177e4SLinus Torvalds select ARCH_ACORN 7761da177e4SLinus Torvalds select FIQ 777a08b6b79Sviro@ZenIV.linux.org.uk select ARCH_MAY_HAVE_PC_FDC 778341eb781SBen Dooks select HAVE_PATA_PLATFORM 779065909b9SRussell King select ISA_DMA_API 7805ea81769SAl Viro select NO_IOPORT 78107f841b7SRussell King select ARCH_SPARSEMEM_ENABLE 7825cfc8ee0SJohn Stultz select ARCH_USES_GETTIMEOFFSET 783d0ee9f40SArnd Bergmann select HAVE_IDE 784c334bc15SRob Herring select NEED_MACH_IO_H 7850cdc8b92SNicolas Pitre select NEED_MACH_MEMORY_H 7861da177e4SLinus Torvalds help 7871da177e4SLinus Torvalds On the Acorn Risc-PC, Linux can support the internal IDE disk and 7881da177e4SLinus Torvalds CD-ROM interface, serial and parallel port, and the floppy drive. 7891da177e4SLinus Torvalds 7901da177e4SLinus Torvaldsconfig ARCH_SA1100 7911da177e4SLinus Torvalds bool "SA1100-based" 792234b6cedSRussell King select CLKSRC_MMIO 793c750815eSRussell King select CPU_SA1100 794f7e68bbfSRussell King select ISA 79505944d74SRussell King select ARCH_SPARSEMEM_ENABLE 796034d2f5aSAl Viro select ARCH_MTD_XIP 79789c52ed4SBen Dooks select ARCH_HAS_CPUFREQ 7981937f5b9SRussell King select CPU_FREQ 7993e238be2SRussell King select GENERIC_CLOCKEVENTS 8004a8f8340SJett.Zhou select CLKDEV_LOOKUP 8017444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 802d0ee9f40SArnd Bergmann select HAVE_IDE 8030cdc8b92SNicolas Pitre select NEED_MACH_MEMORY_H 804375dec92SRussell King select SPARSE_IRQ 805f999b8bdSMartin Michlmayr help 806f999b8bdSMartin Michlmayr Support for StrongARM 11x0 based boards. 8071da177e4SLinus Torvalds 808b130d5c2SKukjin Kimconfig ARCH_S3C24XX 809b130d5c2SKukjin Kim bool "Samsung S3C24XX SoCs" 8100a938b97SDavid Brownell select GENERIC_GPIO 8119d56c02aSBen Dooks select ARCH_HAS_CPUFREQ 8129483a578SDavid Brownell select HAVE_CLK 813e83626f2SThomas Abraham select CLKDEV_LOOKUP 8145cfc8ee0SJohn Stultz select ARCH_USES_GETTIMEOFFSET 81520676c15SKukjin Kim select HAVE_S3C2410_I2C if I2C 816b130d5c2SKukjin Kim select HAVE_S3C_RTC if RTC_CLASS 817b130d5c2SKukjin Kim select HAVE_S3C2410_WATCHDOG if WATCHDOG 818c334bc15SRob Herring select NEED_MACH_IO_H 8191da177e4SLinus Torvalds help 820b130d5c2SKukjin Kim Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443 821b130d5c2SKukjin Kim and S3C2450 SoCs based systems, such as the Simtec Electronics BAST 822b130d5c2SKukjin Kim (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the 823b130d5c2SKukjin Kim Samsung SMDK2410 development board (and derivatives). 82463b1f51bSBen Dooks 825a08ab637SBen Dooksconfig ARCH_S3C64XX 826a08ab637SBen Dooks bool "Samsung S3C64XX" 82789f1fa08SBen Dooks select PLAT_SAMSUNG 82889f0ce72SBen Dooks select CPU_V6 82989f0ce72SBen Dooks select ARM_VIC 830a08ab637SBen Dooks select HAVE_CLK 8316700397aSMark Brown select HAVE_TCM 832226e85f4SThomas Abraham select CLKDEV_LOOKUP 83389f0ce72SBen Dooks select NO_IOPORT 8345cfc8ee0SJohn Stultz select ARCH_USES_GETTIMEOFFSET 83589c52ed4SBen Dooks select ARCH_HAS_CPUFREQ 83689f0ce72SBen Dooks select ARCH_REQUIRE_GPIOLIB 83789f0ce72SBen Dooks select SAMSUNG_CLKSRC 83889f0ce72SBen Dooks select SAMSUNG_IRQ_VIC_TIMER 83989f0ce72SBen Dooks select S3C_GPIO_TRACK 84089f0ce72SBen Dooks select S3C_DEV_NAND 84189f0ce72SBen Dooks select USB_ARCH_HAS_OHCI 84289f0ce72SBen Dooks select SAMSUNG_GPIOLIB_4BIT 84320676c15SKukjin Kim select HAVE_S3C2410_I2C if I2C 844c39d8d55SKyungmin Park select HAVE_S3C2410_WATCHDOG if WATCHDOG 845a08ab637SBen Dooks help 846a08ab637SBen Dooks Samsung S3C64XX series based systems 847a08ab637SBen Dooks 84849b7a491SKukjin Kimconfig ARCH_S5P64X0 84949b7a491SKukjin Kim bool "Samsung S5P6440 S5P6450" 850c4ffccddSKukjin Kim select CPU_V6 851c4ffccddSKukjin Kim select GENERIC_GPIO 852c4ffccddSKukjin Kim select HAVE_CLK 853d8b22d25SThomas Abraham select CLKDEV_LOOKUP 8540665ccc4SChanwoo Choi select CLKSRC_MMIO 855c39d8d55SKyungmin Park select HAVE_S3C2410_WATCHDOG if WATCHDOG 8569e65bbf2SSangbeom Kim select GENERIC_CLOCKEVENTS 85720676c15SKukjin Kim select HAVE_S3C2410_I2C if I2C 858754961a8SKukjin Kim select HAVE_S3C_RTC if RTC_CLASS 859c4ffccddSKukjin Kim help 86049b7a491SKukjin Kim Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, 86149b7a491SKukjin Kim SMDK6450. 862c4ffccddSKukjin Kim 863acc84707SMarek Szyprowskiconfig ARCH_S5PC100 864acc84707SMarek Szyprowski bool "Samsung S5PC100" 8655a7652f2SByungho Min select GENERIC_GPIO 8665a7652f2SByungho Min select HAVE_CLK 86729e8eb0fSThomas Abraham select CLKDEV_LOOKUP 8685a7652f2SByungho Min select CPU_V7 869925c68cdSBen Dooks select ARCH_USES_GETTIMEOFFSET 87020676c15SKukjin Kim select HAVE_S3C2410_I2C if I2C 871754961a8SKukjin Kim select HAVE_S3C_RTC if RTC_CLASS 872c39d8d55SKyungmin Park select HAVE_S3C2410_WATCHDOG if WATCHDOG 8735a7652f2SByungho Min help 874acc84707SMarek Szyprowski Samsung S5PC100 series based systems 8755a7652f2SByungho Min 876170f4e42SKukjin Kimconfig ARCH_S5PV210 877170f4e42SKukjin Kim bool "Samsung S5PV210/S5PC110" 878170f4e42SKukjin Kim select CPU_V7 879eecb6a84SKyungmin Park select ARCH_SPARSEMEM_ENABLE 8800f75a96bSKamil Debski select ARCH_HAS_HOLES_MEMORYMODEL 881170f4e42SKukjin Kim select GENERIC_GPIO 882170f4e42SKukjin Kim select HAVE_CLK 883b2a9dd46SThomas Abraham select CLKDEV_LOOKUP 8840665ccc4SChanwoo Choi select CLKSRC_MMIO 885d8144aeaSJaecheol Lee select ARCH_HAS_CPUFREQ 8869e65bbf2SSangbeom Kim select GENERIC_CLOCKEVENTS 88720676c15SKukjin Kim select HAVE_S3C2410_I2C if I2C 888754961a8SKukjin Kim select HAVE_S3C_RTC if RTC_CLASS 889c39d8d55SKyungmin Park select HAVE_S3C2410_WATCHDOG if WATCHDOG 8900cdc8b92SNicolas Pitre select NEED_MACH_MEMORY_H 891170f4e42SKukjin Kim help 892170f4e42SKukjin Kim Samsung S5PV210/S5PC110 series based systems 893170f4e42SKukjin Kim 89483014579SKukjin Kimconfig ARCH_EXYNOS 89583014579SKukjin Kim bool "SAMSUNG EXYNOS" 896cc0e72b8SChanghwan Youn select CPU_V7 897f567fa6fSKyungmin Park select ARCH_SPARSEMEM_ENABLE 8980f75a96bSKamil Debski select ARCH_HAS_HOLES_MEMORYMODEL 899cc0e72b8SChanghwan Youn select GENERIC_GPIO 900cc0e72b8SChanghwan Youn select HAVE_CLK 901badc4f2dSThomas Abraham select CLKDEV_LOOKUP 902b333fb16SSunyoung Kang select ARCH_HAS_CPUFREQ 903cc0e72b8SChanghwan Youn select GENERIC_CLOCKEVENTS 904754961a8SKukjin Kim select HAVE_S3C_RTC if RTC_CLASS 90520676c15SKukjin Kim select HAVE_S3C2410_I2C if I2C 906c39d8d55SKyungmin Park select HAVE_S3C2410_WATCHDOG if WATCHDOG 9070cdc8b92SNicolas Pitre select NEED_MACH_MEMORY_H 908cc0e72b8SChanghwan Youn help 90983014579SKukjin Kim Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5) 910cc0e72b8SChanghwan Youn 9111da177e4SLinus Torvaldsconfig ARCH_SHARK 9121da177e4SLinus Torvalds bool "Shark" 913c750815eSRussell King select CPU_SA110 914f7e68bbfSRussell King select ISA 915f7e68bbfSRussell King select ISA_DMA 9163bca103aSNicolas Pitre select ZONE_DMA 917f7e68bbfSRussell King select PCI 9185cfc8ee0SJohn Stultz select ARCH_USES_GETTIMEOFFSET 9190cdc8b92SNicolas Pitre select NEED_MACH_MEMORY_H 920c334bc15SRob Herring select NEED_MACH_IO_H 921f999b8bdSMartin Michlmayr help 922f999b8bdSMartin Michlmayr Support for the StrongARM based Digital DNARD machine, also known 923f999b8bdSMartin Michlmayr as "Shark" (<http://www.shark-linux.de/shark.html>). 9241da177e4SLinus Torvalds 925d98aac75SLinus Walleijconfig ARCH_U300 926d98aac75SLinus Walleij bool "ST-Ericsson U300 Series" 927d98aac75SLinus Walleij depends on MMU 928234b6cedSRussell King select CLKSRC_MMIO 929d98aac75SLinus Walleij select CPU_ARM926T 930bc581770SLinus Walleij select HAVE_TCM 931d98aac75SLinus Walleij select ARM_AMBA 9325485c1e0SLinus Walleij select ARM_PATCH_PHYS_VIRT 933d98aac75SLinus Walleij select ARM_VIC 934d98aac75SLinus Walleij select GENERIC_CLOCKEVENTS 9356d803ba7SJean-Christop PLAGNIOL-VILLARD select CLKDEV_LOOKUP 93650667d63SLinus Walleij select COMMON_CLK 937d98aac75SLinus Walleij select GENERIC_GPIO 938cc890cd7SLinus Walleij select ARCH_REQUIRE_GPIOLIB 939d98aac75SLinus Walleij help 940d98aac75SLinus Walleij Support for ST-Ericsson U300 series mobile platforms. 941d98aac75SLinus Walleij 942ccf50e23SRussell Kingconfig ARCH_U8500 943ccf50e23SRussell King bool "ST-Ericsson U8500 Series" 94467ae14fcSArnd Bergmann depends on MMU 945ccf50e23SRussell King select CPU_V7 946ccf50e23SRussell King select ARM_AMBA 947ccf50e23SRussell King select GENERIC_CLOCKEVENTS 9486d803ba7SJean-Christop PLAGNIOL-VILLARD select CLKDEV_LOOKUP 94994bdc0e2SRabin Vincent select ARCH_REQUIRE_GPIOLIB 9507c1a70e9SMartin Persson select ARCH_HAS_CPUFREQ 9513b55658aSDave Martin select HAVE_SMP 952ce5ea9f3SDave Martin select MIGHT_HAVE_CACHE_L2X0 953ccf50e23SRussell King help 954ccf50e23SRussell King Support for ST-Ericsson's Ux500 architecture 955ccf50e23SRussell King 956ccf50e23SRussell Kingconfig ARCH_NOMADIK 957ccf50e23SRussell King bool "STMicroelectronics Nomadik" 958ccf50e23SRussell King select ARM_AMBA 959ccf50e23SRussell King select ARM_VIC 960ccf50e23SRussell King select CPU_ARM926T 9614a31bd28SLinus Walleij select COMMON_CLK 962ccf50e23SRussell King select GENERIC_CLOCKEVENTS 9630fa7be40SArnd Bergmann select PINCTRL 964ce5ea9f3SDave Martin select MIGHT_HAVE_CACHE_L2X0 965ccf50e23SRussell King select ARCH_REQUIRE_GPIOLIB 966ccf50e23SRussell King help 967ccf50e23SRussell King Support for the Nomadik platform by ST-Ericsson 968ccf50e23SRussell King 9697c6337e2SKevin Hilmanconfig ARCH_DAVINCI 9707c6337e2SKevin Hilman bool "TI DaVinci" 9717c6337e2SKevin Hilman select GENERIC_CLOCKEVENTS 972dce1115bSDavid Brownell select ARCH_REQUIRE_GPIOLIB 9733bca103aSNicolas Pitre select ZONE_DMA 9749232fcc9SKevin Hilman select HAVE_IDE 9756d803ba7SJean-Christop PLAGNIOL-VILLARD select CLKDEV_LOOKUP 97620e9969bSDavid Brownell select GENERIC_ALLOCATOR 977dc7ad3b3SRussell King select GENERIC_IRQ_CHIP 978ae88e05aSSekhar Nori select ARCH_HAS_HOLES_MEMORYMODEL 9797c6337e2SKevin Hilman help 9807c6337e2SKevin Hilman Support for TI's DaVinci platform. 9817c6337e2SKevin Hilman 9823b938be6SRussell Kingconfig ARCH_OMAP 9833b938be6SRussell King bool "TI OMAP" 98400a36698SArnd Bergmann depends on MMU 9859483a578SDavid Brownell select HAVE_CLK 9867444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 98789c52ed4SBen Dooks select ARCH_HAS_CPUFREQ 988354a183fSRussell King - ARM Linux select CLKSRC_MMIO 98906cad098SKevin Hilman select GENERIC_CLOCKEVENTS 9909af915daSSriram select ARCH_HAS_HOLES_MEMORYMODEL 9913b938be6SRussell King help 9926e457bb0SLennert Buytenhek Support for TI's OMAP platform (OMAP1/2/3/4). 9933b938be6SRussell King 994cee37e50Sviresh kumarconfig PLAT_SPEAR 995cee37e50Sviresh kumar bool "ST SPEAr" 996cee37e50Sviresh kumar select ARM_AMBA 997cee37e50Sviresh kumar select ARCH_REQUIRE_GPIOLIB 9986d803ba7SJean-Christop PLAGNIOL-VILLARD select CLKDEV_LOOKUP 9995df33a62SViresh Kumar select COMMON_CLK 1000d6e15d78SRussell King select CLKSRC_MMIO 1001cee37e50Sviresh kumar select GENERIC_CLOCKEVENTS 1002cee37e50Sviresh kumar select HAVE_CLK 1003cee37e50Sviresh kumar help 1004cee37e50Sviresh kumar Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). 1005cee37e50Sviresh kumar 100621f47fbcSAlexey Charkovconfig ARCH_VT8500 100721f47fbcSAlexey Charkov bool "VIA/WonderMedia 85xx" 100821f47fbcSAlexey Charkov select CPU_ARM926T 100921f47fbcSAlexey Charkov select GENERIC_GPIO 101021f47fbcSAlexey Charkov select ARCH_HAS_CPUFREQ 101121f47fbcSAlexey Charkov select GENERIC_CLOCKEVENTS 101221f47fbcSAlexey Charkov select ARCH_REQUIRE_GPIOLIB 101321f47fbcSAlexey Charkov select HAVE_PWM 101421f47fbcSAlexey Charkov help 101521f47fbcSAlexey Charkov Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. 101602c981c0SBinghua Duan 1017b85a3ef4SJohn Linnconfig ARCH_ZYNQ 1018b85a3ef4SJohn Linn bool "Xilinx Zynq ARM Cortex A9 Platform" 101902c981c0SBinghua Duan select CPU_V7 102002c981c0SBinghua Duan select GENERIC_CLOCKEVENTS 102102c981c0SBinghua Duan select CLKDEV_LOOKUP 1022b85a3ef4SJohn Linn select ARM_GIC 1023b85a3ef4SJohn Linn select ARM_AMBA 1024b85a3ef4SJohn Linn select ICST 1025ce5ea9f3SDave Martin select MIGHT_HAVE_CACHE_L2X0 102602c981c0SBinghua Duan select USE_OF 102702c981c0SBinghua Duan help 1028b85a3ef4SJohn Linn Support for Xilinx Zynq ARM Cortex A9 Platform 10291da177e4SLinus Torvaldsendchoice 10301da177e4SLinus Torvalds 1031ccf50e23SRussell King# 1032ccf50e23SRussell King# This is sorted alphabetically by mach-* pathname. However, plat-* 1033ccf50e23SRussell King# Kconfigs may be included either alphabetically (according to the 1034ccf50e23SRussell King# plat- suffix) or along side the corresponding mach-* source. 1035ccf50e23SRussell King# 10363e93a22bSGregory CLEMENTsource "arch/arm/mach-mvebu/Kconfig" 10373e93a22bSGregory CLEMENT 103895b8f20fSRussell Kingsource "arch/arm/mach-at91/Kconfig" 103995b8f20fSRussell King 104095b8f20fSRussell Kingsource "arch/arm/mach-bcmring/Kconfig" 104195b8f20fSRussell King 10421da177e4SLinus Torvaldssource "arch/arm/mach-clps711x/Kconfig" 10431da177e4SLinus Torvalds 1044d94f944eSAnton Vorontsovsource "arch/arm/mach-cns3xxx/Kconfig" 1045d94f944eSAnton Vorontsov 104695b8f20fSRussell Kingsource "arch/arm/mach-davinci/Kconfig" 104795b8f20fSRussell King 104895b8f20fSRussell Kingsource "arch/arm/mach-dove/Kconfig" 104995b8f20fSRussell King 1050e7736d47SLennert Buytenheksource "arch/arm/mach-ep93xx/Kconfig" 1051e7736d47SLennert Buytenhek 10521da177e4SLinus Torvaldssource "arch/arm/mach-footbridge/Kconfig" 10531da177e4SLinus Torvalds 105459d3a193SPaulius Zaleckassource "arch/arm/mach-gemini/Kconfig" 105559d3a193SPaulius Zaleckas 105695b8f20fSRussell Kingsource "arch/arm/mach-h720x/Kconfig" 105795b8f20fSRussell King 10581da177e4SLinus Torvaldssource "arch/arm/mach-integrator/Kconfig" 10591da177e4SLinus Torvalds 10603f7e5815SLennert Buytenheksource "arch/arm/mach-iop32x/Kconfig" 10613f7e5815SLennert Buytenhek 10623f7e5815SLennert Buytenheksource "arch/arm/mach-iop33x/Kconfig" 10631da177e4SLinus Torvalds 1064285f5fa7SDan Williamssource "arch/arm/mach-iop13xx/Kconfig" 1065285f5fa7SDan Williams 10661da177e4SLinus Torvaldssource "arch/arm/mach-ixp4xx/Kconfig" 10671da177e4SLinus Torvalds 106895b8f20fSRussell Kingsource "arch/arm/mach-kirkwood/Kconfig" 106995b8f20fSRussell King 107095b8f20fSRussell Kingsource "arch/arm/mach-ks8695/Kconfig" 107195b8f20fSRussell King 107295b8f20fSRussell Kingsource "arch/arm/mach-msm/Kconfig" 107395b8f20fSRussell King 1074794d15b2SStanislav Samsonovsource "arch/arm/mach-mv78xx0/Kconfig" 1075794d15b2SStanislav Samsonov 107695b8f20fSRussell Kingsource "arch/arm/plat-mxc/Kconfig" 10771da177e4SLinus Torvalds 10781d3f33d5SShawn Guosource "arch/arm/mach-mxs/Kconfig" 10791d3f33d5SShawn Guo 108095b8f20fSRussell Kingsource "arch/arm/mach-netx/Kconfig" 108149cbe786SEric Miao 108295b8f20fSRussell Kingsource "arch/arm/mach-nomadik/Kconfig" 108395b8f20fSRussell Kingsource "arch/arm/plat-nomadik/Kconfig" 108495b8f20fSRussell King 1085d48af15eSTony Lindgrensource "arch/arm/plat-omap/Kconfig" 1086d48af15eSTony Lindgren 1087d48af15eSTony Lindgrensource "arch/arm/mach-omap1/Kconfig" 10881da177e4SLinus Torvalds 10891dbae815STony Lindgrensource "arch/arm/mach-omap2/Kconfig" 10901dbae815STony Lindgren 10919dd0b194SLennert Buytenheksource "arch/arm/mach-orion5x/Kconfig" 1092585cf175STzachi Perelstein 109395b8f20fSRussell Kingsource "arch/arm/mach-pxa/Kconfig" 109495b8f20fSRussell Kingsource "arch/arm/plat-pxa/Kconfig" 10951da177e4SLinus Torvalds 109695b8f20fSRussell Kingsource "arch/arm/mach-mmp/Kconfig" 109795b8f20fSRussell King 109895b8f20fSRussell Kingsource "arch/arm/mach-realview/Kconfig" 109995b8f20fSRussell King 110095b8f20fSRussell Kingsource "arch/arm/mach-sa1100/Kconfig" 1101edabd38eSSaeed Bishara 1102cf383678SBen Dookssource "arch/arm/plat-samsung/Kconfig" 1103a21765a7SBen Dookssource "arch/arm/plat-s3c24xx/Kconfig" 1104a21765a7SBen Dooks 1105cee37e50Sviresh kumarsource "arch/arm/plat-spear/Kconfig" 1106a21765a7SBen Dooks 110785fd6d63SKukjin Kimsource "arch/arm/mach-s3c24xx/Kconfig" 1108b130d5c2SKukjin Kimif ARCH_S3C24XX 1109a21765a7SBen Dookssource "arch/arm/mach-s3c2412/Kconfig" 1110a21765a7SBen Dookssource "arch/arm/mach-s3c2440/Kconfig" 1111a21765a7SBen Dooksendif 11121da177e4SLinus Torvalds 1113a08ab637SBen Dooksif ARCH_S3C64XX 1114431107eaSBen Dookssource "arch/arm/mach-s3c64xx/Kconfig" 1115a08ab637SBen Dooksendif 1116a08ab637SBen Dooks 111749b7a491SKukjin Kimsource "arch/arm/mach-s5p64x0/Kconfig" 1118c4ffccddSKukjin Kim 11195a7652f2SByungho Minsource "arch/arm/mach-s5pc100/Kconfig" 11205a7652f2SByungho Min 1121170f4e42SKukjin Kimsource "arch/arm/mach-s5pv210/Kconfig" 1122170f4e42SKukjin Kim 112383014579SKukjin Kimsource "arch/arm/mach-exynos/Kconfig" 1124cc0e72b8SChanghwan Youn 1125882d01f9SRussell Kingsource "arch/arm/mach-shmobile/Kconfig" 11261da177e4SLinus Torvalds 1127c5f80065SErik Gillingsource "arch/arm/mach-tegra/Kconfig" 1128c5f80065SErik Gilling 112995b8f20fSRussell Kingsource "arch/arm/mach-u300/Kconfig" 11301da177e4SLinus Torvalds 113195b8f20fSRussell Kingsource "arch/arm/mach-ux500/Kconfig" 11321da177e4SLinus Torvalds 11331da177e4SLinus Torvaldssource "arch/arm/mach-versatile/Kconfig" 11341da177e4SLinus Torvalds 1135ceade897SRussell Kingsource "arch/arm/mach-vexpress/Kconfig" 1136420c34e4SRussell Kingsource "arch/arm/plat-versatile/Kconfig" 1137ceade897SRussell King 113821f47fbcSAlexey Charkovsource "arch/arm/mach-vt8500/Kconfig" 113921f47fbcSAlexey Charkov 11407ec80ddfSwanzongshunsource "arch/arm/mach-w90x900/Kconfig" 11417ec80ddfSwanzongshun 11421da177e4SLinus Torvalds# Definitions to make life easier 11431da177e4SLinus Torvaldsconfig ARCH_ACORN 11441da177e4SLinus Torvalds bool 11451da177e4SLinus Torvalds 11467ae1f7ecSLennert Buytenhekconfig PLAT_IOP 11477ae1f7ecSLennert Buytenhek bool 1148469d3044SMikael Pettersson select GENERIC_CLOCKEVENTS 11497ae1f7ecSLennert Buytenhek 115069b02f6aSLennert Buytenhekconfig PLAT_ORION 115169b02f6aSLennert Buytenhek bool 1152bfe45e0bSRussell King select CLKSRC_MMIO 1153dc7ad3b3SRussell King select GENERIC_IRQ_CHIP 11542f129bf4SAndrew Lunn select COMMON_CLK 115569b02f6aSLennert Buytenhek 1156bd5ce433SEric Miaoconfig PLAT_PXA 1157bd5ce433SEric Miao bool 1158bd5ce433SEric Miao 1159f4b8b319SRussell Kingconfig PLAT_VERSATILE 1160f4b8b319SRussell King bool 1161f4b8b319SRussell King 1162e3887714SRussell Kingconfig ARM_TIMER_SP804 1163e3887714SRussell King bool 1164bfe45e0bSRussell King select CLKSRC_MMIO 1165a7bf6162SRob Herring select HAVE_SCHED_CLOCK 1166e3887714SRussell King 11671da177e4SLinus Torvaldssource arch/arm/mm/Kconfig 11681da177e4SLinus Torvalds 1169958cab0fSRussell Kingconfig ARM_NR_BANKS 1170958cab0fSRussell King int 1171958cab0fSRussell King default 16 if ARCH_EP93XX 1172958cab0fSRussell King default 8 1173958cab0fSRussell King 1174afe4b25eSLennert Buytenhekconfig IWMMXT 1175afe4b25eSLennert Buytenhek bool "Enable iWMMXt support" 1176ef6c8445SHaojian Zhuang depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 1177ef6c8445SHaojian Zhuang default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP 1178afe4b25eSLennert Buytenhek help 1179afe4b25eSLennert Buytenhek Enable support for iWMMXt context switching at run time if 1180afe4b25eSLennert Buytenhek running on a CPU that supports it. 1181afe4b25eSLennert Buytenhek 11821da177e4SLinus Torvaldsconfig XSCALE_PMU 11831da177e4SLinus Torvalds bool 1184bfc994b5SPaul Bolle depends on CPU_XSCALE 11851da177e4SLinus Torvalds default y 11861da177e4SLinus Torvalds 11870f4f0672SJamie Ilesconfig CPU_HAS_PMU 1188e399b1a4SRussell King depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \ 11898954bb0dSWill Deacon (!ARCH_OMAP3 || OMAP3_EMU) 11900f4f0672SJamie Iles default y 11910f4f0672SJamie Iles bool 11920f4f0672SJamie Iles 119352108641Seric miaoconfig MULTI_IRQ_HANDLER 119452108641Seric miao bool 119552108641Seric miao help 119652108641Seric miao Allow each machine to specify it's own IRQ handler at run time. 119752108641Seric miao 11983b93e7b0SHyok S. Choiif !MMU 11993b93e7b0SHyok S. Choisource "arch/arm/Kconfig-nommu" 12003b93e7b0SHyok S. Choiendif 12013b93e7b0SHyok S. Choi 1202f0c4b8d6SWill Deaconconfig ARM_ERRATA_326103 1203f0c4b8d6SWill Deacon bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory" 1204f0c4b8d6SWill Deacon depends on CPU_V6 1205f0c4b8d6SWill Deacon help 1206f0c4b8d6SWill Deacon Executing a SWP instruction to read-only memory does not set bit 11 1207f0c4b8d6SWill Deacon of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to 1208f0c4b8d6SWill Deacon treat the access as a read, preventing a COW from occurring and 1209f0c4b8d6SWill Deacon causing the faulting task to livelock. 1210f0c4b8d6SWill Deacon 12119cba3cccSCatalin Marinasconfig ARM_ERRATA_411920 12129cba3cccSCatalin Marinas bool "ARM errata: Invalidation of the Instruction Cache operation can fail" 1213e399b1a4SRussell King depends on CPU_V6 || CPU_V6K 12149cba3cccSCatalin Marinas help 12159cba3cccSCatalin Marinas Invalidation of the Instruction Cache operation can 12169cba3cccSCatalin Marinas fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. 12179cba3cccSCatalin Marinas It does not affect the MPCore. This option enables the ARM Ltd. 12189cba3cccSCatalin Marinas recommended workaround. 12199cba3cccSCatalin Marinas 12207ce236fcSCatalin Marinasconfig ARM_ERRATA_430973 12217ce236fcSCatalin Marinas bool "ARM errata: Stale prediction on replaced interworking branch" 12227ce236fcSCatalin Marinas depends on CPU_V7 12237ce236fcSCatalin Marinas help 12247ce236fcSCatalin Marinas This option enables the workaround for the 430973 Cortex-A8 12257ce236fcSCatalin Marinas (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb 12267ce236fcSCatalin Marinas interworking branch is replaced with another code sequence at the 12277ce236fcSCatalin Marinas same virtual address, whether due to self-modifying code or virtual 12287ce236fcSCatalin Marinas to physical address re-mapping, Cortex-A8 does not recover from the 12297ce236fcSCatalin Marinas stale interworking branch prediction. This results in Cortex-A8 12307ce236fcSCatalin Marinas executing the new code sequence in the incorrect ARM or Thumb state. 12317ce236fcSCatalin Marinas The workaround enables the BTB/BTAC operations by setting ACTLR.IBE 12327ce236fcSCatalin Marinas and also flushes the branch target cache at every context switch. 12337ce236fcSCatalin Marinas Note that setting specific bits in the ACTLR register may not be 12347ce236fcSCatalin Marinas available in non-secure mode. 12357ce236fcSCatalin Marinas 1236855c551fSCatalin Marinasconfig ARM_ERRATA_458693 1237855c551fSCatalin Marinas bool "ARM errata: Processor deadlock when a false hazard is created" 1238855c551fSCatalin Marinas depends on CPU_V7 1239855c551fSCatalin Marinas help 1240855c551fSCatalin Marinas This option enables the workaround for the 458693 Cortex-A8 (r2p0) 1241855c551fSCatalin Marinas erratum. For very specific sequences of memory operations, it is 1242855c551fSCatalin Marinas possible for a hazard condition intended for a cache line to instead 1243855c551fSCatalin Marinas be incorrectly associated with a different cache line. This false 1244855c551fSCatalin Marinas hazard might then cause a processor deadlock. The workaround enables 1245855c551fSCatalin Marinas the L1 caching of the NEON accesses and disables the PLD instruction 1246855c551fSCatalin Marinas in the ACTLR register. Note that setting specific bits in the ACTLR 1247855c551fSCatalin Marinas register may not be available in non-secure mode. 1248855c551fSCatalin Marinas 12490516e464SCatalin Marinasconfig ARM_ERRATA_460075 12500516e464SCatalin Marinas bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" 12510516e464SCatalin Marinas depends on CPU_V7 12520516e464SCatalin Marinas help 12530516e464SCatalin Marinas This option enables the workaround for the 460075 Cortex-A8 (r2p0) 12540516e464SCatalin Marinas erratum. Any asynchronous access to the L2 cache may encounter a 12550516e464SCatalin Marinas situation in which recent store transactions to the L2 cache are lost 12560516e464SCatalin Marinas and overwritten with stale memory contents from external memory. The 12570516e464SCatalin Marinas workaround disables the write-allocate mode for the L2 cache via the 12580516e464SCatalin Marinas ACTLR register. Note that setting specific bits in the ACTLR register 12590516e464SCatalin Marinas may not be available in non-secure mode. 12600516e464SCatalin Marinas 12619f05027cSWill Deaconconfig ARM_ERRATA_742230 12629f05027cSWill Deacon bool "ARM errata: DMB operation may be faulty" 12639f05027cSWill Deacon depends on CPU_V7 && SMP 12649f05027cSWill Deacon help 12659f05027cSWill Deacon This option enables the workaround for the 742230 Cortex-A9 12669f05027cSWill Deacon (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction 12679f05027cSWill Deacon between two write operations may not ensure the correct visibility 12689f05027cSWill Deacon ordering of the two writes. This workaround sets a specific bit in 12699f05027cSWill Deacon the diagnostic register of the Cortex-A9 which causes the DMB 12709f05027cSWill Deacon instruction to behave as a DSB, ensuring the correct behaviour of 12719f05027cSWill Deacon the two writes. 12729f05027cSWill Deacon 1273a672e99bSWill Deaconconfig ARM_ERRATA_742231 1274a672e99bSWill Deacon bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" 1275a672e99bSWill Deacon depends on CPU_V7 && SMP 1276a672e99bSWill Deacon help 1277a672e99bSWill Deacon This option enables the workaround for the 742231 Cortex-A9 1278a672e99bSWill Deacon (r2p0..r2p2) erratum. Under certain conditions, specific to the 1279a672e99bSWill Deacon Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, 1280a672e99bSWill Deacon accessing some data located in the same cache line, may get corrupted 1281a672e99bSWill Deacon data due to bad handling of the address hazard when the line gets 1282a672e99bSWill Deacon replaced from one of the CPUs at the same time as another CPU is 1283a672e99bSWill Deacon accessing it. This workaround sets specific bits in the diagnostic 1284a672e99bSWill Deacon register of the Cortex-A9 which reduces the linefill issuing 1285a672e99bSWill Deacon capabilities of the processor. 1286a672e99bSWill Deacon 12879e65582aSSantosh Shilimkarconfig PL310_ERRATA_588369 1288fa0ce403SWill Deacon bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines" 12892839e06cSSantosh Shilimkar depends on CACHE_L2X0 12909e65582aSSantosh Shilimkar help 12919e65582aSSantosh Shilimkar The PL310 L2 cache controller implements three types of Clean & 12929e65582aSSantosh Shilimkar Invalidate maintenance operations: by Physical Address 12939e65582aSSantosh Shilimkar (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). 12949e65582aSSantosh Shilimkar They are architecturally defined to behave as the execution of a 12959e65582aSSantosh Shilimkar clean operation followed immediately by an invalidate operation, 12969e65582aSSantosh Shilimkar both performing to the same memory location. This functionality 12979e65582aSSantosh Shilimkar is not correctly implemented in PL310 as clean lines are not 12982839e06cSSantosh Shilimkar invalidated as a result of these operations. 1299cdf357f1SWill Deacon 1300cdf357f1SWill Deaconconfig ARM_ERRATA_720789 1301cdf357f1SWill Deacon bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" 1302e66dc745SDave Martin depends on CPU_V7 1303cdf357f1SWill Deacon help 1304cdf357f1SWill Deacon This option enables the workaround for the 720789 Cortex-A9 (prior to 1305cdf357f1SWill Deacon r2p0) erratum. A faulty ASID can be sent to the other CPUs for the 1306cdf357f1SWill Deacon broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. 1307cdf357f1SWill Deacon As a consequence of this erratum, some TLB entries which should be 1308cdf357f1SWill Deacon invalidated are not, resulting in an incoherency in the system page 1309cdf357f1SWill Deacon tables. The workaround changes the TLB flushing routines to invalidate 1310cdf357f1SWill Deacon entries regardless of the ASID. 1311475d92fcSWill Deacon 13121f0090a1SRussell Kingconfig PL310_ERRATA_727915 1313fa0ce403SWill Deacon bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption" 13141f0090a1SRussell King depends on CACHE_L2X0 13151f0090a1SRussell King help 13161f0090a1SRussell King PL310 implements the Clean & Invalidate by Way L2 cache maintenance 13171f0090a1SRussell King operation (offset 0x7FC). This operation runs in background so that 13181f0090a1SRussell King PL310 can handle normal accesses while it is in progress. Under very 13191f0090a1SRussell King rare circumstances, due to this erratum, write data can be lost when 13201f0090a1SRussell King PL310 treats a cacheable write transaction during a Clean & 13211f0090a1SRussell King Invalidate by Way operation. 13221f0090a1SRussell King 1323475d92fcSWill Deaconconfig ARM_ERRATA_743622 1324475d92fcSWill Deacon bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" 1325475d92fcSWill Deacon depends on CPU_V7 1326475d92fcSWill Deacon help 1327475d92fcSWill Deacon This option enables the workaround for the 743622 Cortex-A9 1328efbc74acSWill Deacon (r2p*) erratum. Under very rare conditions, a faulty 1329475d92fcSWill Deacon optimisation in the Cortex-A9 Store Buffer may lead to data 1330475d92fcSWill Deacon corruption. This workaround sets a specific bit in the diagnostic 1331475d92fcSWill Deacon register of the Cortex-A9 which disables the Store Buffer 1332475d92fcSWill Deacon optimisation, preventing the defect from occurring. This has no 1333475d92fcSWill Deacon visible impact on the overall performance or power consumption of the 1334475d92fcSWill Deacon processor. 1335475d92fcSWill Deacon 13369a27c27cSWill Deaconconfig ARM_ERRATA_751472 13379a27c27cSWill Deacon bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" 1338ba90c516SDave Martin depends on CPU_V7 13399a27c27cSWill Deacon help 13409a27c27cSWill Deacon This option enables the workaround for the 751472 Cortex-A9 (prior 13419a27c27cSWill Deacon to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the 13429a27c27cSWill Deacon completion of a following broadcasted operation if the second 13439a27c27cSWill Deacon operation is received by a CPU before the ICIALLUIS has completed, 13449a27c27cSWill Deacon potentially leading to corrupted entries in the cache or TLB. 13459a27c27cSWill Deacon 1346fa0ce403SWill Deaconconfig PL310_ERRATA_753970 1347fa0ce403SWill Deacon bool "PL310 errata: cache sync operation may be faulty" 1348885028e4SSrinidhi Kasagar depends on CACHE_PL310 1349885028e4SSrinidhi Kasagar help 1350885028e4SSrinidhi Kasagar This option enables the workaround for the 753970 PL310 (r3p0) erratum. 1351885028e4SSrinidhi Kasagar 1352885028e4SSrinidhi Kasagar Under some condition the effect of cache sync operation on 1353885028e4SSrinidhi Kasagar the store buffer still remains when the operation completes. 1354885028e4SSrinidhi Kasagar This means that the store buffer is always asked to drain and 1355885028e4SSrinidhi Kasagar this prevents it from merging any further writes. The workaround 1356885028e4SSrinidhi Kasagar is to replace the normal offset of cache sync operation (0x730) 1357885028e4SSrinidhi Kasagar by another offset targeting an unmapped PL310 register 0x740. 1358885028e4SSrinidhi Kasagar This has the same effect as the cache sync operation: store buffer 1359885028e4SSrinidhi Kasagar drain and waiting for all buffers empty. 1360885028e4SSrinidhi Kasagar 1361fcbdc5feSWill Deaconconfig ARM_ERRATA_754322 1362fcbdc5feSWill Deacon bool "ARM errata: possible faulty MMU translations following an ASID switch" 1363fcbdc5feSWill Deacon depends on CPU_V7 1364fcbdc5feSWill Deacon help 1365fcbdc5feSWill Deacon This option enables the workaround for the 754322 Cortex-A9 (r2p*, 1366fcbdc5feSWill Deacon r3p*) erratum. A speculative memory access may cause a page table walk 1367fcbdc5feSWill Deacon which starts prior to an ASID switch but completes afterwards. This 1368fcbdc5feSWill Deacon can populate the micro-TLB with a stale entry which may be hit with 1369fcbdc5feSWill Deacon the new ASID. This workaround places two dsb instructions in the mm 1370fcbdc5feSWill Deacon switching code so that no page table walks can cross the ASID switch. 1371fcbdc5feSWill Deacon 13725dab26afSWill Deaconconfig ARM_ERRATA_754327 13735dab26afSWill Deacon bool "ARM errata: no automatic Store Buffer drain" 13745dab26afSWill Deacon depends on CPU_V7 && SMP 13755dab26afSWill Deacon help 13765dab26afSWill Deacon This option enables the workaround for the 754327 Cortex-A9 (prior to 13775dab26afSWill Deacon r2p0) erratum. The Store Buffer does not have any automatic draining 13785dab26afSWill Deacon mechanism and therefore a livelock may occur if an external agent 13795dab26afSWill Deacon continuously polls a memory location waiting to observe an update. 13805dab26afSWill Deacon This workaround defines cpu_relax() as smp_mb(), preventing correctly 13815dab26afSWill Deacon written polling loops from denying visibility of updates to memory. 13825dab26afSWill Deacon 1383145e10e1SCatalin Marinasconfig ARM_ERRATA_364296 1384145e10e1SCatalin Marinas bool "ARM errata: Possible cache data corruption with hit-under-miss enabled" 1385145e10e1SCatalin Marinas depends on CPU_V6 && !SMP 1386145e10e1SCatalin Marinas help 1387145e10e1SCatalin Marinas This options enables the workaround for the 364296 ARM1136 1388145e10e1SCatalin Marinas r0p2 erratum (possible cache data corruption with 1389145e10e1SCatalin Marinas hit-under-miss enabled). It sets the undocumented bit 31 in 1390145e10e1SCatalin Marinas the auxiliary control register and the FI bit in the control 1391145e10e1SCatalin Marinas register, thus disabling hit-under-miss without putting the 1392145e10e1SCatalin Marinas processor into full low interrupt latency mode. ARM11MPCore 1393145e10e1SCatalin Marinas is not affected. 1394145e10e1SCatalin Marinas 1395f630c1bdSWill Deaconconfig ARM_ERRATA_764369 1396f630c1bdSWill Deacon bool "ARM errata: Data cache line maintenance operation by MVA may not succeed" 1397f630c1bdSWill Deacon depends on CPU_V7 && SMP 1398f630c1bdSWill Deacon help 1399f630c1bdSWill Deacon This option enables the workaround for erratum 764369 1400f630c1bdSWill Deacon affecting Cortex-A9 MPCore with two or more processors (all 1401f630c1bdSWill Deacon current revisions). Under certain timing circumstances, a data 1402f630c1bdSWill Deacon cache line maintenance operation by MVA targeting an Inner 1403f630c1bdSWill Deacon Shareable memory region may fail to proceed up to either the 1404f630c1bdSWill Deacon Point of Coherency or to the Point of Unification of the 1405f630c1bdSWill Deacon system. This workaround adds a DSB instruction before the 1406f630c1bdSWill Deacon relevant cache maintenance functions and sets a specific bit 1407f630c1bdSWill Deacon in the diagnostic control register of the SCU. 1408f630c1bdSWill Deacon 140911ed0ba1SWill Deaconconfig PL310_ERRATA_769419 141011ed0ba1SWill Deacon bool "PL310 errata: no automatic Store Buffer drain" 141111ed0ba1SWill Deacon depends on CACHE_L2X0 141211ed0ba1SWill Deacon help 141311ed0ba1SWill Deacon On revisions of the PL310 prior to r3p2, the Store Buffer does 141411ed0ba1SWill Deacon not automatically drain. This can cause normal, non-cacheable 141511ed0ba1SWill Deacon writes to be retained when the memory system is idle, leading 141611ed0ba1SWill Deacon to suboptimal I/O performance for drivers using coherent DMA. 141711ed0ba1SWill Deacon This option adds a write barrier to the cpu_idle loop so that, 141811ed0ba1SWill Deacon on systems with an outer cache, the store buffer is drained 141911ed0ba1SWill Deacon explicitly. 142011ed0ba1SWill Deacon 14211da177e4SLinus Torvaldsendmenu 14221da177e4SLinus Torvalds 14231da177e4SLinus Torvaldssource "arch/arm/common/Kconfig" 14241da177e4SLinus Torvalds 14251da177e4SLinus Torvaldsmenu "Bus support" 14261da177e4SLinus Torvalds 14271da177e4SLinus Torvaldsconfig ARM_AMBA 14281da177e4SLinus Torvalds bool 14291da177e4SLinus Torvalds 14301da177e4SLinus Torvaldsconfig ISA 14311da177e4SLinus Torvalds bool 14321da177e4SLinus Torvalds help 14331da177e4SLinus Torvalds Find out whether you have ISA slots on your motherboard. ISA is the 14341da177e4SLinus Torvalds name of a bus system, i.e. the way the CPU talks to the other stuff 14351da177e4SLinus Torvalds inside your box. Other bus systems are PCI, EISA, MicroChannel 14361da177e4SLinus Torvalds (MCA) or VESA. ISA is an older system, now being displaced by PCI; 14371da177e4SLinus Torvalds newer boards don't support it. If you have ISA, say Y, otherwise N. 14381da177e4SLinus Torvalds 1439065909b9SRussell King# Select ISA DMA controller support 14401da177e4SLinus Torvaldsconfig ISA_DMA 14411da177e4SLinus Torvalds bool 1442065909b9SRussell King select ISA_DMA_API 14431da177e4SLinus Torvalds 1444065909b9SRussell King# Select ISA DMA interface 14455cae841bSAl Viroconfig ISA_DMA_API 14465cae841bSAl Viro bool 14475cae841bSAl Viro 14481da177e4SLinus Torvaldsconfig PCI 14490b05da72SHans Ulli Kroll bool "PCI support" if MIGHT_HAVE_PCI 14501da177e4SLinus Torvalds help 14511da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 14521da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 14531da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or 14541da177e4SLinus Torvalds VESA. If you have PCI, say Y, otherwise N. 14551da177e4SLinus Torvalds 145652882173SAnton Vorontsovconfig PCI_DOMAINS 145752882173SAnton Vorontsov bool 145852882173SAnton Vorontsov depends on PCI 145952882173SAnton Vorontsov 1460b080ac8aSMarcelo Roberto Jimenezconfig PCI_NANOENGINE 1461b080ac8aSMarcelo Roberto Jimenez bool "BSE nanoEngine PCI support" 1462b080ac8aSMarcelo Roberto Jimenez depends on SA1100_NANOENGINE 1463b080ac8aSMarcelo Roberto Jimenez help 1464b080ac8aSMarcelo Roberto Jimenez Enable PCI on the BSE nanoEngine board. 1465b080ac8aSMarcelo Roberto Jimenez 146636e23590SMatthew Wilcoxconfig PCI_SYSCALL 146736e23590SMatthew Wilcox def_bool PCI 146836e23590SMatthew Wilcox 14691da177e4SLinus Torvalds# Select the host bridge type 14701da177e4SLinus Torvaldsconfig PCI_HOST_VIA82C505 14711da177e4SLinus Torvalds bool 14721da177e4SLinus Torvalds depends on PCI && ARCH_SHARK 14731da177e4SLinus Torvalds default y 14741da177e4SLinus Torvalds 1475a0113a99SMike Rapoportconfig PCI_HOST_ITE8152 1476a0113a99SMike Rapoport bool 1477a0113a99SMike Rapoport depends on PCI && MACH_ARMCORE 1478a0113a99SMike Rapoport default y 1479a0113a99SMike Rapoport select DMABOUNCE 1480a0113a99SMike Rapoport 14811da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 14821da177e4SLinus Torvalds 14831da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 14841da177e4SLinus Torvalds 14851da177e4SLinus Torvaldsendmenu 14861da177e4SLinus Torvalds 14871da177e4SLinus Torvaldsmenu "Kernel Features" 14881da177e4SLinus Torvalds 14893b55658aSDave Martinconfig HAVE_SMP 14903b55658aSDave Martin bool 14913b55658aSDave Martin help 14923b55658aSDave Martin This option should be selected by machines which have an SMP- 14933b55658aSDave Martin capable CPU. 14943b55658aSDave Martin 14953b55658aSDave Martin The only effect of this option is to make the SMP-related 14963b55658aSDave Martin options available to the user for configuration. 14973b55658aSDave Martin 14981da177e4SLinus Torvaldsconfig SMP 1499bb2d8130SRussell King bool "Symmetric Multi-Processing" 1500fbb4ddacSRussell King depends on CPU_V6K || CPU_V7 1501bc28248eSRussell King depends on GENERIC_CLOCKEVENTS 15023b55658aSDave Martin depends on HAVE_SMP 15039934ebb8SArnd Bergmann depends on MMU 1504f6dd9fa5SJens Axboe select USE_GENERIC_SMP_HELPERS 150589c3dedfSDaniel Walker select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP 15061da177e4SLinus Torvalds help 15071da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 15081da177e4SLinus Torvalds a system with only one CPU, like most personal computers, say N. If 15091da177e4SLinus Torvalds you have a system with more than one CPU, say Y. 15101da177e4SLinus Torvalds 15111da177e4SLinus Torvalds If you say N here, the kernel will run on single and multiprocessor 15121da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 15131da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, single 15141da177e4SLinus Torvalds processor machines. On a single processor machine, the kernel will 15151da177e4SLinus Torvalds run faster if you say N here. 15161da177e4SLinus Torvalds 1517395cf969SPaul Bolle See also <file:Documentation/x86/i386/IO-APIC.txt>, 15181da177e4SLinus Torvalds <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at 151950a23e6eSJustin P. Mattock <http://tldp.org/HOWTO/SMP-HOWTO.html>. 15201da177e4SLinus Torvalds 15211da177e4SLinus Torvalds If you don't know what to do here, say N. 15221da177e4SLinus Torvalds 1523f00ec48fSRussell Kingconfig SMP_ON_UP 1524f00ec48fSRussell King bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" 1525f00ec48fSRussell King depends on EXPERIMENTAL 15264d2692a7SNicolas Pitre depends on SMP && !XIP_KERNEL 1527f00ec48fSRussell King default y 1528f00ec48fSRussell King help 1529f00ec48fSRussell King SMP kernels contain instructions which fail on non-SMP processors. 1530f00ec48fSRussell King Enabling this option allows the kernel to modify itself to make 1531f00ec48fSRussell King these instructions safe. Disabling it allows about 1K of space 1532f00ec48fSRussell King savings. 1533f00ec48fSRussell King 1534f00ec48fSRussell King If you don't know what to do here, say Y. 1535f00ec48fSRussell King 1536c9018aabSVincent Guittotconfig ARM_CPU_TOPOLOGY 1537c9018aabSVincent Guittot bool "Support cpu topology definition" 1538c9018aabSVincent Guittot depends on SMP && CPU_V7 1539c9018aabSVincent Guittot default y 1540c9018aabSVincent Guittot help 1541c9018aabSVincent Guittot Support ARM cpu topology definition. The MPIDR register defines 1542c9018aabSVincent Guittot affinity between processors which is then used to describe the cpu 1543c9018aabSVincent Guittot topology of an ARM System. 1544c9018aabSVincent Guittot 1545c9018aabSVincent Guittotconfig SCHED_MC 1546c9018aabSVincent Guittot bool "Multi-core scheduler support" 1547c9018aabSVincent Guittot depends on ARM_CPU_TOPOLOGY 1548c9018aabSVincent Guittot help 1549c9018aabSVincent Guittot Multi-core scheduler support improves the CPU scheduler's decision 1550c9018aabSVincent Guittot making when dealing with multi-core CPU chips at a cost of slightly 1551c9018aabSVincent Guittot increased overhead in some places. If unsure say N here. 1552c9018aabSVincent Guittot 1553c9018aabSVincent Guittotconfig SCHED_SMT 1554c9018aabSVincent Guittot bool "SMT scheduler support" 1555c9018aabSVincent Guittot depends on ARM_CPU_TOPOLOGY 1556c9018aabSVincent Guittot help 1557c9018aabSVincent Guittot Improves the CPU scheduler's decision making when dealing with 1558c9018aabSVincent Guittot MultiThreading at a cost of slightly increased overhead in some 1559c9018aabSVincent Guittot places. If unsure say N here. 1560c9018aabSVincent Guittot 1561a8cbcd92SRussell Kingconfig HAVE_ARM_SCU 1562a8cbcd92SRussell King bool 1563a8cbcd92SRussell King help 1564a8cbcd92SRussell King This option enables support for the ARM system coherency unit 1565a8cbcd92SRussell King 1566022c03a2SMarc Zyngierconfig ARM_ARCH_TIMER 1567022c03a2SMarc Zyngier bool "Architected timer support" 1568022c03a2SMarc Zyngier depends on CPU_V7 1569022c03a2SMarc Zyngier help 1570022c03a2SMarc Zyngier This option enables support for the ARM architected timer 1571022c03a2SMarc Zyngier 1572f32f4ce2SRussell Kingconfig HAVE_ARM_TWD 1573f32f4ce2SRussell King bool 1574f32f4ce2SRussell King depends on SMP 1575f32f4ce2SRussell King help 1576f32f4ce2SRussell King This options enables support for the ARM timer and watchdog unit 1577f32f4ce2SRussell King 15788d5796d2SLennert Buytenhekchoice 15798d5796d2SLennert Buytenhek prompt "Memory split" 15808d5796d2SLennert Buytenhek default VMSPLIT_3G 15818d5796d2SLennert Buytenhek help 15828d5796d2SLennert Buytenhek Select the desired split between kernel and user memory. 15838d5796d2SLennert Buytenhek 15848d5796d2SLennert Buytenhek If you are not absolutely sure what you are doing, leave this 15858d5796d2SLennert Buytenhek option alone! 15868d5796d2SLennert Buytenhek 15878d5796d2SLennert Buytenhek config VMSPLIT_3G 15888d5796d2SLennert Buytenhek bool "3G/1G user/kernel split" 15898d5796d2SLennert Buytenhek config VMSPLIT_2G 15908d5796d2SLennert Buytenhek bool "2G/2G user/kernel split" 15918d5796d2SLennert Buytenhek config VMSPLIT_1G 15928d5796d2SLennert Buytenhek bool "1G/3G user/kernel split" 15938d5796d2SLennert Buytenhekendchoice 15948d5796d2SLennert Buytenhek 15958d5796d2SLennert Buytenhekconfig PAGE_OFFSET 15968d5796d2SLennert Buytenhek hex 15978d5796d2SLennert Buytenhek default 0x40000000 if VMSPLIT_1G 15988d5796d2SLennert Buytenhek default 0x80000000 if VMSPLIT_2G 15998d5796d2SLennert Buytenhek default 0xC0000000 16008d5796d2SLennert Buytenhek 16011da177e4SLinus Torvaldsconfig NR_CPUS 16021da177e4SLinus Torvalds int "Maximum number of CPUs (2-32)" 16031da177e4SLinus Torvalds range 2 32 16041da177e4SLinus Torvalds depends on SMP 16051da177e4SLinus Torvalds default "4" 16061da177e4SLinus Torvalds 1607a054a811SRussell Kingconfig HOTPLUG_CPU 1608a054a811SRussell King bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" 1609a054a811SRussell King depends on SMP && HOTPLUG && EXPERIMENTAL 1610a054a811SRussell King help 1611a054a811SRussell King Say Y here to experiment with turning CPUs off and on. CPUs 1612a054a811SRussell King can be controlled through /sys/devices/system/cpu. 1613a054a811SRussell King 161437ee16aeSRussell Kingconfig LOCAL_TIMERS 161537ee16aeSRussell King bool "Use local timer interrupts" 1616971acb9bSRussell King depends on SMP 161737ee16aeSRussell King default y 161830d8beadSChanghwan Youn select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT) 161937ee16aeSRussell King help 162037ee16aeSRussell King Enable support for local timers on SMP platforms, rather then the 162137ee16aeSRussell King legacy IPI broadcast method. Local timers allows the system 162237ee16aeSRussell King accounting to be spread across the timer interval, preventing a 162337ee16aeSRussell King "thundering herd" at every timer tick. 162437ee16aeSRussell King 162544986ab0SPeter De Schrijver (NVIDIA)config ARCH_NR_GPIO 162644986ab0SPeter De Schrijver (NVIDIA) int 16273dea19e8SPeter De Schrijver (NVIDIA) default 1024 if ARCH_SHMOBILE || ARCH_TEGRA 162870227a45SPhilippe Langlais default 355 if ARCH_U8500 16299a01ec30SPaul Parsons default 264 if MACH_H4700 163039f47d9fSTarun Kanti DebBarma default 512 if SOC_OMAP5 163144986ab0SPeter De Schrijver (NVIDIA) default 0 163244986ab0SPeter De Schrijver (NVIDIA) help 163344986ab0SPeter De Schrijver (NVIDIA) Maximum number of GPIOs in the system. 163444986ab0SPeter De Schrijver (NVIDIA) 163544986ab0SPeter De Schrijver (NVIDIA) If unsure, leave the default value. 163644986ab0SPeter De Schrijver (NVIDIA) 1637d45a398fSUwe Kleine-Königsource kernel/Kconfig.preempt 16381da177e4SLinus Torvalds 1639f8065813SRussell Kingconfig HZ 1640f8065813SRussell King int 1641b130d5c2SKukjin Kim default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \ 1642a73ddc61SKukjin Kim ARCH_S5PV210 || ARCH_EXYNOS4 1643bfe65704SRussell King default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER 16445248c657SDavid Brownell default AT91_TIMER_HZ if ARCH_AT91 16455da3e714SMagnus Damm default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE 1646f8065813SRussell King default 100 1647f8065813SRussell King 164816c79651SCatalin Marinasconfig THUMB2_KERNEL 16494a50bfe3SRussell King bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" 1650e399b1a4SRussell King depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL 165116c79651SCatalin Marinas select AEABI 165216c79651SCatalin Marinas select ARM_ASM_UNIFIED 165389bace65SArnd Bergmann select ARM_UNWIND 165416c79651SCatalin Marinas help 165516c79651SCatalin Marinas By enabling this option, the kernel will be compiled in 165616c79651SCatalin Marinas Thumb-2 mode. A compiler/assembler that understand the unified 165716c79651SCatalin Marinas ARM-Thumb syntax is needed. 165816c79651SCatalin Marinas 165916c79651SCatalin Marinas If unsure, say N. 166016c79651SCatalin Marinas 16616f685c5cSDave Martinconfig THUMB2_AVOID_R_ARM_THM_JUMP11 16626f685c5cSDave Martin bool "Work around buggy Thumb-2 short branch relocations in gas" 16636f685c5cSDave Martin depends on THUMB2_KERNEL && MODULES 16646f685c5cSDave Martin default y 16656f685c5cSDave Martin help 16666f685c5cSDave Martin Various binutils versions can resolve Thumb-2 branches to 16676f685c5cSDave Martin locally-defined, preemptible global symbols as short-range "b.n" 16686f685c5cSDave Martin branch instructions. 16696f685c5cSDave Martin 16706f685c5cSDave Martin This is a problem, because there's no guarantee the final 16716f685c5cSDave Martin destination of the symbol, or any candidate locations for a 16726f685c5cSDave Martin trampoline, are within range of the branch. For this reason, the 16736f685c5cSDave Martin kernel does not support fixing up the R_ARM_THM_JUMP11 (102) 16746f685c5cSDave Martin relocation in modules at all, and it makes little sense to add 16756f685c5cSDave Martin support. 16766f685c5cSDave Martin 16776f685c5cSDave Martin The symptom is that the kernel fails with an "unsupported 16786f685c5cSDave Martin relocation" error when loading some modules. 16796f685c5cSDave Martin 16806f685c5cSDave Martin Until fixed tools are available, passing 16816f685c5cSDave Martin -fno-optimize-sibling-calls to gcc should prevent gcc generating 16826f685c5cSDave Martin code which hits this problem, at the cost of a bit of extra runtime 16836f685c5cSDave Martin stack usage in some cases. 16846f685c5cSDave Martin 16856f685c5cSDave Martin The problem is described in more detail at: 16866f685c5cSDave Martin https://bugs.launchpad.net/binutils-linaro/+bug/725126 16876f685c5cSDave Martin 16886f685c5cSDave Martin Only Thumb-2 kernels are affected. 16896f685c5cSDave Martin 16906f685c5cSDave Martin Unless you are sure your tools don't have this problem, say Y. 16916f685c5cSDave Martin 16920becb088SCatalin Marinasconfig ARM_ASM_UNIFIED 16930becb088SCatalin Marinas bool 16940becb088SCatalin Marinas 1695704bdda0SNicolas Pitreconfig AEABI 1696704bdda0SNicolas Pitre bool "Use the ARM EABI to compile the kernel" 1697704bdda0SNicolas Pitre help 1698704bdda0SNicolas Pitre This option allows for the kernel to be compiled using the latest 1699704bdda0SNicolas Pitre ARM ABI (aka EABI). This is only useful if you are using a user 1700704bdda0SNicolas Pitre space environment that is also compiled with EABI. 1701704bdda0SNicolas Pitre 1702704bdda0SNicolas Pitre Since there are major incompatibilities between the legacy ABI and 1703704bdda0SNicolas Pitre EABI, especially with regard to structure member alignment, this 1704704bdda0SNicolas Pitre option also changes the kernel syscall calling convention to 1705704bdda0SNicolas Pitre disambiguate both ABIs and allow for backward compatibility support 1706704bdda0SNicolas Pitre (selected with CONFIG_OABI_COMPAT). 1707704bdda0SNicolas Pitre 1708704bdda0SNicolas Pitre To use this you need GCC version 4.0.0 or later. 1709704bdda0SNicolas Pitre 17106c90c872SNicolas Pitreconfig OABI_COMPAT 1711a73a3ff1SRussell King bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" 17129bc433a1SDave Martin depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL 17136c90c872SNicolas Pitre default y 17146c90c872SNicolas Pitre help 17156c90c872SNicolas Pitre This option preserves the old syscall interface along with the 17166c90c872SNicolas Pitre new (ARM EABI) one. It also provides a compatibility layer to 17176c90c872SNicolas Pitre intercept syscalls that have structure arguments which layout 17186c90c872SNicolas Pitre in memory differs between the legacy ABI and the new ARM EABI 17196c90c872SNicolas Pitre (only for non "thumb" binaries). This option adds a tiny 17206c90c872SNicolas Pitre overhead to all syscalls and produces a slightly larger kernel. 17216c90c872SNicolas Pitre If you know you'll be using only pure EABI user space then you 17226c90c872SNicolas Pitre can say N here. If this option is not selected and you attempt 17236c90c872SNicolas Pitre to execute a legacy ABI binary then the result will be 17246c90c872SNicolas Pitre UNPREDICTABLE (in fact it can be predicted that it won't work 17256c90c872SNicolas Pitre at all). If in doubt say Y. 17266c90c872SNicolas Pitre 1727eb33575cSMel Gormanconfig ARCH_HAS_HOLES_MEMORYMODEL 1728e80d6a24SMel Gorman bool 1729e80d6a24SMel Gorman 173005944d74SRussell Kingconfig ARCH_SPARSEMEM_ENABLE 173105944d74SRussell King bool 173205944d74SRussell King 173307a2f737SRussell Kingconfig ARCH_SPARSEMEM_DEFAULT 173407a2f737SRussell King def_bool ARCH_SPARSEMEM_ENABLE 173507a2f737SRussell King 173605944d74SRussell Kingconfig ARCH_SELECT_MEMORY_MODEL 1737be370302SRussell King def_bool ARCH_SPARSEMEM_ENABLE 1738c80d79d7SYasunori Goto 17397b7bf499SWill Deaconconfig HAVE_ARCH_PFN_VALID 17407b7bf499SWill Deacon def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM 17417b7bf499SWill Deacon 1742053a96caSNicolas Pitreconfig HIGHMEM 1743e8db89a2SRussell King bool "High Memory Support" 1744e8db89a2SRussell King depends on MMU 1745053a96caSNicolas Pitre help 1746053a96caSNicolas Pitre The address space of ARM processors is only 4 Gigabytes large 1747053a96caSNicolas Pitre and it has to accommodate user address space, kernel address 1748053a96caSNicolas Pitre space as well as some memory mapped IO. That means that, if you 1749053a96caSNicolas Pitre have a large amount of physical memory and/or IO, not all of the 1750053a96caSNicolas Pitre memory can be "permanently mapped" by the kernel. The physical 1751053a96caSNicolas Pitre memory that is not permanently mapped is called "high memory". 1752053a96caSNicolas Pitre 1753053a96caSNicolas Pitre Depending on the selected kernel/user memory split, minimum 1754053a96caSNicolas Pitre vmalloc space and actual amount of RAM, you may not need this 1755053a96caSNicolas Pitre option which should result in a slightly faster kernel. 1756053a96caSNicolas Pitre 1757053a96caSNicolas Pitre If unsure, say n. 1758053a96caSNicolas Pitre 175965cec8e3SRussell Kingconfig HIGHPTE 176065cec8e3SRussell King bool "Allocate 2nd-level pagetables from highmem" 176165cec8e3SRussell King depends on HIGHMEM 176265cec8e3SRussell King 17631b8873a0SJamie Ilesconfig HW_PERF_EVENTS 17641b8873a0SJamie Iles bool "Enable hardware performance counter support for perf events" 1765fe166148SWill Deacon depends on PERF_EVENTS && CPU_HAS_PMU 17661b8873a0SJamie Iles default y 17671b8873a0SJamie Iles help 17681b8873a0SJamie Iles Enable hardware performance counter support for perf events. If 17691b8873a0SJamie Iles disabled, perf events will use software events only. 17701b8873a0SJamie Iles 17713f22ab27SDave Hansensource "mm/Kconfig" 17723f22ab27SDave Hansen 1773c1b2d970SMagnus Dammconfig FORCE_MAX_ZONEORDER 1774c1b2d970SMagnus Damm int "Maximum zone order" if ARCH_SHMOBILE 1775c1b2d970SMagnus Damm range 11 64 if ARCH_SHMOBILE 1776c1b2d970SMagnus Damm default "9" if SA1111 1777c1b2d970SMagnus Damm default "11" 1778c1b2d970SMagnus Damm help 1779c1b2d970SMagnus Damm The kernel memory allocator divides physically contiguous memory 1780c1b2d970SMagnus Damm blocks into "zones", where each zone is a power of two number of 1781c1b2d970SMagnus Damm pages. This option selects the largest power of two that the kernel 1782c1b2d970SMagnus Damm keeps in the memory allocator. If you need to allocate very large 1783c1b2d970SMagnus Damm blocks of physically contiguous memory, then you may need to 1784c1b2d970SMagnus Damm increase this value. 1785c1b2d970SMagnus Damm 1786c1b2d970SMagnus Damm This config option is actually maximum order plus one. For example, 1787c1b2d970SMagnus Damm a value of 11 means that the largest free memory block is 2^10 pages. 1788c1b2d970SMagnus Damm 17891da177e4SLinus Torvaldsconfig LEDS 17901da177e4SLinus Torvalds bool "Timer and CPU usage LEDs" 1791e055d5bfSAdrian Bunk depends on ARCH_CDB89712 || ARCH_EBSA110 || \ 17928c8fdbc9SSascha Hauer ARCH_EBSA285 || ARCH_INTEGRATOR || \ 17931da177e4SLinus Torvalds ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ 17941da177e4SLinus Torvalds ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ 179573a59c1cSSAN People ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ 179625329671SJürgen Schindele ARCH_AT91 || ARCH_DAVINCI || \ 1797ff3042fbSColin Tuckley ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW 17981da177e4SLinus Torvalds help 17991da177e4SLinus Torvalds If you say Y here, the LEDs on your machine will be used 18001da177e4SLinus Torvalds to provide useful information about your current system status. 18011da177e4SLinus Torvalds 18021da177e4SLinus Torvalds If you are compiling a kernel for a NetWinder or EBSA-285, you will 18031da177e4SLinus Torvalds be able to select which LEDs are active using the options below. If 18041da177e4SLinus Torvalds you are compiling a kernel for the EBSA-110 or the LART however, the 18051da177e4SLinus Torvalds red LED will simply flash regularly to indicate that the system is 18061da177e4SLinus Torvalds still functional. It is safe to say Y here if you have a CATS 18071da177e4SLinus Torvalds system, but the driver will do nothing. 18081da177e4SLinus Torvalds 18091da177e4SLinus Torvaldsconfig LEDS_TIMER 18101da177e4SLinus Torvalds bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ 1811eebdf7d7SDavid Brownell OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ 1812eebdf7d7SDavid Brownell || MACH_OMAP_PERSEUS2 18131da177e4SLinus Torvalds depends on LEDS 18140567a0c0SKevin Hilman depends on !GENERIC_CLOCKEVENTS 18151da177e4SLinus Torvalds default y if ARCH_EBSA110 18161da177e4SLinus Torvalds help 18171da177e4SLinus Torvalds If you say Y here, one of the system LEDs (the green one on the 18181da177e4SLinus Torvalds NetWinder, the amber one on the EBSA285, or the red one on the LART) 18191da177e4SLinus Torvalds will flash regularly to indicate that the system is still 18201da177e4SLinus Torvalds operational. This is mainly useful to kernel hackers who are 18211da177e4SLinus Torvalds debugging unstable kernels. 18221da177e4SLinus Torvalds 18231da177e4SLinus Torvalds The LART uses the same LED for both Timer LED and CPU usage LED 18241da177e4SLinus Torvalds functions. You may choose to use both, but the Timer LED function 18251da177e4SLinus Torvalds will overrule the CPU usage LED. 18261da177e4SLinus Torvalds 18271da177e4SLinus Torvaldsconfig LEDS_CPU 18281da177e4SLinus Torvalds bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ 1829eebdf7d7SDavid Brownell !ARCH_OMAP) \ 1830eebdf7d7SDavid Brownell || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ 1831eebdf7d7SDavid Brownell || MACH_OMAP_PERSEUS2 18321da177e4SLinus Torvalds depends on LEDS 18331da177e4SLinus Torvalds help 18341da177e4SLinus Torvalds If you say Y here, the red LED will be used to give a good real 18351da177e4SLinus Torvalds time indication of CPU usage, by lighting whenever the idle task 18361da177e4SLinus Torvalds is not currently executing. 18371da177e4SLinus Torvalds 18381da177e4SLinus Torvalds The LART uses the same LED for both Timer LED and CPU usage LED 18391da177e4SLinus Torvalds functions. You may choose to use both, but the Timer LED function 18401da177e4SLinus Torvalds will overrule the CPU usage LED. 18411da177e4SLinus Torvalds 18421da177e4SLinus Torvaldsconfig ALIGNMENT_TRAP 18431da177e4SLinus Torvalds bool 1844f12d0d7cSHyok S. Choi depends on CPU_CP15_MMU 18451da177e4SLinus Torvalds default y if !ARCH_EBSA110 1846e119bfffSRussell King select HAVE_PROC_CPU if PROC_FS 18471da177e4SLinus Torvalds help 18481da177e4SLinus Torvalds ARM processors cannot fetch/store information which is not 18491da177e4SLinus Torvalds naturally aligned on the bus, i.e., a 4 byte fetch must start at an 18501da177e4SLinus Torvalds address divisible by 4. On 32-bit ARM processors, these non-aligned 18511da177e4SLinus Torvalds fetch/store instructions will be emulated in software if you say 18521da177e4SLinus Torvalds here, which has a severe performance impact. This is necessary for 18531da177e4SLinus Torvalds correct operation of some network protocols. With an IP-only 18541da177e4SLinus Torvalds configuration it is safe to say N, otherwise say Y. 18551da177e4SLinus Torvalds 185639ec58f3SLennert Buytenhekconfig UACCESS_WITH_MEMCPY 185739ec58f3SLennert Buytenhek bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" 185839ec58f3SLennert Buytenhek depends on MMU && EXPERIMENTAL 185939ec58f3SLennert Buytenhek default y if CPU_FEROCEON 186039ec58f3SLennert Buytenhek help 186139ec58f3SLennert Buytenhek Implement faster copy_to_user and clear_user methods for CPU 186239ec58f3SLennert Buytenhek cores where a 8-word STM instruction give significantly higher 186339ec58f3SLennert Buytenhek memory write throughput than a sequence of individual 32bit stores. 186439ec58f3SLennert Buytenhek 186539ec58f3SLennert Buytenhek A possible side effect is a slight increase in scheduling latency 186639ec58f3SLennert Buytenhek between threads sharing the same address space if they invoke 186739ec58f3SLennert Buytenhek such copy operations with large buffers. 186839ec58f3SLennert Buytenhek 186939ec58f3SLennert Buytenhek However, if the CPU data cache is using a write-allocate mode, 187039ec58f3SLennert Buytenhek this option is unlikely to provide any performance gain. 187139ec58f3SLennert Buytenhek 187270c70d97SNicolas Pitreconfig SECCOMP 187370c70d97SNicolas Pitre bool 187470c70d97SNicolas Pitre prompt "Enable seccomp to safely compute untrusted bytecode" 187570c70d97SNicolas Pitre ---help--- 187670c70d97SNicolas Pitre This kernel feature is useful for number crunching applications 187770c70d97SNicolas Pitre that may need to compute untrusted bytecode during their 187870c70d97SNicolas Pitre execution. By using pipes or other transports made available to 187970c70d97SNicolas Pitre the process as file descriptors supporting the read/write 188070c70d97SNicolas Pitre syscalls, it's possible to isolate those applications in 188170c70d97SNicolas Pitre their own address space using seccomp. Once seccomp is 188270c70d97SNicolas Pitre enabled via prctl(PR_SET_SECCOMP), it cannot be disabled 188370c70d97SNicolas Pitre and the task is only allowed to execute a few safe syscalls 188470c70d97SNicolas Pitre defined by each seccomp mode. 188570c70d97SNicolas Pitre 1886c743f380SNicolas Pitreconfig CC_STACKPROTECTOR 1887c743f380SNicolas Pitre bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" 18884a50bfe3SRussell King depends on EXPERIMENTAL 1889c743f380SNicolas Pitre help 1890c743f380SNicolas Pitre This option turns on the -fstack-protector GCC feature. This 1891c743f380SNicolas Pitre feature puts, at the beginning of functions, a canary value on 1892c743f380SNicolas Pitre the stack just before the return address, and validates 1893c743f380SNicolas Pitre the value just before actually returning. Stack based buffer 1894c743f380SNicolas Pitre overflows (that need to overwrite this return address) now also 1895c743f380SNicolas Pitre overwrite the canary, which gets detected and the attack is then 1896c743f380SNicolas Pitre neutralized via a kernel panic. 1897c743f380SNicolas Pitre This feature requires gcc version 4.2 or above. 1898c743f380SNicolas Pitre 189973a65b3fSUwe Kleine-Königconfig DEPRECATED_PARAM_STRUCT 190073a65b3fSUwe Kleine-König bool "Provide old way to pass kernel parameters" 190173a65b3fSUwe Kleine-König help 190273a65b3fSUwe Kleine-König This was deprecated in 2001 and announced to live on for 5 years. 190373a65b3fSUwe Kleine-König Some old boot loaders still use this way. 190473a65b3fSUwe Kleine-König 19051da177e4SLinus Torvaldsendmenu 19061da177e4SLinus Torvalds 19071da177e4SLinus Torvaldsmenu "Boot options" 19081da177e4SLinus Torvalds 19099eb8f674SGrant Likelyconfig USE_OF 19109eb8f674SGrant Likely bool "Flattened Device Tree support" 19119eb8f674SGrant Likely select OF 19129eb8f674SGrant Likely select OF_EARLY_FLATTREE 191308a543adSGrant Likely select IRQ_DOMAIN 19149eb8f674SGrant Likely help 19159eb8f674SGrant Likely Include support for flattened device tree machine descriptions. 19169eb8f674SGrant Likely 19171da177e4SLinus Torvalds# Compressed boot loader in ROM. Yes, we really want to ask about 19181da177e4SLinus Torvalds# TEXT and BSS so we preserve their values in the config files. 19191da177e4SLinus Torvaldsconfig ZBOOT_ROM_TEXT 19201da177e4SLinus Torvalds hex "Compressed ROM boot loader base address" 19211da177e4SLinus Torvalds default "0" 19221da177e4SLinus Torvalds help 19231da177e4SLinus Torvalds The physical address at which the ROM-able zImage is to be 19241da177e4SLinus Torvalds placed in the target. Platforms which normally make use of 19251da177e4SLinus Torvalds ROM-able zImage formats normally set this to a suitable 19261da177e4SLinus Torvalds value in their defconfig file. 19271da177e4SLinus Torvalds 19281da177e4SLinus Torvalds If ZBOOT_ROM is not enabled, this has no effect. 19291da177e4SLinus Torvalds 19301da177e4SLinus Torvaldsconfig ZBOOT_ROM_BSS 19311da177e4SLinus Torvalds hex "Compressed ROM boot loader BSS address" 19321da177e4SLinus Torvalds default "0" 19331da177e4SLinus Torvalds help 1934f8c440b2SDan Fandrich The base address of an area of read/write memory in the target 1935f8c440b2SDan Fandrich for the ROM-able zImage which must be available while the 1936f8c440b2SDan Fandrich decompressor is running. It must be large enough to hold the 1937f8c440b2SDan Fandrich entire decompressed kernel plus an additional 128 KiB. 1938f8c440b2SDan Fandrich Platforms which normally make use of ROM-able zImage formats 1939f8c440b2SDan Fandrich normally set this to a suitable value in their defconfig file. 19401da177e4SLinus Torvalds 19411da177e4SLinus Torvalds If ZBOOT_ROM is not enabled, this has no effect. 19421da177e4SLinus Torvalds 19431da177e4SLinus Torvaldsconfig ZBOOT_ROM 19441da177e4SLinus Torvalds bool "Compressed boot loader in ROM/flash" 19451da177e4SLinus Torvalds depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS 19461da177e4SLinus Torvalds help 19471da177e4SLinus Torvalds Say Y here if you intend to execute your compressed kernel image 19481da177e4SLinus Torvalds (zImage) directly from ROM or flash. If unsure, say N. 19491da177e4SLinus Torvalds 1950090ab3ffSSimon Hormanchoice 1951090ab3ffSSimon Horman prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)" 1952090ab3ffSSimon Horman depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL 1953090ab3ffSSimon Horman default ZBOOT_ROM_NONE 1954090ab3ffSSimon Horman help 1955090ab3ffSSimon Horman Include experimental SD/MMC loading code in the ROM-able zImage. 195659bf8964SMasanari Iida With this enabled it is possible to write the ROM-able zImage 1957090ab3ffSSimon Horman kernel image to an MMC or SD card and boot the kernel straight 1958090ab3ffSSimon Horman from the reset vector. At reset the processor Mask ROM will load 195959bf8964SMasanari Iida the first part of the ROM-able zImage which in turn loads the 1960090ab3ffSSimon Horman rest the kernel image to RAM. 1961090ab3ffSSimon Horman 1962090ab3ffSSimon Hormanconfig ZBOOT_ROM_NONE 1963090ab3ffSSimon Horman bool "No SD/MMC loader in zImage (EXPERIMENTAL)" 1964090ab3ffSSimon Horman help 1965090ab3ffSSimon Horman Do not load image from SD or MMC 1966090ab3ffSSimon Horman 1967f45b1149SSimon Hormanconfig ZBOOT_ROM_MMCIF 1968f45b1149SSimon Horman bool "Include MMCIF loader in zImage (EXPERIMENTAL)" 1969f45b1149SSimon Horman help 1970090ab3ffSSimon Horman Load image from MMCIF hardware block. 1971090ab3ffSSimon Horman 1972090ab3ffSSimon Hormanconfig ZBOOT_ROM_SH_MOBILE_SDHI 1973090ab3ffSSimon Horman bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)" 1974090ab3ffSSimon Horman help 1975090ab3ffSSimon Horman Load image from SDHI hardware block 1976090ab3ffSSimon Horman 1977090ab3ffSSimon Hormanendchoice 1978f45b1149SSimon Horman 1979e2a6a3aaSJohn Bonesioconfig ARM_APPENDED_DTB 1980e2a6a3aaSJohn Bonesio bool "Use appended device tree blob to zImage (EXPERIMENTAL)" 1981e2a6a3aaSJohn Bonesio depends on OF && !ZBOOT_ROM && EXPERIMENTAL 1982e2a6a3aaSJohn Bonesio help 1983e2a6a3aaSJohn Bonesio With this option, the boot code will look for a device tree binary 1984e2a6a3aaSJohn Bonesio (DTB) appended to zImage 1985e2a6a3aaSJohn Bonesio (e.g. cat zImage <filename>.dtb > zImage_w_dtb). 1986e2a6a3aaSJohn Bonesio 1987e2a6a3aaSJohn Bonesio This is meant as a backward compatibility convenience for those 1988e2a6a3aaSJohn Bonesio systems with a bootloader that can't be upgraded to accommodate 1989e2a6a3aaSJohn Bonesio the documented boot protocol using a device tree. 1990e2a6a3aaSJohn Bonesio 1991e2a6a3aaSJohn Bonesio Beware that there is very little in terms of protection against 1992e2a6a3aaSJohn Bonesio this option being confused by leftover garbage in memory that might 1993e2a6a3aaSJohn Bonesio look like a DTB header after a reboot if no actual DTB is appended 1994e2a6a3aaSJohn Bonesio to zImage. Do not leave this option active in a production kernel 1995e2a6a3aaSJohn Bonesio if you don't intend to always append a DTB. Proper passing of the 1996e2a6a3aaSJohn Bonesio location into r2 of a bootloader provided DTB is always preferable 1997e2a6a3aaSJohn Bonesio to this option. 1998e2a6a3aaSJohn Bonesio 1999b90b9a38SNicolas Pitreconfig ARM_ATAG_DTB_COMPAT 2000b90b9a38SNicolas Pitre bool "Supplement the appended DTB with traditional ATAG information" 2001b90b9a38SNicolas Pitre depends on ARM_APPENDED_DTB 2002b90b9a38SNicolas Pitre help 2003b90b9a38SNicolas Pitre Some old bootloaders can't be updated to a DTB capable one, yet 2004b90b9a38SNicolas Pitre they provide ATAGs with memory configuration, the ramdisk address, 2005b90b9a38SNicolas Pitre the kernel cmdline string, etc. Such information is dynamically 2006b90b9a38SNicolas Pitre provided by the bootloader and can't always be stored in a static 2007b90b9a38SNicolas Pitre DTB. To allow a device tree enabled kernel to be used with such 2008b90b9a38SNicolas Pitre bootloaders, this option allows zImage to extract the information 2009b90b9a38SNicolas Pitre from the ATAG list and store it at run time into the appended DTB. 2010b90b9a38SNicolas Pitre 2011d0f34a11SGenoud Richardchoice 2012d0f34a11SGenoud Richard prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT 2013d0f34a11SGenoud Richard default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER 2014d0f34a11SGenoud Richard 2015d0f34a11SGenoud Richardconfig ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER 2016d0f34a11SGenoud Richard bool "Use bootloader kernel arguments if available" 2017d0f34a11SGenoud Richard help 2018d0f34a11SGenoud Richard Uses the command-line options passed by the boot loader instead of 2019d0f34a11SGenoud Richard the device tree bootargs property. If the boot loader doesn't provide 2020d0f34a11SGenoud Richard any, the device tree bootargs property will be used. 2021d0f34a11SGenoud Richard 2022d0f34a11SGenoud Richardconfig ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND 2023d0f34a11SGenoud Richard bool "Extend with bootloader kernel arguments" 2024d0f34a11SGenoud Richard help 2025d0f34a11SGenoud Richard The command-line arguments provided by the boot loader will be 2026d0f34a11SGenoud Richard appended to the the device tree bootargs property. 2027d0f34a11SGenoud Richard 2028d0f34a11SGenoud Richardendchoice 2029d0f34a11SGenoud Richard 20301da177e4SLinus Torvaldsconfig CMDLINE 20311da177e4SLinus Torvalds string "Default kernel command string" 20321da177e4SLinus Torvalds default "" 20331da177e4SLinus Torvalds help 20341da177e4SLinus Torvalds On some architectures (EBSA110 and CATS), there is currently no way 20351da177e4SLinus Torvalds for the boot loader to pass arguments to the kernel. For these 20361da177e4SLinus Torvalds architectures, you should supply some command-line options at build 20371da177e4SLinus Torvalds time by entering them here. As a minimum, you should specify the 20381da177e4SLinus Torvalds memory size and the root device (e.g., mem=64M root=/dev/nfs). 20391da177e4SLinus Torvalds 20404394c124SVictor Boiviechoice 20414394c124SVictor Boivie prompt "Kernel command line type" if CMDLINE != "" 20424394c124SVictor Boivie default CMDLINE_FROM_BOOTLOADER 20434394c124SVictor Boivie 20444394c124SVictor Boivieconfig CMDLINE_FROM_BOOTLOADER 20454394c124SVictor Boivie bool "Use bootloader kernel arguments if available" 20464394c124SVictor Boivie help 20474394c124SVictor Boivie Uses the command-line options passed by the boot loader. If 20484394c124SVictor Boivie the boot loader doesn't provide any, the default kernel command 20494394c124SVictor Boivie string provided in CMDLINE will be used. 20504394c124SVictor Boivie 20514394c124SVictor Boivieconfig CMDLINE_EXTEND 20524394c124SVictor Boivie bool "Extend bootloader kernel arguments" 20534394c124SVictor Boivie help 20544394c124SVictor Boivie The command-line arguments provided by the boot loader will be 20554394c124SVictor Boivie appended to the default kernel command string. 20564394c124SVictor Boivie 205792d2040dSAlexander Hollerconfig CMDLINE_FORCE 205892d2040dSAlexander Holler bool "Always use the default kernel command string" 205992d2040dSAlexander Holler help 206092d2040dSAlexander Holler Always use the default kernel command string, even if the boot 206192d2040dSAlexander Holler loader passes other arguments to the kernel. 206292d2040dSAlexander Holler This is useful if you cannot or don't want to change the 206392d2040dSAlexander Holler command-line options your boot loader passes to the kernel. 20644394c124SVictor Boivieendchoice 206592d2040dSAlexander Holler 20661da177e4SLinus Torvaldsconfig XIP_KERNEL 20671da177e4SLinus Torvalds bool "Kernel Execute-In-Place from ROM" 2068497b7e94SCatalin Marinas depends on !ZBOOT_ROM && !ARM_LPAE 20691da177e4SLinus Torvalds help 20701da177e4SLinus Torvalds Execute-In-Place allows the kernel to run from non-volatile storage 20711da177e4SLinus Torvalds directly addressable by the CPU, such as NOR flash. This saves RAM 20721da177e4SLinus Torvalds space since the text section of the kernel is not loaded from flash 20731da177e4SLinus Torvalds to RAM. Read-write sections, such as the data section and stack, 20741da177e4SLinus Torvalds are still copied to RAM. The XIP kernel is not compressed since 20751da177e4SLinus Torvalds it has to run directly from flash, so it will take more space to 20761da177e4SLinus Torvalds store it. The flash address used to link the kernel object files, 20771da177e4SLinus Torvalds and for storing it, is configuration dependent. Therefore, if you 20781da177e4SLinus Torvalds say Y here, you must know the proper physical address where to 20791da177e4SLinus Torvalds store the kernel image depending on your own flash memory usage. 20801da177e4SLinus Torvalds 20811da177e4SLinus Torvalds Also note that the make target becomes "make xipImage" rather than 20821da177e4SLinus Torvalds "make zImage" or "make Image". The final kernel binary to put in 20831da177e4SLinus Torvalds ROM memory will be arch/arm/boot/xipImage. 20841da177e4SLinus Torvalds 20851da177e4SLinus Torvalds If unsure, say N. 20861da177e4SLinus Torvalds 20871da177e4SLinus Torvaldsconfig XIP_PHYS_ADDR 20881da177e4SLinus Torvalds hex "XIP Kernel Physical Location" 20891da177e4SLinus Torvalds depends on XIP_KERNEL 20901da177e4SLinus Torvalds default "0x00080000" 20911da177e4SLinus Torvalds help 20921da177e4SLinus Torvalds This is the physical address in your flash memory the kernel will 20931da177e4SLinus Torvalds be linked for and stored to. This address is dependent on your 20941da177e4SLinus Torvalds own flash usage. 20951da177e4SLinus Torvalds 2096c587e4a6SRichard Purdieconfig KEXEC 2097c587e4a6SRichard Purdie bool "Kexec system call (EXPERIMENTAL)" 209802b73e2eSWill Deacon depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU) 2099c587e4a6SRichard Purdie help 2100c587e4a6SRichard Purdie kexec is a system call that implements the ability to shutdown your 2101c587e4a6SRichard Purdie current kernel, and to start another kernel. It is like a reboot 210201dd2fbfSMatt LaPlante but it is independent of the system firmware. And like a reboot 2103c587e4a6SRichard Purdie you can start any kernel with it, not just Linux. 2104c587e4a6SRichard Purdie 2105c587e4a6SRichard Purdie It is an ongoing process to be certain the hardware in a machine 2106c587e4a6SRichard Purdie is properly shutdown, so do not be surprised if this code does not 2107c587e4a6SRichard Purdie initially work for you. It may help to enable device hotplugging 2108c587e4a6SRichard Purdie support. 2109c587e4a6SRichard Purdie 21104cd9d6f7SRichard Purdieconfig ATAGS_PROC 21114cd9d6f7SRichard Purdie bool "Export atags in procfs" 2112b98d7291SUli Luckas depends on KEXEC 2113b98d7291SUli Luckas default y 21144cd9d6f7SRichard Purdie help 21154cd9d6f7SRichard Purdie Should the atags used to boot the kernel be exported in an "atags" 21164cd9d6f7SRichard Purdie file in procfs. Useful with kexec. 21174cd9d6f7SRichard Purdie 2118cb5d39b3SMika Westerbergconfig CRASH_DUMP 2119cb5d39b3SMika Westerberg bool "Build kdump crash kernel (EXPERIMENTAL)" 2120cb5d39b3SMika Westerberg depends on EXPERIMENTAL 2121cb5d39b3SMika Westerberg help 2122cb5d39b3SMika Westerberg Generate crash dump after being started by kexec. This should 2123cb5d39b3SMika Westerberg be normally only set in special crash dump kernels which are 2124cb5d39b3SMika Westerberg loaded in the main kernel with kexec-tools into a specially 2125cb5d39b3SMika Westerberg reserved region and then later executed after a crash by 2126cb5d39b3SMika Westerberg kdump/kexec. The crash dump kernel must be compiled to a 2127cb5d39b3SMika Westerberg memory address not used by the main kernel 2128cb5d39b3SMika Westerberg 2129cb5d39b3SMika Westerberg For more details see Documentation/kdump/kdump.txt 2130cb5d39b3SMika Westerberg 2131e69edc79SEric Miaoconfig AUTO_ZRELADDR 2132e69edc79SEric Miao bool "Auto calculation of the decompressed kernel image address" 2133e69edc79SEric Miao depends on !ZBOOT_ROM && !ARCH_U300 2134e69edc79SEric Miao help 2135e69edc79SEric Miao ZRELADDR is the physical address where the decompressed kernel 2136e69edc79SEric Miao image will be placed. If AUTO_ZRELADDR is selected, the address 2137e69edc79SEric Miao will be determined at run-time by masking the current IP with 2138e69edc79SEric Miao 0xf8000000. This assumes the zImage being placed in the first 128MB 2139e69edc79SEric Miao from start of memory. 2140e69edc79SEric Miao 21411da177e4SLinus Torvaldsendmenu 21421da177e4SLinus Torvalds 2143ac9d7efcSRussell Kingmenu "CPU Power Management" 21441da177e4SLinus Torvalds 214589c52ed4SBen Dooksif ARCH_HAS_CPUFREQ 21461da177e4SLinus Torvalds 21471da177e4SLinus Torvaldssource "drivers/cpufreq/Kconfig" 21481da177e4SLinus Torvalds 214964f102b6SYong Shenconfig CPU_FREQ_IMX 215064f102b6SYong Shen tristate "CPUfreq driver for i.MX CPUs" 215164f102b6SYong Shen depends on ARCH_MXC && CPU_FREQ 215264f102b6SYong Shen help 215364f102b6SYong Shen This enables the CPUfreq driver for i.MX CPUs. 215464f102b6SYong Shen 21551da177e4SLinus Torvaldsconfig CPU_FREQ_SA1100 21561da177e4SLinus Torvalds bool 21571da177e4SLinus Torvalds 21581da177e4SLinus Torvaldsconfig CPU_FREQ_SA1110 21591da177e4SLinus Torvalds bool 21601da177e4SLinus Torvalds 21611da177e4SLinus Torvaldsconfig CPU_FREQ_INTEGRATOR 21621da177e4SLinus Torvalds tristate "CPUfreq driver for ARM Integrator CPUs" 21631da177e4SLinus Torvalds depends on ARCH_INTEGRATOR && CPU_FREQ 21641da177e4SLinus Torvalds default y 21651da177e4SLinus Torvalds help 21661da177e4SLinus Torvalds This enables the CPUfreq driver for ARM Integrator CPUs. 21671da177e4SLinus Torvalds 21681da177e4SLinus Torvalds For details, take a look at <file:Documentation/cpu-freq>. 21691da177e4SLinus Torvalds 21701da177e4SLinus Torvalds If in doubt, say Y. 21711da177e4SLinus Torvalds 21729e2697ffSRussell Kingconfig CPU_FREQ_PXA 21739e2697ffSRussell King bool 21749e2697ffSRussell King depends on CPU_FREQ && ARCH_PXA && PXA25x 21759e2697ffSRussell King default y 2176ca7d156eSArnd Bergmann select CPU_FREQ_TABLE 21779e2697ffSRussell King select CPU_FREQ_DEFAULT_GOV_USERSPACE 21789e2697ffSRussell King 21799d56c02aSBen Dooksconfig CPU_FREQ_S3C 21809d56c02aSBen Dooks bool 21819d56c02aSBen Dooks help 21829d56c02aSBen Dooks Internal configuration node for common cpufreq on Samsung SoC 21839d56c02aSBen Dooks 21849d56c02aSBen Dooksconfig CPU_FREQ_S3C24XX 21854a50bfe3SRussell King bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" 2186b130d5c2SKukjin Kim depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL 21879d56c02aSBen Dooks select CPU_FREQ_S3C 21889d56c02aSBen Dooks help 21899d56c02aSBen Dooks This enables the CPUfreq driver for the Samsung S3C24XX family 21909d56c02aSBen Dooks of CPUs. 21919d56c02aSBen Dooks 21929d56c02aSBen Dooks For details, take a look at <file:Documentation/cpu-freq>. 21939d56c02aSBen Dooks 21949d56c02aSBen Dooks If in doubt, say N. 21959d56c02aSBen Dooks 21969d56c02aSBen Dooksconfig CPU_FREQ_S3C24XX_PLL 21974a50bfe3SRussell King bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" 21989d56c02aSBen Dooks depends on CPU_FREQ_S3C24XX && EXPERIMENTAL 21999d56c02aSBen Dooks help 22009d56c02aSBen Dooks Compile in support for changing the PLL frequency from the 22019d56c02aSBen Dooks S3C24XX series CPUfreq driver. The PLL takes time to settle 22029d56c02aSBen Dooks after a frequency change, so by default it is not enabled. 22039d56c02aSBen Dooks 22049d56c02aSBen Dooks This also means that the PLL tables for the selected CPU(s) will 22059d56c02aSBen Dooks be built which may increase the size of the kernel image. 22069d56c02aSBen Dooks 22079d56c02aSBen Dooksconfig CPU_FREQ_S3C24XX_DEBUG 22089d56c02aSBen Dooks bool "Debug CPUfreq Samsung driver core" 22099d56c02aSBen Dooks depends on CPU_FREQ_S3C24XX 22109d56c02aSBen Dooks help 22119d56c02aSBen Dooks Enable s3c_freq_dbg for the Samsung S3C CPUfreq core 22129d56c02aSBen Dooks 22139d56c02aSBen Dooksconfig CPU_FREQ_S3C24XX_IODEBUG 22149d56c02aSBen Dooks bool "Debug CPUfreq Samsung driver IO timing" 22159d56c02aSBen Dooks depends on CPU_FREQ_S3C24XX 22169d56c02aSBen Dooks help 22179d56c02aSBen Dooks Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core 22189d56c02aSBen Dooks 2219e6d197a6SBen Dooksconfig CPU_FREQ_S3C24XX_DEBUGFS 2220e6d197a6SBen Dooks bool "Export debugfs for CPUFreq" 2221e6d197a6SBen Dooks depends on CPU_FREQ_S3C24XX && DEBUG_FS 2222e6d197a6SBen Dooks help 2223e6d197a6SBen Dooks Export status information via debugfs. 2224e6d197a6SBen Dooks 22251da177e4SLinus Torvaldsendif 22261da177e4SLinus Torvalds 2227ac9d7efcSRussell Kingsource "drivers/cpuidle/Kconfig" 2228ac9d7efcSRussell King 2229ac9d7efcSRussell Kingendmenu 2230ac9d7efcSRussell King 22311da177e4SLinus Torvaldsmenu "Floating point emulation" 22321da177e4SLinus Torvalds 22331da177e4SLinus Torvaldscomment "At least one emulation must be selected" 22341da177e4SLinus Torvalds 22351da177e4SLinus Torvaldsconfig FPE_NWFPE 22361da177e4SLinus Torvalds bool "NWFPE math emulation" 2237593c252aSDave Martin depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL 22381da177e4SLinus Torvalds ---help--- 22391da177e4SLinus Torvalds Say Y to include the NWFPE floating point emulator in the kernel. 22401da177e4SLinus Torvalds This is necessary to run most binaries. Linux does not currently 22411da177e4SLinus Torvalds support floating point hardware so you need to say Y here even if 22421da177e4SLinus Torvalds your machine has an FPA or floating point co-processor podule. 22431da177e4SLinus Torvalds 22441da177e4SLinus Torvalds You may say N here if you are going to load the Acorn FPEmulator 22451da177e4SLinus Torvalds early in the bootup. 22461da177e4SLinus Torvalds 22471da177e4SLinus Torvaldsconfig FPE_NWFPE_XP 22481da177e4SLinus Torvalds bool "Support extended precision" 2249bedf142bSLennert Buytenhek depends on FPE_NWFPE 22501da177e4SLinus Torvalds help 22511da177e4SLinus Torvalds Say Y to include 80-bit support in the kernel floating-point 22521da177e4SLinus Torvalds emulator. Otherwise, only 32 and 64-bit support is compiled in. 22531da177e4SLinus Torvalds Note that gcc does not generate 80-bit operations by default, 22541da177e4SLinus Torvalds so in most cases this option only enlarges the size of the 22551da177e4SLinus Torvalds floating point emulator without any good reason. 22561da177e4SLinus Torvalds 22571da177e4SLinus Torvalds You almost surely want to say N here. 22581da177e4SLinus Torvalds 22591da177e4SLinus Torvaldsconfig FPE_FASTFPE 22601da177e4SLinus Torvalds bool "FastFPE math emulation (EXPERIMENTAL)" 22618993a44cSNicolas Pitre depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL 22621da177e4SLinus Torvalds ---help--- 22631da177e4SLinus Torvalds Say Y here to include the FAST floating point emulator in the kernel. 22641da177e4SLinus Torvalds This is an experimental much faster emulator which now also has full 22651da177e4SLinus Torvalds precision for the mantissa. It does not support any exceptions. 22661da177e4SLinus Torvalds It is very simple, and approximately 3-6 times faster than NWFPE. 22671da177e4SLinus Torvalds 22681da177e4SLinus Torvalds It should be sufficient for most programs. It may be not suitable 22691da177e4SLinus Torvalds for scientific calculations, but you have to check this for yourself. 22701da177e4SLinus Torvalds If you do not feel you need a faster FP emulation you should better 22711da177e4SLinus Torvalds choose NWFPE. 22721da177e4SLinus Torvalds 22731da177e4SLinus Torvaldsconfig VFP 22741da177e4SLinus Torvalds bool "VFP-format floating point maths" 2275e399b1a4SRussell King depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON 22761da177e4SLinus Torvalds help 22771da177e4SLinus Torvalds Say Y to include VFP support code in the kernel. This is needed 22781da177e4SLinus Torvalds if your hardware includes a VFP unit. 22791da177e4SLinus Torvalds 22801da177e4SLinus Torvalds Please see <file:Documentation/arm/VFP/release-notes.txt> for 22811da177e4SLinus Torvalds release notes and additional status information. 22821da177e4SLinus Torvalds 22831da177e4SLinus Torvalds Say N if your target does not have VFP hardware. 22841da177e4SLinus Torvalds 228525ebee02SCatalin Marinasconfig VFPv3 228625ebee02SCatalin Marinas bool 228725ebee02SCatalin Marinas depends on VFP 228825ebee02SCatalin Marinas default y if CPU_V7 228925ebee02SCatalin Marinas 2290b5872db4SCatalin Marinasconfig NEON 2291b5872db4SCatalin Marinas bool "Advanced SIMD (NEON) Extension support" 2292b5872db4SCatalin Marinas depends on VFPv3 && CPU_V7 2293b5872db4SCatalin Marinas help 2294b5872db4SCatalin Marinas Say Y to include support code for NEON, the ARMv7 Advanced SIMD 2295b5872db4SCatalin Marinas Extension. 2296b5872db4SCatalin Marinas 22971da177e4SLinus Torvaldsendmenu 22981da177e4SLinus Torvalds 22991da177e4SLinus Torvaldsmenu "Userspace binary formats" 23001da177e4SLinus Torvalds 23011da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 23021da177e4SLinus Torvalds 23031da177e4SLinus Torvaldsconfig ARTHUR 23041da177e4SLinus Torvalds tristate "RISC OS personality" 2305704bdda0SNicolas Pitre depends on !AEABI 23061da177e4SLinus Torvalds help 23071da177e4SLinus Torvalds Say Y here to include the kernel code necessary if you want to run 23081da177e4SLinus Torvalds Acorn RISC OS/Arthur binaries under Linux. This code is still very 23091da177e4SLinus Torvalds experimental; if this sounds frightening, say N and sleep in peace. 23101da177e4SLinus Torvalds You can also say M here to compile this support as a module (which 23111da177e4SLinus Torvalds will be called arthur). 23121da177e4SLinus Torvalds 23131da177e4SLinus Torvaldsendmenu 23141da177e4SLinus Torvalds 23151da177e4SLinus Torvaldsmenu "Power management options" 23161da177e4SLinus Torvalds 2317eceab4acSRussell Kingsource "kernel/power/Kconfig" 23181da177e4SLinus Torvalds 2319f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 23203d5e8af4SStephen Warren depends on !ARCH_S5PC100 && !ARCH_TEGRA 23216a786182SRussell King depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \ 23223f5d0819SChao Xie CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK 2323f4cb5700SJohannes Berg def_bool y 2324f4cb5700SJohannes Berg 232515e0d9e3SArnd Bergmannconfig ARM_CPU_SUSPEND 232615e0d9e3SArnd Bergmann def_bool PM_SLEEP 232715e0d9e3SArnd Bergmann 23281da177e4SLinus Torvaldsendmenu 23291da177e4SLinus Torvalds 2330d5950b43SSam Ravnborgsource "net/Kconfig" 2331d5950b43SSam Ravnborg 2332ac25150fSUwe Kleine-Königsource "drivers/Kconfig" 23331da177e4SLinus Torvalds 23341da177e4SLinus Torvaldssource "fs/Kconfig" 23351da177e4SLinus Torvalds 23361da177e4SLinus Torvaldssource "arch/arm/Kconfig.debug" 23371da177e4SLinus Torvalds 23381da177e4SLinus Torvaldssource "security/Kconfig" 23391da177e4SLinus Torvalds 23401da177e4SLinus Torvaldssource "crypto/Kconfig" 23411da177e4SLinus Torvalds 23421da177e4SLinus Torvaldssource "lib/Kconfig" 2343