xref: /linux/arch/arm/Kconfig (revision 12db5562e0352986a265841638482b84f3a6899b)
11da177e4SLinus Torvaldsconfig ARM
21da177e4SLinus Torvalds	bool
31da177e4SLinus Torvalds	default y
4b1b3f49cSRussell King	select ARCH_BINFMT_ELF_RANDOMIZE_PIE
57463449bSCatalin Marinas	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
63d06770eSMark Rutland	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
7171b3f0dSRussell King	select ARCH_HAVE_CUSTOM_GPIO_H
8d7018848SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
94badad35SPeter Zijlstra	select ARCH_SUPPORTS_ATOMIC_RMW
10017f161aSKim Phillips	select ARCH_USE_BUILTIN_BSWAP
110cbad9c9SWill Deacon	select ARCH_USE_CMPXCHG_LOCKREF
12b1b3f49cSRussell King	select ARCH_WANT_IPC_PARSE_VERSION
13ee951c63SStephen Boyd	select BUILDTIME_EXTABLE_SORT if MMU
14171b3f0dSRussell King	select CLONE_BACKWARDS
15b1b3f49cSRussell King	select CPU_PM if (SUSPEND || CPU_IDLE)
16dce5c9e3SWill Deacon	select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
174477ca45SUwe Kleine-König	select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)
18b1b3f49cSRussell King	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
19171b3f0dSRussell King	select GENERIC_IDLE_POLL_SETUP
20b1b3f49cSRussell King	select GENERIC_IRQ_PROBE
21b1b3f49cSRussell King	select GENERIC_IRQ_SHOW
22b1b3f49cSRussell King	select GENERIC_PCI_IOMAP
2338ff87f7SStephen Boyd	select GENERIC_SCHED_CLOCK
24b1b3f49cSRussell King	select GENERIC_SMP_IDLE_THREAD
25b1b3f49cSRussell King	select GENERIC_STRNCPY_FROM_USER
26b1b3f49cSRussell King	select GENERIC_STRNLEN_USER
27b1b3f49cSRussell King	select HARDIRQS_SW_RESEND
287a017721SAKASHI Takahiro	select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)
2909f05d85SRabin Vincent	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
305cbad0ebSJason Wessel	select HAVE_ARCH_KGDB
3191702175SKees Cook	select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
320693bf68SWade Farnsworth	select HAVE_ARCH_TRACEHOOK
33b1b3f49cSRussell King	select HAVE_BPF_JIT
3451aaf81fSRussell King	select HAVE_CC_STACKPROTECTOR
35171b3f0dSRussell King	select HAVE_CONTEXT_TRACKING
36b1b3f49cSRussell King	select HAVE_C_RECORDMCOUNT
37b1b3f49cSRussell King	select HAVE_DEBUG_KMEMLEAK
38b1b3f49cSRussell King	select HAVE_DMA_API_DEBUG
39b1b3f49cSRussell King	select HAVE_DMA_ATTRS
40b1b3f49cSRussell King	select HAVE_DMA_CONTIGUOUS if MMU
41b1b3f49cSRussell King	select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
42dce5c9e3SWill Deacon	select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
43b1b3f49cSRussell King	select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
44b1b3f49cSRussell King	select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
45b1b3f49cSRussell King	select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
46b1b3f49cSRussell King	select HAVE_GENERIC_DMA_COHERENT
47b1b3f49cSRussell King	select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
48b1b3f49cSRussell King	select HAVE_IDE if PCI || ISA || PCMCIA
4987c46b6cSRussell King	select HAVE_IRQ_TIME_ACCOUNTING
50b1b3f49cSRussell King	select HAVE_KERNEL_GZIP
51f9b493acSKyungsik Lee	select HAVE_KERNEL_LZ4
52b1b3f49cSRussell King	select HAVE_KERNEL_LZMA
53b1b3f49cSRussell King	select HAVE_KERNEL_LZO
54b1b3f49cSRussell King	select HAVE_KERNEL_XZ
55856bc356SJon Medhurst	select HAVE_KPROBES if !XIP_KERNEL
569edddaa2SAnanth N Mavinakayanahalli	select HAVE_KRETPROBES if (HAVE_KPROBES)
57b1b3f49cSRussell King	select HAVE_MEMBLOCK
58171b3f0dSRussell King	select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
59b1b3f49cSRussell King	select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
607ada189fSJamie Iles	select HAVE_PERF_EVENTS
6149863894SWill Deacon	select HAVE_PERF_REGS
6249863894SWill Deacon	select HAVE_PERF_USER_STACK_DUMP
63e513f8bfSWill Deacon	select HAVE_REGS_AND_STACK_ACCESS_API
64b1b3f49cSRussell King	select HAVE_SYSCALL_TRACEPOINTS
65af1839ebSCatalin Marinas	select HAVE_UID16
6631c1fc81SKevin Hilman	select HAVE_VIRT_CPU_ACCOUNTING_GEN
67da0ec6f7SThomas Gleixner	select IRQ_FORCED_THREADING
68171b3f0dSRussell King	select MODULES_USE_ELF_REL
6984f452b1SSantosh Shilimkar	select NO_BOOTMEM
70171b3f0dSRussell King	select OLD_SIGACTION
71171b3f0dSRussell King	select OLD_SIGSUSPEND3
72b1b3f49cSRussell King	select PERF_USE_VMALLOC
73b1b3f49cSRussell King	select RTC_LIB
74b1b3f49cSRussell King	select SYS_SUPPORTS_APM_EMULATION
75171b3f0dSRussell King	# Above selects are sorted alphabetically; please add new ones
76171b3f0dSRussell King	# according to that.  Thanks.
771da177e4SLinus Torvalds	help
781da177e4SLinus Torvalds	  The ARM series is a line of low-power-consumption RISC chip designs
79f6c8965aSMartin Michlmayr	  licensed by ARM Ltd and targeted at embedded applications and
801da177e4SLinus Torvalds	  handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
811da177e4SLinus Torvalds	  manufactured, but legacy ARM-based PC hardware remains popular in
821da177e4SLinus Torvalds	  Europe.  There is an ARM Linux project with a web page at
831da177e4SLinus Torvalds	  <http://www.arm.linux.org.uk/>.
841da177e4SLinus Torvalds
8574facffeSRussell Kingconfig ARM_HAS_SG_CHAIN
86308c09f1SLaura Abbott	select ARCH_HAS_SG_CHAIN
8774facffeSRussell King	bool
8874facffeSRussell King
894ce63fcdSMarek Szyprowskiconfig NEED_SG_DMA_LENGTH
904ce63fcdSMarek Szyprowski	bool
914ce63fcdSMarek Szyprowski
924ce63fcdSMarek Szyprowskiconfig ARM_DMA_USE_IOMMU
934ce63fcdSMarek Szyprowski	bool
94b1b3f49cSRussell King	select ARM_HAS_SG_CHAIN
95b1b3f49cSRussell King	select NEED_SG_DMA_LENGTH
964ce63fcdSMarek Szyprowski
9760460abfSSeung-Woo Kimif ARM_DMA_USE_IOMMU
9860460abfSSeung-Woo Kim
9960460abfSSeung-Woo Kimconfig ARM_DMA_IOMMU_ALIGNMENT
10060460abfSSeung-Woo Kim	int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
10160460abfSSeung-Woo Kim	range 4 9
10260460abfSSeung-Woo Kim	default 8
10360460abfSSeung-Woo Kim	help
10460460abfSSeung-Woo Kim	  DMA mapping framework by default aligns all buffers to the smallest
10560460abfSSeung-Woo Kim	  PAGE_SIZE order which is greater than or equal to the requested buffer
10660460abfSSeung-Woo Kim	  size. This works well for buffers up to a few hundreds kilobytes, but
10760460abfSSeung-Woo Kim	  for larger buffers it just a waste of address space. Drivers which has
10860460abfSSeung-Woo Kim	  relatively small addressing window (like 64Mib) might run out of
10960460abfSSeung-Woo Kim	  virtual space with just a few allocations.
11060460abfSSeung-Woo Kim
11160460abfSSeung-Woo Kim	  With this parameter you can specify the maximum PAGE_SIZE order for
11260460abfSSeung-Woo Kim	  DMA IOMMU buffers. Larger buffers will be aligned only to this
11360460abfSSeung-Woo Kim	  specified order. The order is expressed as a power of two multiplied
11460460abfSSeung-Woo Kim	  by the PAGE_SIZE.
11560460abfSSeung-Woo Kim
11660460abfSSeung-Woo Kimendif
11760460abfSSeung-Woo Kim
1180b05da72SHans Ulli Krollconfig MIGHT_HAVE_PCI
1190b05da72SHans Ulli Kroll	bool
1200b05da72SHans Ulli Kroll
12175e7153aSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
12275e7153aSRalf Baechle	bool
12375e7153aSRalf Baechle
124bc581770SLinus Walleijconfig HAVE_TCM
125bc581770SLinus Walleij	bool
126bc581770SLinus Walleij	select GENERIC_ALLOCATOR
127bc581770SLinus Walleij
128e119bfffSRussell Kingconfig HAVE_PROC_CPU
129e119bfffSRussell King	bool
130e119bfffSRussell King
131ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP
1325ea81769SAl Viro	bool
1335ea81769SAl Viro
1341da177e4SLinus Torvaldsconfig EISA
1351da177e4SLinus Torvalds	bool
1361da177e4SLinus Torvalds	---help---
1371da177e4SLinus Torvalds	  The Extended Industry Standard Architecture (EISA) bus was
1381da177e4SLinus Torvalds	  developed as an open alternative to the IBM MicroChannel bus.
1391da177e4SLinus Torvalds
1401da177e4SLinus Torvalds	  The EISA bus provided some of the features of the IBM MicroChannel
1411da177e4SLinus Torvalds	  bus while maintaining backward compatibility with cards made for
1421da177e4SLinus Torvalds	  the older ISA bus.  The EISA bus saw limited use between 1988 and
1431da177e4SLinus Torvalds	  1995 when it was made obsolete by the PCI bus.
1441da177e4SLinus Torvalds
1451da177e4SLinus Torvalds	  Say Y here if you are building a kernel for an EISA-based machine.
1461da177e4SLinus Torvalds
1471da177e4SLinus Torvalds	  Otherwise, say N.
1481da177e4SLinus Torvalds
1491da177e4SLinus Torvaldsconfig SBUS
1501da177e4SLinus Torvalds	bool
1511da177e4SLinus Torvalds
152f16fb1ecSRussell Kingconfig STACKTRACE_SUPPORT
153f16fb1ecSRussell King	bool
154f16fb1ecSRussell King	default y
155f16fb1ecSRussell King
156f76e9154SNicolas Pitreconfig HAVE_LATENCYTOP_SUPPORT
157f76e9154SNicolas Pitre	bool
158f76e9154SNicolas Pitre	depends on !SMP
159f76e9154SNicolas Pitre	default y
160f76e9154SNicolas Pitre
161f16fb1ecSRussell Kingconfig LOCKDEP_SUPPORT
162f16fb1ecSRussell King	bool
163f16fb1ecSRussell King	default y
164f16fb1ecSRussell King
1657ad1bcb2SRussell Kingconfig TRACE_IRQFLAGS_SUPPORT
1667ad1bcb2SRussell King	bool
1677ad1bcb2SRussell King	default y
1687ad1bcb2SRussell King
1691da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM
1701da177e4SLinus Torvalds	bool
1718a87411bSWill Deacon	default y
1721da177e4SLinus Torvalds
173f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32
174f0d1b0b3SDavid Howells	bool
175f0d1b0b3SDavid Howells
176f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64
177f0d1b0b3SDavid Howells	bool
178f0d1b0b3SDavid Howells
1794a1b5733SEduardo Valentinconfig ARCH_HAS_BANDGAP
1804a1b5733SEduardo Valentin	bool
1814a1b5733SEduardo Valentin
182b89c3b16SAkinobu Mitaconfig GENERIC_HWEIGHT
183b89c3b16SAkinobu Mita	bool
184b89c3b16SAkinobu Mita	default y
185b89c3b16SAkinobu Mita
1861da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
1871da177e4SLinus Torvalds	bool
1881da177e4SLinus Torvalds	default y
1891da177e4SLinus Torvalds
190a08b6b79Sviro@ZenIV.linux.org.ukconfig ARCH_MAY_HAVE_PC_FDC
191a08b6b79Sviro@ZenIV.linux.org.uk	bool
192a08b6b79Sviro@ZenIV.linux.org.uk
1935ac6da66SChristoph Lameterconfig ZONE_DMA
1945ac6da66SChristoph Lameter	bool
1955ac6da66SChristoph Lameter
196ccd7ab7fSFUJITA Tomonoriconfig NEED_DMA_MAP_STATE
197ccd7ab7fSFUJITA Tomonori       def_bool y
198ccd7ab7fSFUJITA Tomonori
199c7edc9e3SDavid A. Longconfig ARCH_SUPPORTS_UPROBES
200c7edc9e3SDavid A. Long	def_bool y
201c7edc9e3SDavid A. Long
20258af4a24SRob Herringconfig ARCH_HAS_DMA_SET_COHERENT_MASK
20358af4a24SRob Herring	bool
20458af4a24SRob Herring
2051da177e4SLinus Torvaldsconfig GENERIC_ISA_DMA
2061da177e4SLinus Torvalds	bool
2071da177e4SLinus Torvalds
2081da177e4SLinus Torvaldsconfig FIQ
2091da177e4SLinus Torvalds	bool
2101da177e4SLinus Torvalds
21113a5045dSRob Herringconfig NEED_RET_TO_USER
21213a5045dSRob Herring	bool
21313a5045dSRob Herring
214034d2f5aSAl Viroconfig ARCH_MTD_XIP
215034d2f5aSAl Viro	bool
216034d2f5aSAl Viro
217c760fc19SHyok S. Choiconfig VECTORS_BASE
218c760fc19SHyok S. Choi	hex
2196afd6faeSHyok S. Choi	default 0xffff0000 if MMU || CPU_HIGH_VECTOR
220c760fc19SHyok S. Choi	default DRAM_BASE if REMAP_VECTORS_TO_RAM
221c760fc19SHyok S. Choi	default 0x00000000
222c760fc19SHyok S. Choi	help
22319accfd3SRussell King	  The base address of exception vectors.  This must be two pages
22419accfd3SRussell King	  in size.
225c760fc19SHyok S. Choi
226dc21af99SRussell Kingconfig ARM_PATCH_PHYS_VIRT
227c1becedcSRussell King	bool "Patch physical to virtual translations at runtime" if EMBEDDED
228c1becedcSRussell King	default y
229b511d75dSNicolas Pitre	depends on !XIP_KERNEL && MMU
230dc21af99SRussell King	depends on !ARCH_REALVIEW || !SPARSEMEM
231dc21af99SRussell King	help
232111e9a5cSRussell King	  Patch phys-to-virt and virt-to-phys translation functions at
233111e9a5cSRussell King	  boot and module load time according to the position of the
234111e9a5cSRussell King	  kernel in system memory.
235dc21af99SRussell King
236111e9a5cSRussell King	  This can only be used with non-XIP MMU kernels where the base
237daece596SNicolas Pitre	  of physical memory is at a 16MB boundary.
238dc21af99SRussell King
239c1becedcSRussell King	  Only disable this option if you know that you do not require
240c1becedcSRussell King	  this feature (eg, building a kernel for a single machine) and
241c1becedcSRussell King	  you need to shrink the kernel to the minimal size.
242c1becedcSRussell King
24301464226SRob Herringconfig NEED_MACH_GPIO_H
24401464226SRob Herring	bool
24501464226SRob Herring	help
24601464226SRob Herring	  Select this when mach/gpio.h is required to provide special
24701464226SRob Herring	  definitions for this platform. The need for mach/gpio.h should
24801464226SRob Herring	  be avoided when possible.
24901464226SRob Herring
250c334bc15SRob Herringconfig NEED_MACH_IO_H
251c334bc15SRob Herring	bool
252c334bc15SRob Herring	help
253c334bc15SRob Herring	  Select this when mach/io.h is required to provide special
254c334bc15SRob Herring	  definitions for this platform.  The need for mach/io.h should
255c334bc15SRob Herring	  be avoided when possible.
256c334bc15SRob Herring
2570cdc8b92SNicolas Pitreconfig NEED_MACH_MEMORY_H
2581b9f95f8SNicolas Pitre	bool
259111e9a5cSRussell King	help
2600cdc8b92SNicolas Pitre	  Select this when mach/memory.h is required to provide special
2610cdc8b92SNicolas Pitre	  definitions for this platform.  The need for mach/memory.h should
2620cdc8b92SNicolas Pitre	  be avoided when possible.
2631b9f95f8SNicolas Pitre
2641b9f95f8SNicolas Pitreconfig PHYS_OFFSET
265974c0724SNicolas Pitre	hex "Physical address of main memory" if MMU
266c6f54a9bSUwe Kleine-König	depends on !ARM_PATCH_PHYS_VIRT
267974c0724SNicolas Pitre	default DRAM_BASE if !MMU
268c6f54a9bSUwe Kleine-König	default 0x00000000 if ARCH_EBSA110 || \
269c6f54a9bSUwe Kleine-König			EP93XX_SDCE3_SYNC_PHYS_OFFSET || \
270c6f54a9bSUwe Kleine-König			ARCH_FOOTBRIDGE || \
271c6f54a9bSUwe Kleine-König			ARCH_INTEGRATOR || \
272c6f54a9bSUwe Kleine-König			ARCH_IOP13XX || \
273c6f54a9bSUwe Kleine-König			ARCH_KS8695 || \
274c6f54a9bSUwe Kleine-König			(ARCH_REALVIEW && !REALVIEW_HIGH_PHYS_OFFSET)
275c6f54a9bSUwe Kleine-König	default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
276c6f54a9bSUwe Kleine-König	default 0x20000000 if ARCH_S5PV210
277c6f54a9bSUwe Kleine-König	default 0x70000000 if REALVIEW_HIGH_PHYS_OFFSET
278c6f54a9bSUwe Kleine-König	default 0xc0000000 if EP93XX_SDCE0_PHYS_OFFSET || ARCH_SA1100
279c6f54a9bSUwe Kleine-König	default 0xd0000000 if EP93XX_SDCE1_PHYS_OFFSET
280c6f54a9bSUwe Kleine-König	default 0xe0000000 if EP93XX_SDCE2_PHYS_OFFSET
281c6f54a9bSUwe Kleine-König	default 0xf0000000 if EP93XX_SDCE3_ASYNC_PHYS_OFFSET
2821b9f95f8SNicolas Pitre	help
2831b9f95f8SNicolas Pitre	  Please provide the physical address corresponding to the
2841b9f95f8SNicolas Pitre	  location of main memory in your system.
285cada3c08SRussell King
28687e040b6SSimon Glassconfig GENERIC_BUG
28787e040b6SSimon Glass	def_bool y
28887e040b6SSimon Glass	depends on BUG
28987e040b6SSimon Glass
2901da177e4SLinus Torvaldssource "init/Kconfig"
2911da177e4SLinus Torvalds
292dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer"
293dc52ddc0SMatt Helsley
2941da177e4SLinus Torvaldsmenu "System Type"
2951da177e4SLinus Torvalds
2963c427975SHyok S. Choiconfig MMU
2973c427975SHyok S. Choi	bool "MMU-based Paged Memory Management Support"
2983c427975SHyok S. Choi	default y
2993c427975SHyok S. Choi	help
3003c427975SHyok S. Choi	  Select if you want MMU-based virtualised addressing space
3013c427975SHyok S. Choi	  support by paged memory management. If unsure, say 'Y'.
3023c427975SHyok S. Choi
303ccf50e23SRussell King#
304ccf50e23SRussell King# The "ARM system type" choice list is ordered alphabetically by option
305ccf50e23SRussell King# text.  Please add new entries in the option alphabetic order.
306ccf50e23SRussell King#
3071da177e4SLinus Torvaldschoice
3081da177e4SLinus Torvalds	prompt "ARM system type"
3091420b22bSArnd Bergmann	default ARCH_VERSATILE if !MMU
3101420b22bSArnd Bergmann	default ARCH_MULTIPLATFORM if MMU
3111da177e4SLinus Torvalds
312387798b3SRob Herringconfig ARCH_MULTIPLATFORM
313387798b3SRob Herring	bool "Allow multiple platforms to be selected"
314b1b3f49cSRussell King	depends on MMU
315ddb902ccSRob Herring	select ARCH_WANT_OPTIONAL_GPIOLIB
31642dc836dSOlof Johansson	select ARM_HAS_SG_CHAIN
317387798b3SRob Herring	select ARM_PATCH_PHYS_VIRT
318387798b3SRob Herring	select AUTO_ZRELADDR
3196d0add40SRob Herring	select CLKSRC_OF
32066314223SDinh Nguyen	select COMMON_CLK
321ddb902ccSRob Herring	select GENERIC_CLOCKEVENTS
32208d38bebSWill Deacon	select MIGHT_HAVE_PCI
323387798b3SRob Herring	select MULTI_IRQ_HANDLER
32466314223SDinh Nguyen	select SPARSE_IRQ
32566314223SDinh Nguyen	select USE_OF
32666314223SDinh Nguyen
3274af6fee1SDeepak Saxenaconfig ARCH_INTEGRATOR
3284af6fee1SDeepak Saxena	bool "ARM Ltd. Integrator family"
329b1b3f49cSRussell King	select ARM_AMBA
33091942d17SUwe Kleine-König	select ARM_PATCH_PHYS_VIRT if MMU
331fe989145Spanchaxari	select AUTO_ZRELADDR
332a613163dSLinus Walleij	select COMMON_CLK
333f9a6aa43SLinus Walleij	select COMMON_CLK_VERSATILE
334b1b3f49cSRussell King	select GENERIC_CLOCKEVENTS
3359904f793SLinus Walleij	select HAVE_TCM
336c5a0adb5SRussell King	select ICST
337b1b3f49cSRussell King	select MULTI_IRQ_HANDLER
338b1b3f49cSRussell King	select NEED_MACH_MEMORY_H
339f4b8b319SRussell King	select PLAT_VERSATILE
340695436e3SLinus Walleij	select SPARSE_IRQ
341d7057e1dSLinus Walleij	select USE_OF
3422389d501SLinus Walleij	select VERSATILE_FPGA_IRQ
3434af6fee1SDeepak Saxena	help
3444af6fee1SDeepak Saxena	  Support for ARM's Integrator platform.
3454af6fee1SDeepak Saxena
3464af6fee1SDeepak Saxenaconfig ARCH_REALVIEW
3474af6fee1SDeepak Saxena	bool "ARM Ltd. RealView family"
348b1b3f49cSRussell King	select ARCH_WANT_OPTIONAL_GPIOLIB
3494af6fee1SDeepak Saxena	select ARM_AMBA
350b1b3f49cSRussell King	select ARM_TIMER_SP804
351f9a6aa43SLinus Walleij	select COMMON_CLK
352f9a6aa43SLinus Walleij	select COMMON_CLK_VERSATILE
353ae30ceacSCatalin Marinas	select GENERIC_CLOCKEVENTS
354b1b3f49cSRussell King	select GPIO_PL061 if GPIOLIB
355b1b3f49cSRussell King	select ICST
356b1b3f49cSRussell King	select NEED_MACH_MEMORY_H
357f4b8b319SRussell King	select PLAT_VERSATILE
3583cb5ee49SRussell King	select PLAT_VERSATILE_CLCD
3594af6fee1SDeepak Saxena	help
3604af6fee1SDeepak Saxena	  This enables support for ARM Ltd RealView boards.
3614af6fee1SDeepak Saxena
3624af6fee1SDeepak Saxenaconfig ARCH_VERSATILE
3634af6fee1SDeepak Saxena	bool "ARM Ltd. Versatile family"
364b1b3f49cSRussell King	select ARCH_WANT_OPTIONAL_GPIOLIB
3654af6fee1SDeepak Saxena	select ARM_AMBA
366b1b3f49cSRussell King	select ARM_TIMER_SP804
3674af6fee1SDeepak Saxena	select ARM_VIC
3686d803ba7SJean-Christop PLAGNIOL-VILLARD	select CLKDEV_LOOKUP
369b1b3f49cSRussell King	select GENERIC_CLOCKEVENTS
370aa3831cfSKyungmin Park	select HAVE_MACH_CLKDEV
371c5a0adb5SRussell King	select ICST
372f4b8b319SRussell King	select PLAT_VERSATILE
3733414ba8cSRussell King	select PLAT_VERSATILE_CLCD
374b1b3f49cSRussell King	select PLAT_VERSATILE_CLOCK
3752389d501SLinus Walleij	select VERSATILE_FPGA_IRQ
3764af6fee1SDeepak Saxena	help
3774af6fee1SDeepak Saxena	  This enables support for ARM Ltd Versatile board.
3784af6fee1SDeepak Saxena
3798fc5ffa0SAndrew Victorconfig ARCH_AT91
3808fc5ffa0SAndrew Victor	bool "Atmel AT91"
381f373e8c0SRyan Mallon	select ARCH_REQUIRE_GPIOLIB
382bd602995SJean-Christophe PLAGNIOL-VILLARD	select CLKDEV_LOOKUP
383e261501dSNicolas Ferre	select IRQ_DOMAIN
3841ac02d79SRob Herring	select NEED_MACH_IO_H if PCCARD
3856732ae5cSJean-Christophe PLAGNIOL-VILLARD	select PINCTRL
3866732ae5cSJean-Christophe PLAGNIOL-VILLARD	select PINCTRL_AT91 if USE_OF
3874af6fee1SDeepak Saxena	help
388929e994fSNicolas Ferre	  This enables support for systems based on Atmel
389929e994fSNicolas Ferre	  AT91RM9200 and AT91SAM9* processors.
3904af6fee1SDeepak Saxena
39193e22567SRussell Kingconfig ARCH_CLPS711X
39293e22567SRussell King	bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
393a3b8d4a5SAlexander Shiyan	select ARCH_REQUIRE_GPIOLIB
394ea7d1bc9SAlexander Shiyan	select AUTO_ZRELADDR
395c99f72adSAlexander Shiyan	select CLKSRC_MMIO
39693e22567SRussell King	select COMMON_CLK
39793e22567SRussell King	select CPU_ARM720T
3984a8355c4SAlexander Shiyan	select GENERIC_CLOCKEVENTS
3996597619fSAlexander Shiyan	select MFD_SYSCON
40093e22567SRussell King	help
40193e22567SRussell King	  Support for Cirrus Logic 711x/721x/731x based boards.
40293e22567SRussell King
403788c9700SRussell Kingconfig ARCH_GEMINI
404788c9700SRussell King	bool "Cortina Systems Gemini"
405788c9700SRussell King	select ARCH_REQUIRE_GPIOLIB
406f3372c01SLinus Walleij	select CLKSRC_MMIO
407b1b3f49cSRussell King	select CPU_FA526
408f3372c01SLinus Walleij	select GENERIC_CLOCKEVENTS
409788c9700SRussell King	help
410788c9700SRussell King	  Support for the Cortina Systems Gemini family SoCs
411788c9700SRussell King
4121da177e4SLinus Torvaldsconfig ARCH_EBSA110
4131da177e4SLinus Torvalds	bool "EBSA-110"
414b1b3f49cSRussell King	select ARCH_USES_GETTIMEOFFSET
415c750815eSRussell King	select CPU_SA110
416f7e68bbfSRussell King	select ISA
417c334bc15SRob Herring	select NEED_MACH_IO_H
4180cdc8b92SNicolas Pitre	select NEED_MACH_MEMORY_H
419ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
4201da177e4SLinus Torvalds	help
4211da177e4SLinus Torvalds	  This is an evaluation board for the StrongARM processor available
422f6c8965aSMartin Michlmayr	  from Digital. It has limited hardware on-board, including an
4231da177e4SLinus Torvalds	  Ethernet interface, two PCMCIA sockets, two serial ports and a
4241da177e4SLinus Torvalds	  parallel port.
4251da177e4SLinus Torvalds
4266d85e2b0SUwe Kleine-Königconfig ARCH_EFM32
4276d85e2b0SUwe Kleine-König	bool "Energy Micro efm32"
4286d85e2b0SUwe Kleine-König	depends on !MMU
4296d85e2b0SUwe Kleine-König	select ARCH_REQUIRE_GPIOLIB
4306d85e2b0SUwe Kleine-König	select ARM_NVIC
43151aaf81fSRussell King	select AUTO_ZRELADDR
4326d85e2b0SUwe Kleine-König	select CLKSRC_OF
4336d85e2b0SUwe Kleine-König	select COMMON_CLK
4346d85e2b0SUwe Kleine-König	select CPU_V7M
4356d85e2b0SUwe Kleine-König	select GENERIC_CLOCKEVENTS
4366d85e2b0SUwe Kleine-König	select NO_DMA
437ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
4386d85e2b0SUwe Kleine-König	select SPARSE_IRQ
4396d85e2b0SUwe Kleine-König	select USE_OF
4406d85e2b0SUwe Kleine-König	help
4416d85e2b0SUwe Kleine-König	  Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
4426d85e2b0SUwe Kleine-König	  processors.
4436d85e2b0SUwe Kleine-König
444e7736d47SLennert Buytenhekconfig ARCH_EP93XX
445e7736d47SLennert Buytenhek	bool "EP93xx-based"
446b1b3f49cSRussell King	select ARCH_HAS_HOLES_MEMORYMODEL
447b1b3f49cSRussell King	select ARCH_REQUIRE_GPIOLIB
448b1b3f49cSRussell King	select ARCH_USES_GETTIMEOFFSET
449e7736d47SLennert Buytenhek	select ARM_AMBA
450e7736d47SLennert Buytenhek	select ARM_VIC
4516d803ba7SJean-Christop PLAGNIOL-VILLARD	select CLKDEV_LOOKUP
452b1b3f49cSRussell King	select CPU_ARM920T
453e7736d47SLennert Buytenhek	help
454e7736d47SLennert Buytenhek	  This enables support for the Cirrus EP93xx series of CPUs.
455e7736d47SLennert Buytenhek
4561da177e4SLinus Torvaldsconfig ARCH_FOOTBRIDGE
4571da177e4SLinus Torvalds	bool "FootBridge"
458c750815eSRussell King	select CPU_SA110
4591da177e4SLinus Torvalds	select FOOTBRIDGE
4604e8d7637SRussell King	select GENERIC_CLOCKEVENTS
461d0ee9f40SArnd Bergmann	select HAVE_IDE
4628ef6e620SRob Herring	select NEED_MACH_IO_H if !MMU
4630cdc8b92SNicolas Pitre	select NEED_MACH_MEMORY_H
464f999b8bdSMartin Michlmayr	help
465f999b8bdSMartin Michlmayr	  Support for systems based on the DC21285 companion chip
466f999b8bdSMartin Michlmayr	  ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
4671da177e4SLinus Torvalds
4684af6fee1SDeepak Saxenaconfig ARCH_NETX
4694af6fee1SDeepak Saxena	bool "Hilscher NetX based"
470b1b3f49cSRussell King	select ARM_VIC
471234b6cedSRussell King	select CLKSRC_MMIO
472c750815eSRussell King	select CPU_ARM926T
4732fcfe6b8SUwe Kleine-König	select GENERIC_CLOCKEVENTS
474f999b8bdSMartin Michlmayr	help
4754af6fee1SDeepak Saxena	  This enables support for systems based on the Hilscher NetX Soc
4764af6fee1SDeepak Saxena
4773b938be6SRussell Kingconfig ARCH_IOP13XX
4783b938be6SRussell King	bool "IOP13xx-based"
4793b938be6SRussell King	depends on MMU
480b1b3f49cSRussell King	select CPU_XSC3
4810cdc8b92SNicolas Pitre	select NEED_MACH_MEMORY_H
48213a5045dSRob Herring	select NEED_RET_TO_USER
483b1b3f49cSRussell King	select PCI
484b1b3f49cSRussell King	select PLAT_IOP
485b1b3f49cSRussell King	select VMSPLIT_1G
48637ebbcffSThomas Gleixner	select SPARSE_IRQ
4873b938be6SRussell King	help
4883b938be6SRussell King	  Support for Intel's IOP13XX (XScale) family of processors.
4893b938be6SRussell King
4903f7e5815SLennert Buytenhekconfig ARCH_IOP32X
4913f7e5815SLennert Buytenhek	bool "IOP32x-based"
492a4f7e763SRussell King	depends on MMU
493b1b3f49cSRussell King	select ARCH_REQUIRE_GPIOLIB
494c750815eSRussell King	select CPU_XSCALE
495e9004f50SLinus Walleij	select GPIO_IOP
49613a5045dSRob Herring	select NEED_RET_TO_USER
497f7e68bbfSRussell King	select PCI
498b1b3f49cSRussell King	select PLAT_IOP
499f999b8bdSMartin Michlmayr	help
5003f7e5815SLennert Buytenhek	  Support for Intel's 80219 and IOP32X (XScale) family of
5013f7e5815SLennert Buytenhek	  processors.
5023f7e5815SLennert Buytenhek
5033f7e5815SLennert Buytenhekconfig ARCH_IOP33X
5043f7e5815SLennert Buytenhek	bool "IOP33x-based"
5053f7e5815SLennert Buytenhek	depends on MMU
506b1b3f49cSRussell King	select ARCH_REQUIRE_GPIOLIB
507c750815eSRussell King	select CPU_XSCALE
508e9004f50SLinus Walleij	select GPIO_IOP
50913a5045dSRob Herring	select NEED_RET_TO_USER
5103f7e5815SLennert Buytenhek	select PCI
511b1b3f49cSRussell King	select PLAT_IOP
5123f7e5815SLennert Buytenhek	help
5133f7e5815SLennert Buytenhek	  Support for Intel's IOP33X (XScale) family of processors.
5141da177e4SLinus Torvalds
5153b938be6SRussell Kingconfig ARCH_IXP4XX
5163b938be6SRussell King	bool "IXP4xx-based"
517a4f7e763SRussell King	depends on MMU
51858af4a24SRob Herring	select ARCH_HAS_DMA_SET_COHERENT_MASK
519b1b3f49cSRussell King	select ARCH_REQUIRE_GPIOLIB
52051aaf81fSRussell King	select ARCH_SUPPORTS_BIG_ENDIAN
521234b6cedSRussell King	select CLKSRC_MMIO
522c750815eSRussell King	select CPU_XSCALE
523b1b3f49cSRussell King	select DMABOUNCE if PCI
5243b938be6SRussell King	select GENERIC_CLOCKEVENTS
5250b05da72SHans Ulli Kroll	select MIGHT_HAVE_PCI
526c334bc15SRob Herring	select NEED_MACH_IO_H
5279296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_DESC
528171b3f0dSRussell King	select USB_EHCI_BIG_ENDIAN_MMIO
529c4713074SLennert Buytenhek	help
5303b938be6SRussell King	  Support for Intel's IXP4XX (XScale) family of processors.
531c4713074SLennert Buytenhek
532edabd38eSSaeed Bisharaconfig ARCH_DOVE
533edabd38eSSaeed Bishara	bool "Marvell Dove"
534edabd38eSSaeed Bishara	select ARCH_REQUIRE_GPIOLIB
535756b2531SSebastian Hesselbarth	select CPU_PJ4
536edabd38eSSaeed Bishara	select GENERIC_CLOCKEVENTS
5370f81bd43SRussell King	select MIGHT_HAVE_PCI
538171b3f0dSRussell King	select MVEBU_MBUS
5399139acd1SSebastian Hesselbarth	select PINCTRL
5409139acd1SSebastian Hesselbarth	select PINCTRL_DOVE
541abcda1dcSThomas Petazzoni	select PLAT_ORION_LEGACY
542edabd38eSSaeed Bishara	help
543edabd38eSSaeed Bishara	  Support for the Marvell Dove SoC 88AP510
544edabd38eSSaeed Bishara
545651c74c7SSaeed Bisharaconfig ARCH_KIRKWOOD
546651c74c7SSaeed Bishara	bool "Marvell Kirkwood"
547a8865655SErik Benada	select ARCH_REQUIRE_GPIOLIB
548b1b3f49cSRussell King	select CPU_FEROCEON
549651c74c7SSaeed Bishara	select GENERIC_CLOCKEVENTS
550171b3f0dSRussell King	select MVEBU_MBUS
551b1b3f49cSRussell King	select PCI
5521dc831bfSJason Gunthorpe	select PCI_QUIRKS
553f9e75922SAndrew Lunn	select PINCTRL
554f9e75922SAndrew Lunn	select PINCTRL_KIRKWOOD
555abcda1dcSThomas Petazzoni	select PLAT_ORION_LEGACY
556651c74c7SSaeed Bishara	help
557651c74c7SSaeed Bishara	  Support for the following Marvell Kirkwood series SoCs:
558651c74c7SSaeed Bishara	  88F6180, 88F6192 and 88F6281.
559651c74c7SSaeed Bishara
560788c9700SRussell Kingconfig ARCH_MV78XX0
561788c9700SRussell King	bool "Marvell MV78xx0"
562a8865655SErik Benada	select ARCH_REQUIRE_GPIOLIB
563b1b3f49cSRussell King	select CPU_FEROCEON
564788c9700SRussell King	select GENERIC_CLOCKEVENTS
565171b3f0dSRussell King	select MVEBU_MBUS
566b1b3f49cSRussell King	select PCI
567abcda1dcSThomas Petazzoni	select PLAT_ORION_LEGACY
568788c9700SRussell King	help
569788c9700SRussell King	  Support for the following Marvell MV78xx0 series SoCs:
570788c9700SRussell King	  MV781x0, MV782x0.
571788c9700SRussell King
572788c9700SRussell Kingconfig ARCH_ORION5X
573788c9700SRussell King	bool "Marvell Orion"
574788c9700SRussell King	depends on MMU
575a8865655SErik Benada	select ARCH_REQUIRE_GPIOLIB
576b1b3f49cSRussell King	select CPU_FEROCEON
577788c9700SRussell King	select GENERIC_CLOCKEVENTS
578171b3f0dSRussell King	select MVEBU_MBUS
579b1b3f49cSRussell King	select PCI
580abcda1dcSThomas Petazzoni	select PLAT_ORION_LEGACY
581788c9700SRussell King	help
582788c9700SRussell King	  Support for the following Marvell Orion 5x series SoCs:
583788c9700SRussell King	  Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
584788c9700SRussell King	  Orion-2 (5281), Orion-1-90 (6183).
585788c9700SRussell King
586788c9700SRussell Kingconfig ARCH_MMP
5872f7e8faeSHaojian Zhuang	bool "Marvell PXA168/910/MMP2"
588788c9700SRussell King	depends on MMU
589788c9700SRussell King	select ARCH_REQUIRE_GPIOLIB
5906d803ba7SJean-Christop PLAGNIOL-VILLARD	select CLKDEV_LOOKUP
591b1b3f49cSRussell King	select GENERIC_ALLOCATOR
592788c9700SRussell King	select GENERIC_CLOCKEVENTS
593157d2644SHaojian Zhuang	select GPIO_PXA
594c24b3114SHaojian Zhuang	select IRQ_DOMAIN
5950f374561SHaojian Zhuang	select MULTI_IRQ_HANDLER
5967c8f86a4SAxel Lin	select PINCTRL
597788c9700SRussell King	select PLAT_PXA
5980bd86961SHaojian Zhuang	select SPARSE_IRQ
599788c9700SRussell King	help
6002f7e8faeSHaojian Zhuang	  Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
601788c9700SRussell King
602c53c9cf6SAndrew Victorconfig ARCH_KS8695
603c53c9cf6SAndrew Victor	bool "Micrel/Kendin KS8695"
60472880ad8SDaniel Silverstone	select ARCH_REQUIRE_GPIOLIB
605c7e783d6SLinus Walleij	select CLKSRC_MMIO
606b1b3f49cSRussell King	select CPU_ARM922T
607c7e783d6SLinus Walleij	select GENERIC_CLOCKEVENTS
608b1b3f49cSRussell King	select NEED_MACH_MEMORY_H
609c53c9cf6SAndrew Victor	help
610c53c9cf6SAndrew Victor	  Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
611c53c9cf6SAndrew Victor	  System-on-Chip devices.
612c53c9cf6SAndrew Victor
613788c9700SRussell Kingconfig ARCH_W90X900
614788c9700SRussell King	bool "Nuvoton W90X900 CPU"
615c52d3d68Swanzongshun	select ARCH_REQUIRE_GPIOLIB
6166d803ba7SJean-Christop PLAGNIOL-VILLARD	select CLKDEV_LOOKUP
6176fa5d5f7SRussell King	select CLKSRC_MMIO
618b1b3f49cSRussell King	select CPU_ARM926T
61958b5369eSwanzongshun	select GENERIC_CLOCKEVENTS
620777f9bebSLennert Buytenhek	help
621a8bc4eadSwanzongshun	  Support for Nuvoton (Winbond logic dept.) ARM9 processor,
622a8bc4eadSwanzongshun	  At present, the w90x900 has been renamed nuc900, regarding
623a8bc4eadSwanzongshun	  the ARM series product line, you can login the following
624a8bc4eadSwanzongshun	  link address to know more.
625a8bc4eadSwanzongshun
626a8bc4eadSwanzongshun	  <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
627a8bc4eadSwanzongshun		ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
628585cf175STzachi Perelstein
62993e22567SRussell Kingconfig ARCH_LPC32XX
63093e22567SRussell King	bool "NXP LPC32XX"
63193e22567SRussell King	select ARCH_REQUIRE_GPIOLIB
63293e22567SRussell King	select ARM_AMBA
6334073723aSRussell King	select CLKDEV_LOOKUP
634234b6cedSRussell King	select CLKSRC_MMIO
63593e22567SRussell King	select CPU_ARM926T
63693e22567SRussell King	select GENERIC_CLOCKEVENTS
63793e22567SRussell King	select HAVE_IDE
63893e22567SRussell King	select USE_OF
63993e22567SRussell King	help
64093e22567SRussell King	  Support for the NXP LPC32XX family of processors
64193e22567SRussell King
6421da177e4SLinus Torvaldsconfig ARCH_PXA
6432c8086a5Seric miao	bool "PXA2xx/PXA3xx-based"
644a4f7e763SRussell King	depends on MMU
645b1b3f49cSRussell King	select ARCH_MTD_XIP
646b1b3f49cSRussell King	select ARCH_REQUIRE_GPIOLIB
647b1b3f49cSRussell King	select ARM_CPU_SUSPEND if PM
648b1b3f49cSRussell King	select AUTO_ZRELADDR
6496d803ba7SJean-Christop PLAGNIOL-VILLARD	select CLKDEV_LOOKUP
650234b6cedSRussell King	select CLKSRC_MMIO
6516f6caeaaSRobert Jarzmik	select CLKSRC_OF
652981d0f39SEric Miao	select GENERIC_CLOCKEVENTS
653157d2644SHaojian Zhuang	select GPIO_PXA
654b1b3f49cSRussell King	select HAVE_IDE
655b1b3f49cSRussell King	select MULTI_IRQ_HANDLER
656bd5ce433SEric Miao	select PLAT_PXA
6576ac6b817SHaojian Zhuang	select SPARSE_IRQ
658f999b8bdSMartin Michlmayr	help
6592c8086a5Seric miao	  Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
6601da177e4SLinus Torvalds
6618fc1b0f8SKumar Galaconfig ARCH_MSM
6628fc1b0f8SKumar Gala	bool "Qualcomm MSM (non-multiplatform)"
663923a081cSPavel Machek	select ARCH_REQUIRE_GPIOLIB
6648cc7f533SStephen Boyd	select COMMON_CLK
665b1b3f49cSRussell King	select GENERIC_CLOCKEVENTS
66649cbe786SEric Miao	help
6674b53eb4fSDaniel Walker	  Support for Qualcomm MSM/QSD based systems.  This runs on the
6684b53eb4fSDaniel Walker	  apps processor of the MSM/QSD and depends on a shared memory
6694b53eb4fSDaniel Walker	  interface to the modem processor which runs the baseband
6704b53eb4fSDaniel Walker	  stack and controls some vital subsystems
6714b53eb4fSDaniel Walker	  (clock and power control, etc).
67249cbe786SEric Miao
673bf98c1eaSLaurent Pinchartconfig ARCH_SHMOBILE_LEGACY
6740d9fd616SLaurent Pinchart	bool "Renesas ARM SoCs (non-multiplatform)"
675bf98c1eaSLaurent Pinchart	select ARCH_SHMOBILE
67691942d17SUwe Kleine-König	select ARM_PATCH_PHYS_VIRT if MMU
6775e93c6b4SPaul Mundt	select CLKDEV_LOOKUP
678b1b3f49cSRussell King	select GENERIC_CLOCKEVENTS
6794c3ffffdSStephen Boyd	select HAVE_ARM_SCU if SMP
680a894fcc2SStephen Boyd	select HAVE_ARM_TWD if SMP
681aa3831cfSKyungmin Park	select HAVE_MACH_CLKDEV
6823b55658aSDave Martin	select HAVE_SMP
683ce5ea9f3SDave Martin	select MIGHT_HAVE_CACHE_L2X0
68460f1435cSMagnus Damm	select MULTI_IRQ_HANDLER
685ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
6862cd3c927SLaurent Pinchart	select PINCTRL
687b1b3f49cSRussell King	select PM_GENERIC_DOMAINS if PM
688b1b3f49cSRussell King	select SPARSE_IRQ
689c793c1b0SMagnus Damm	help
6900d9fd616SLaurent Pinchart	  Support for Renesas ARM SoC platforms using a non-multiplatform
6910d9fd616SLaurent Pinchart	  kernel. This includes the SH-Mobile, R-Mobile, EMMA-Mobile, R-Car
6920d9fd616SLaurent Pinchart	  and RZ families.
693c793c1b0SMagnus Damm
6941da177e4SLinus Torvaldsconfig ARCH_RPC
6951da177e4SLinus Torvalds	bool "RiscPC"
6961da177e4SLinus Torvalds	select ARCH_ACORN
697a08b6b79Sviro@ZenIV.linux.org.uk	select ARCH_MAY_HAVE_PC_FDC
69807f841b7SRussell King	select ARCH_SPARSEMEM_ENABLE
6995cfc8ee0SJohn Stultz	select ARCH_USES_GETTIMEOFFSET
700fa04e209SArnd Bergmann	select CPU_SA110
701b1b3f49cSRussell King	select FIQ
702d0ee9f40SArnd Bergmann	select HAVE_IDE
703b1b3f49cSRussell King	select HAVE_PATA_PLATFORM
704b1b3f49cSRussell King	select ISA_DMA_API
705c334bc15SRob Herring	select NEED_MACH_IO_H
7060cdc8b92SNicolas Pitre	select NEED_MACH_MEMORY_H
707ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
708b4811bacSArnd Bergmann	select VIRT_TO_BUS
7091da177e4SLinus Torvalds	help
7101da177e4SLinus Torvalds	  On the Acorn Risc-PC, Linux can support the internal IDE disk and
7111da177e4SLinus Torvalds	  CD-ROM interface, serial and parallel port, and the floppy drive.
7121da177e4SLinus Torvalds
7131da177e4SLinus Torvaldsconfig ARCH_SA1100
7141da177e4SLinus Torvalds	bool "SA1100-based"
715b1b3f49cSRussell King	select ARCH_MTD_XIP
7167444a72eSMichael Buesch	select ARCH_REQUIRE_GPIOLIB
717b1b3f49cSRussell King	select ARCH_SPARSEMEM_ENABLE
718b1b3f49cSRussell King	select CLKDEV_LOOKUP
719b1b3f49cSRussell King	select CLKSRC_MMIO
720b1b3f49cSRussell King	select CPU_FREQ
721b1b3f49cSRussell King	select CPU_SA1100
722b1b3f49cSRussell King	select GENERIC_CLOCKEVENTS
723d0ee9f40SArnd Bergmann	select HAVE_IDE
724b1b3f49cSRussell King	select ISA
7250cdc8b92SNicolas Pitre	select NEED_MACH_MEMORY_H
726375dec92SRussell King	select SPARSE_IRQ
727f999b8bdSMartin Michlmayr	help
728f999b8bdSMartin Michlmayr	  Support for StrongARM 11x0 based boards.
7291da177e4SLinus Torvalds
730b130d5c2SKukjin Kimconfig ARCH_S3C24XX
731b130d5c2SKukjin Kim	bool "Samsung S3C24XX SoCs"
73253650430SKukjin Kim	select ARCH_REQUIRE_GPIOLIB
733335cce74SArnd Bergmann	select ATAGS
734b1b3f49cSRussell King	select CLKDEV_LOOKUP
7354280506aSTomasz Figa	select CLKSRC_SAMSUNG_PWM
7367f78b6ebSRomain Naour	select GENERIC_CLOCKEVENTS
737880cf071STomasz Figa	select GPIO_SAMSUNG
73820676c15SKukjin Kim	select HAVE_S3C2410_I2C if I2C
739b130d5c2SKukjin Kim	select HAVE_S3C2410_WATCHDOG if WATCHDOG
740b1b3f49cSRussell King	select HAVE_S3C_RTC if RTC_CLASS
74117453dd2SHeiko Stuebner	select MULTI_IRQ_HANDLER
742c334bc15SRob Herring	select NEED_MACH_IO_H
743cd8dc7aeSTomasz Figa	select SAMSUNG_ATAGS
7441da177e4SLinus Torvalds	help
745b130d5c2SKukjin Kim	  Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
746b130d5c2SKukjin Kim	  and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
747b130d5c2SKukjin Kim	  (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
748b130d5c2SKukjin Kim	  Samsung SMDK2410 development board (and derivatives).
74963b1f51bSBen Dooks
750a08ab637SBen Dooksconfig ARCH_S3C64XX
751a08ab637SBen Dooks	bool "Samsung S3C64XX"
75289f0ce72SBen Dooks	select ARCH_REQUIRE_GPIOLIB
7531db0287aSTomasz Figa	select ARM_AMBA
754b1b3f49cSRussell King	select ARM_VIC
755335cce74SArnd Bergmann	select ATAGS
756b1b3f49cSRussell King	select CLKDEV_LOOKUP
7574280506aSTomasz Figa	select CLKSRC_SAMSUNG_PWM
758ccecba3cSPankaj Dubey	select COMMON_CLK_SAMSUNG
75970bacadbSTomasz Figa	select CPU_V6K
76004a49b71SRomain Naour	select GENERIC_CLOCKEVENTS
761880cf071STomasz Figa	select GPIO_SAMSUNG
76220676c15SKukjin Kim	select HAVE_S3C2410_I2C if I2C
763c39d8d55SKyungmin Park	select HAVE_S3C2410_WATCHDOG if WATCHDOG
764b1b3f49cSRussell King	select HAVE_TCM
765ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
766b1b3f49cSRussell King	select PLAT_SAMSUNG
7674ab75a3fSArnd Bergmann	select PM_GENERIC_DOMAINS if PM
768b1b3f49cSRussell King	select S3C_DEV_NAND
769b1b3f49cSRussell King	select S3C_GPIO_TRACK
770cd8dc7aeSTomasz Figa	select SAMSUNG_ATAGS
7716e2d9e93STomasz Figa	select SAMSUNG_WAKEMASK
77288f59738STomasz Figa	select SAMSUNG_WDT_RESET
773a08ab637SBen Dooks	help
774a08ab637SBen Dooks	  Samsung S3C64XX series based systems
775a08ab637SBen Dooks
77649b7a491SKukjin Kimconfig ARCH_S5P64X0
77749b7a491SKukjin Kim	bool "Samsung S5P6440 S5P6450"
778335cce74SArnd Bergmann	select ATAGS
779d8b22d25SThomas Abraham	select CLKDEV_LOOKUP
7804280506aSTomasz Figa	select CLKSRC_SAMSUNG_PWM
781b1b3f49cSRussell King	select CPU_V6
7829e65bbf2SSangbeom Kim	select GENERIC_CLOCKEVENTS
783880cf071STomasz Figa	select GPIO_SAMSUNG
78420676c15SKukjin Kim	select HAVE_S3C2410_I2C if I2C
785b1b3f49cSRussell King	select HAVE_S3C2410_WATCHDOG if WATCHDOG
786754961a8SKukjin Kim	select HAVE_S3C_RTC if RTC_CLASS
78701464226SRob Herring	select NEED_MACH_GPIO_H
788cd8dc7aeSTomasz Figa	select SAMSUNG_ATAGS
789171b3f0dSRussell King	select SAMSUNG_WDT_RESET
790c4ffccddSKukjin Kim	help
79149b7a491SKukjin Kim	  Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
79249b7a491SKukjin Kim	  SMDK6450.
793c4ffccddSKukjin Kim
794acc84707SMarek Szyprowskiconfig ARCH_S5PC100
795acc84707SMarek Szyprowski	bool "Samsung S5PC100"
79653650430SKukjin Kim	select ARCH_REQUIRE_GPIOLIB
797335cce74SArnd Bergmann	select ATAGS
79829e8eb0fSThomas Abraham	select CLKDEV_LOOKUP
7994280506aSTomasz Figa	select CLKSRC_SAMSUNG_PWM
8005a7652f2SByungho Min	select CPU_V7
8016a5a2e3bSRomain Naour	select GENERIC_CLOCKEVENTS
802880cf071STomasz Figa	select GPIO_SAMSUNG
80320676c15SKukjin Kim	select HAVE_S3C2410_I2C if I2C
804c39d8d55SKyungmin Park	select HAVE_S3C2410_WATCHDOG if WATCHDOG
805b1b3f49cSRussell King	select HAVE_S3C_RTC if RTC_CLASS
80601464226SRob Herring	select NEED_MACH_GPIO_H
807cd8dc7aeSTomasz Figa	select SAMSUNG_ATAGS
808171b3f0dSRussell King	select SAMSUNG_WDT_RESET
8095a7652f2SByungho Min	help
810acc84707SMarek Szyprowski	  Samsung S5PC100 series based systems
8115a7652f2SByungho Min
812170f4e42SKukjin Kimconfig ARCH_S5PV210
813170f4e42SKukjin Kim	bool "Samsung S5PV210/S5PC110"
8140f75a96bSKamil Debski	select ARCH_HAS_HOLES_MEMORYMODEL
815b1b3f49cSRussell King	select ARCH_SPARSEMEM_ENABLE
816335cce74SArnd Bergmann	select ATAGS
817b2a9dd46SThomas Abraham	select CLKDEV_LOOKUP
8184280506aSTomasz Figa	select CLKSRC_SAMSUNG_PWM
819b1b3f49cSRussell King	select CPU_V7
8209e65bbf2SSangbeom Kim	select GENERIC_CLOCKEVENTS
821880cf071STomasz Figa	select GPIO_SAMSUNG
82220676c15SKukjin Kim	select HAVE_S3C2410_I2C if I2C
823c39d8d55SKyungmin Park	select HAVE_S3C2410_WATCHDOG if WATCHDOG
824b1b3f49cSRussell King	select HAVE_S3C_RTC if RTC_CLASS
82501464226SRob Herring	select NEED_MACH_GPIO_H
8260cdc8b92SNicolas Pitre	select NEED_MACH_MEMORY_H
827cd8dc7aeSTomasz Figa	select SAMSUNG_ATAGS
828170f4e42SKukjin Kim	help
829170f4e42SKukjin Kim	  Samsung S5PV210/S5PC110 series based systems
830170f4e42SKukjin Kim
8317c6337e2SKevin Hilmanconfig ARCH_DAVINCI
8327c6337e2SKevin Hilman	bool "TI DaVinci"
833b1b3f49cSRussell King	select ARCH_HAS_HOLES_MEMORYMODEL
834dce1115bSDavid Brownell	select ARCH_REQUIRE_GPIOLIB
8356d803ba7SJean-Christop PLAGNIOL-VILLARD	select CLKDEV_LOOKUP
83620e9969bSDavid Brownell	select GENERIC_ALLOCATOR
837b1b3f49cSRussell King	select GENERIC_CLOCKEVENTS
838dc7ad3b3SRussell King	select GENERIC_IRQ_CHIP
839b1b3f49cSRussell King	select HAVE_IDE
8403ad7a42dSMatt Porter	select TI_PRIV_EDMA
841689e331fSSekhar Nori	select USE_OF
842b1b3f49cSRussell King	select ZONE_DMA
8437c6337e2SKevin Hilman	help
8447c6337e2SKevin Hilman	  Support for TI's DaVinci platform.
8457c6337e2SKevin Hilman
846a0694861STony Lindgrenconfig ARCH_OMAP1
847a0694861STony Lindgren	bool "TI OMAP1"
84800a36698SArnd Bergmann	depends on MMU
849b1b3f49cSRussell King	select ARCH_HAS_HOLES_MEMORYMODEL
850a0694861STony Lindgren	select ARCH_OMAP
85121f47fbcSAlexey Charkov	select ARCH_REQUIRE_GPIOLIB
852e9a91de7STony Prisk	select CLKDEV_LOOKUP
853cee37e50Sviresh kumar	select CLKSRC_MMIO
854b1b3f49cSRussell King	select GENERIC_CLOCKEVENTS
855a0694861STony Lindgren	select GENERIC_IRQ_CHIP
856a0694861STony Lindgren	select HAVE_IDE
857a0694861STony Lindgren	select IRQ_DOMAIN
858a0694861STony Lindgren	select NEED_MACH_IO_H if PCCARD
859a0694861STony Lindgren	select NEED_MACH_MEMORY_H
86021f47fbcSAlexey Charkov	help
861a0694861STony Lindgren	  Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
86202c981c0SBinghua Duan
8631da177e4SLinus Torvaldsendchoice
8641da177e4SLinus Torvalds
865387798b3SRob Herringmenu "Multiple platform selection"
866387798b3SRob Herring	depends on ARCH_MULTIPLATFORM
867387798b3SRob Herring
868387798b3SRob Herringcomment "CPU Core family selection"
869387798b3SRob Herring
870f8afae40SArnd Bergmannconfig ARCH_MULTI_V4
871f8afae40SArnd Bergmann	bool "ARMv4 based platforms (FA526)"
872f8afae40SArnd Bergmann	depends on !ARCH_MULTI_V6_V7
873f8afae40SArnd Bergmann	select ARCH_MULTI_V4_V5
874f8afae40SArnd Bergmann	select CPU_FA526
875f8afae40SArnd Bergmann
876387798b3SRob Herringconfig ARCH_MULTI_V4T
877387798b3SRob Herring	bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
878387798b3SRob Herring	depends on !ARCH_MULTI_V6_V7
879b1b3f49cSRussell King	select ARCH_MULTI_V4_V5
88024e860fbSArnd Bergmann	select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
88124e860fbSArnd Bergmann		CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \
88224e860fbSArnd Bergmann		CPU_ARM925T || CPU_ARM940T)
883387798b3SRob Herring
884387798b3SRob Herringconfig ARCH_MULTI_V5
885387798b3SRob Herring	bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
886387798b3SRob Herring	depends on !ARCH_MULTI_V6_V7
887b1b3f49cSRussell King	select ARCH_MULTI_V4_V5
88812567bbdSAndrew Lunn	select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
88924e860fbSArnd Bergmann		CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
89024e860fbSArnd Bergmann		CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
891387798b3SRob Herring
892387798b3SRob Herringconfig ARCH_MULTI_V4_V5
893387798b3SRob Herring	bool
894387798b3SRob Herring
895387798b3SRob Herringconfig ARCH_MULTI_V6
8968dda05ccSStephen Boyd	bool "ARMv6 based platforms (ARM11)"
897387798b3SRob Herring	select ARCH_MULTI_V6_V7
89842f4754aSRob Herring	select CPU_V6K
899387798b3SRob Herring
900387798b3SRob Herringconfig ARCH_MULTI_V7
9018dda05ccSStephen Boyd	bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
902387798b3SRob Herring	default y
903387798b3SRob Herring	select ARCH_MULTI_V6_V7
904b1b3f49cSRussell King	select CPU_V7
90590bc8ac7SRob Herring	select HAVE_SMP
906387798b3SRob Herring
907387798b3SRob Herringconfig ARCH_MULTI_V6_V7
908387798b3SRob Herring	bool
9099352b05bSRob Herring	select MIGHT_HAVE_CACHE_L2X0
910387798b3SRob Herring
911387798b3SRob Herringconfig ARCH_MULTI_CPU_AUTO
912387798b3SRob Herring	def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
913387798b3SRob Herring	select ARCH_MULTI_V5
914387798b3SRob Herring
915387798b3SRob Herringendmenu
916387798b3SRob Herring
91705e2a3deSRob Herringconfig ARCH_VIRT
91805e2a3deSRob Herring	bool "Dummy Virtual Machine" if ARCH_MULTI_V7
9194b8b5f25SRob Herring	select ARM_AMBA
92005e2a3deSRob Herring	select ARM_GIC
92105e2a3deSRob Herring	select ARM_PSCI
9224b8b5f25SRob Herring	select HAVE_ARM_ARCH_TIMER
92305e2a3deSRob Herring
924ccf50e23SRussell King#
925ccf50e23SRussell King# This is sorted alphabetically by mach-* pathname.  However, plat-*
926ccf50e23SRussell King# Kconfigs may be included either alphabetically (according to the
927ccf50e23SRussell King# plat- suffix) or along side the corresponding mach-* source.
928ccf50e23SRussell King#
9293e93a22bSGregory CLEMENTsource "arch/arm/mach-mvebu/Kconfig"
9303e93a22bSGregory CLEMENT
93195b8f20fSRussell Kingsource "arch/arm/mach-at91/Kconfig"
93295b8f20fSRussell King
9331d22924eSAnders Bergsource "arch/arm/mach-axxia/Kconfig"
9341d22924eSAnders Berg
9358ac49e04SChristian Daudtsource "arch/arm/mach-bcm/Kconfig"
9368ac49e04SChristian Daudt
9371c37fa10SSebastian Hesselbarthsource "arch/arm/mach-berlin/Kconfig"
9381c37fa10SSebastian Hesselbarth
9391da177e4SLinus Torvaldssource "arch/arm/mach-clps711x/Kconfig"
9401da177e4SLinus Torvalds
941d94f944eSAnton Vorontsovsource "arch/arm/mach-cns3xxx/Kconfig"
942d94f944eSAnton Vorontsov
94395b8f20fSRussell Kingsource "arch/arm/mach-davinci/Kconfig"
94495b8f20fSRussell King
94595b8f20fSRussell Kingsource "arch/arm/mach-dove/Kconfig"
94695b8f20fSRussell King
947e7736d47SLennert Buytenheksource "arch/arm/mach-ep93xx/Kconfig"
948e7736d47SLennert Buytenhek
9491da177e4SLinus Torvaldssource "arch/arm/mach-footbridge/Kconfig"
9501da177e4SLinus Torvalds
95159d3a193SPaulius Zaleckassource "arch/arm/mach-gemini/Kconfig"
95259d3a193SPaulius Zaleckas
953387798b3SRob Herringsource "arch/arm/mach-highbank/Kconfig"
954387798b3SRob Herring
955389ee0c2SHaojian Zhuangsource "arch/arm/mach-hisi/Kconfig"
956389ee0c2SHaojian Zhuang
9571da177e4SLinus Torvaldssource "arch/arm/mach-integrator/Kconfig"
9581da177e4SLinus Torvalds
9593f7e5815SLennert Buytenheksource "arch/arm/mach-iop32x/Kconfig"
9603f7e5815SLennert Buytenhek
9613f7e5815SLennert Buytenheksource "arch/arm/mach-iop33x/Kconfig"
9621da177e4SLinus Torvalds
963285f5fa7SDan Williamssource "arch/arm/mach-iop13xx/Kconfig"
964285f5fa7SDan Williams
9651da177e4SLinus Torvaldssource "arch/arm/mach-ixp4xx/Kconfig"
9661da177e4SLinus Torvalds
967828989adSSantosh Shilimkarsource "arch/arm/mach-keystone/Kconfig"
968828989adSSantosh Shilimkar
96995b8f20fSRussell Kingsource "arch/arm/mach-kirkwood/Kconfig"
97095b8f20fSRussell King
97195b8f20fSRussell Kingsource "arch/arm/mach-ks8695/Kconfig"
97295b8f20fSRussell King
97395b8f20fSRussell Kingsource "arch/arm/mach-msm/Kconfig"
97495b8f20fSRussell King
97517723fd3SJonas Jensensource "arch/arm/mach-moxart/Kconfig"
97617723fd3SJonas Jensen
977794d15b2SStanislav Samsonovsource "arch/arm/mach-mv78xx0/Kconfig"
978794d15b2SStanislav Samsonov
9793995eb82SShawn Guosource "arch/arm/mach-imx/Kconfig"
9801da177e4SLinus Torvalds
9811d3f33d5SShawn Guosource "arch/arm/mach-mxs/Kconfig"
9821d3f33d5SShawn Guo
98395b8f20fSRussell Kingsource "arch/arm/mach-netx/Kconfig"
98449cbe786SEric Miao
98595b8f20fSRussell Kingsource "arch/arm/mach-nomadik/Kconfig"
98695b8f20fSRussell King
9879851ca57SDaniel Tangsource "arch/arm/mach-nspire/Kconfig"
9889851ca57SDaniel Tang
989d48af15eSTony Lindgrensource "arch/arm/plat-omap/Kconfig"
990d48af15eSTony Lindgren
991d48af15eSTony Lindgrensource "arch/arm/mach-omap1/Kconfig"
9921da177e4SLinus Torvalds
9931dbae815STony Lindgrensource "arch/arm/mach-omap2/Kconfig"
9941dbae815STony Lindgren
9959dd0b194SLennert Buytenheksource "arch/arm/mach-orion5x/Kconfig"
996585cf175STzachi Perelstein
997387798b3SRob Herringsource "arch/arm/mach-picoxcell/Kconfig"
998387798b3SRob Herring
99995b8f20fSRussell Kingsource "arch/arm/mach-pxa/Kconfig"
100095b8f20fSRussell Kingsource "arch/arm/plat-pxa/Kconfig"
10011da177e4SLinus Torvalds
100295b8f20fSRussell Kingsource "arch/arm/mach-mmp/Kconfig"
100395b8f20fSRussell King
10048fc1b0f8SKumar Galasource "arch/arm/mach-qcom/Kconfig"
10058fc1b0f8SKumar Gala
100695b8f20fSRussell Kingsource "arch/arm/mach-realview/Kconfig"
100795b8f20fSRussell King
1008d63dc051SHeiko Stuebnersource "arch/arm/mach-rockchip/Kconfig"
1009d63dc051SHeiko Stuebner
101095b8f20fSRussell Kingsource "arch/arm/mach-sa1100/Kconfig"
1011edabd38eSSaeed Bishara
1012387798b3SRob Herringsource "arch/arm/mach-socfpga/Kconfig"
1013387798b3SRob Herring
1014a7ed099fSArnd Bergmannsource "arch/arm/mach-spear/Kconfig"
1015a21765a7SBen Dooks
101665ebcc11SSrinivas Kandagatlasource "arch/arm/mach-sti/Kconfig"
101765ebcc11SSrinivas Kandagatla
101885fd6d63SKukjin Kimsource "arch/arm/mach-s3c24xx/Kconfig"
10191da177e4SLinus Torvalds
1020431107eaSBen Dookssource "arch/arm/mach-s3c64xx/Kconfig"
1021a08ab637SBen Dooks
102249b7a491SKukjin Kimsource "arch/arm/mach-s5p64x0/Kconfig"
1023c4ffccddSKukjin Kim
10245a7652f2SByungho Minsource "arch/arm/mach-s5pc100/Kconfig"
10255a7652f2SByungho Min
1026170f4e42SKukjin Kimsource "arch/arm/mach-s5pv210/Kconfig"
1027170f4e42SKukjin Kim
102883014579SKukjin Kimsource "arch/arm/mach-exynos/Kconfig"
1029e509b289SRob Herringsource "arch/arm/plat-samsung/Kconfig"
1030cc0e72b8SChanghwan Youn
1031882d01f9SRussell Kingsource "arch/arm/mach-shmobile/Kconfig"
10321da177e4SLinus Torvalds
10333b52634fSMaxime Ripardsource "arch/arm/mach-sunxi/Kconfig"
10343b52634fSMaxime Ripard
1035156a0997SBarry Songsource "arch/arm/mach-prima2/Kconfig"
1036156a0997SBarry Song
1037c5f80065SErik Gillingsource "arch/arm/mach-tegra/Kconfig"
1038c5f80065SErik Gilling
103995b8f20fSRussell Kingsource "arch/arm/mach-u300/Kconfig"
10401da177e4SLinus Torvalds
104195b8f20fSRussell Kingsource "arch/arm/mach-ux500/Kconfig"
10421da177e4SLinus Torvalds
10431da177e4SLinus Torvaldssource "arch/arm/mach-versatile/Kconfig"
10441da177e4SLinus Torvalds
1045ceade897SRussell Kingsource "arch/arm/mach-vexpress/Kconfig"
1046420c34e4SRussell Kingsource "arch/arm/plat-versatile/Kconfig"
1047ceade897SRussell King
10486f35f9a9STony Prisksource "arch/arm/mach-vt8500/Kconfig"
10496f35f9a9STony Prisk
10507ec80ddfSwanzongshunsource "arch/arm/mach-w90x900/Kconfig"
10517ec80ddfSwanzongshun
10529a45eb69SJosh Cartwrightsource "arch/arm/mach-zynq/Kconfig"
10539a45eb69SJosh Cartwright
10541da177e4SLinus Torvalds# Definitions to make life easier
10551da177e4SLinus Torvaldsconfig ARCH_ACORN
10561da177e4SLinus Torvalds	bool
10571da177e4SLinus Torvalds
10587ae1f7ecSLennert Buytenhekconfig PLAT_IOP
10597ae1f7ecSLennert Buytenhek	bool
1060469d3044SMikael Pettersson	select GENERIC_CLOCKEVENTS
10617ae1f7ecSLennert Buytenhek
106269b02f6aSLennert Buytenhekconfig PLAT_ORION
106369b02f6aSLennert Buytenhek	bool
1064bfe45e0bSRussell King	select CLKSRC_MMIO
1065b1b3f49cSRussell King	select COMMON_CLK
1066dc7ad3b3SRussell King	select GENERIC_IRQ_CHIP
1067278b45b0SAndrew Lunn	select IRQ_DOMAIN
106869b02f6aSLennert Buytenhek
1069abcda1dcSThomas Petazzoniconfig PLAT_ORION_LEGACY
1070abcda1dcSThomas Petazzoni	bool
1071abcda1dcSThomas Petazzoni	select PLAT_ORION
1072abcda1dcSThomas Petazzoni
1073bd5ce433SEric Miaoconfig PLAT_PXA
1074bd5ce433SEric Miao	bool
1075bd5ce433SEric Miao
1076f4b8b319SRussell Kingconfig PLAT_VERSATILE
1077f4b8b319SRussell King	bool
1078f4b8b319SRussell King
1079e3887714SRussell Kingconfig ARM_TIMER_SP804
1080e3887714SRussell King	bool
1081bfe45e0bSRussell King	select CLKSRC_MMIO
10827a0eca71SRob Herring	select CLKSRC_OF if OF
1083e3887714SRussell King
1084d9a1beaaSAlexandre Courbotsource "arch/arm/firmware/Kconfig"
1085d9a1beaaSAlexandre Courbot
10861da177e4SLinus Torvaldssource arch/arm/mm/Kconfig
10871da177e4SLinus Torvalds
1088afe4b25eSLennert Buytenhekconfig IWMMXT
1089d93003e8SSebastian Hesselbarth	bool "Enable iWMMXt support"
1090d93003e8SSebastian Hesselbarth	depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
1091d93003e8SSebastian Hesselbarth	default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
1092afe4b25eSLennert Buytenhek	help
1093afe4b25eSLennert Buytenhek	  Enable support for iWMMXt context switching at run time if
1094afe4b25eSLennert Buytenhek	  running on a CPU that supports it.
1095afe4b25eSLennert Buytenhek
109652108641Seric miaoconfig MULTI_IRQ_HANDLER
109752108641Seric miao	bool
109852108641Seric miao	help
109952108641Seric miao	  Allow each machine to specify it's own IRQ handler at run time.
110052108641Seric miao
11013b93e7b0SHyok S. Choiif !MMU
11023b93e7b0SHyok S. Choisource "arch/arm/Kconfig-nommu"
11033b93e7b0SHyok S. Choiendif
11043b93e7b0SHyok S. Choi
11053e0a07f8SGregory CLEMENTconfig PJ4B_ERRATA_4742
11063e0a07f8SGregory CLEMENT	bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
11073e0a07f8SGregory CLEMENT	depends on CPU_PJ4B && MACH_ARMADA_370
11083e0a07f8SGregory CLEMENT	default y
11093e0a07f8SGregory CLEMENT	help
11103e0a07f8SGregory CLEMENT	  When coming out of either a Wait for Interrupt (WFI) or a Wait for
11113e0a07f8SGregory CLEMENT	  Event (WFE) IDLE states, a specific timing sensitivity exists between
11123e0a07f8SGregory CLEMENT	  the retiring WFI/WFE instructions and the newly issued subsequent
11133e0a07f8SGregory CLEMENT	  instructions.  This sensitivity can result in a CPU hang scenario.
11143e0a07f8SGregory CLEMENT	  Workaround:
11153e0a07f8SGregory CLEMENT	  The software must insert either a Data Synchronization Barrier (DSB)
11163e0a07f8SGregory CLEMENT	  or Data Memory Barrier (DMB) command immediately after the WFI/WFE
11173e0a07f8SGregory CLEMENT	  instruction
11183e0a07f8SGregory CLEMENT
1119f0c4b8d6SWill Deaconconfig ARM_ERRATA_326103
1120f0c4b8d6SWill Deacon	bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1121f0c4b8d6SWill Deacon	depends on CPU_V6
1122f0c4b8d6SWill Deacon	help
1123f0c4b8d6SWill Deacon	  Executing a SWP instruction to read-only memory does not set bit 11
1124f0c4b8d6SWill Deacon	  of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1125f0c4b8d6SWill Deacon	  treat the access as a read, preventing a COW from occurring and
1126f0c4b8d6SWill Deacon	  causing the faulting task to livelock.
1127f0c4b8d6SWill Deacon
11289cba3cccSCatalin Marinasconfig ARM_ERRATA_411920
11299cba3cccSCatalin Marinas	bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1130e399b1a4SRussell King	depends on CPU_V6 || CPU_V6K
11319cba3cccSCatalin Marinas	help
11329cba3cccSCatalin Marinas	  Invalidation of the Instruction Cache operation can
11339cba3cccSCatalin Marinas	  fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
11349cba3cccSCatalin Marinas	  It does not affect the MPCore. This option enables the ARM Ltd.
11359cba3cccSCatalin Marinas	  recommended workaround.
11369cba3cccSCatalin Marinas
11377ce236fcSCatalin Marinasconfig ARM_ERRATA_430973
11387ce236fcSCatalin Marinas	bool "ARM errata: Stale prediction on replaced interworking branch"
11397ce236fcSCatalin Marinas	depends on CPU_V7
11407ce236fcSCatalin Marinas	help
11417ce236fcSCatalin Marinas	  This option enables the workaround for the 430973 Cortex-A8
11427ce236fcSCatalin Marinas	  (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
11437ce236fcSCatalin Marinas	  interworking branch is replaced with another code sequence at the
11447ce236fcSCatalin Marinas	  same virtual address, whether due to self-modifying code or virtual
11457ce236fcSCatalin Marinas	  to physical address re-mapping, Cortex-A8 does not recover from the
11467ce236fcSCatalin Marinas	  stale interworking branch prediction. This results in Cortex-A8
11477ce236fcSCatalin Marinas	  executing the new code sequence in the incorrect ARM or Thumb state.
11487ce236fcSCatalin Marinas	  The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
11497ce236fcSCatalin Marinas	  and also flushes the branch target cache at every context switch.
11507ce236fcSCatalin Marinas	  Note that setting specific bits in the ACTLR register may not be
11517ce236fcSCatalin Marinas	  available in non-secure mode.
11527ce236fcSCatalin Marinas
1153855c551fSCatalin Marinasconfig ARM_ERRATA_458693
1154855c551fSCatalin Marinas	bool "ARM errata: Processor deadlock when a false hazard is created"
1155855c551fSCatalin Marinas	depends on CPU_V7
115662e4d357SRob Herring	depends on !ARCH_MULTIPLATFORM
1157855c551fSCatalin Marinas	help
1158855c551fSCatalin Marinas	  This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1159855c551fSCatalin Marinas	  erratum. For very specific sequences of memory operations, it is
1160855c551fSCatalin Marinas	  possible for a hazard condition intended for a cache line to instead
1161855c551fSCatalin Marinas	  be incorrectly associated with a different cache line. This false
1162855c551fSCatalin Marinas	  hazard might then cause a processor deadlock. The workaround enables
1163855c551fSCatalin Marinas	  the L1 caching of the NEON accesses and disables the PLD instruction
1164855c551fSCatalin Marinas	  in the ACTLR register. Note that setting specific bits in the ACTLR
1165855c551fSCatalin Marinas	  register may not be available in non-secure mode.
1166855c551fSCatalin Marinas
11670516e464SCatalin Marinasconfig ARM_ERRATA_460075
11680516e464SCatalin Marinas	bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
11690516e464SCatalin Marinas	depends on CPU_V7
117062e4d357SRob Herring	depends on !ARCH_MULTIPLATFORM
11710516e464SCatalin Marinas	help
11720516e464SCatalin Marinas	  This option enables the workaround for the 460075 Cortex-A8 (r2p0)
11730516e464SCatalin Marinas	  erratum. Any asynchronous access to the L2 cache may encounter a
11740516e464SCatalin Marinas	  situation in which recent store transactions to the L2 cache are lost
11750516e464SCatalin Marinas	  and overwritten with stale memory contents from external memory. The
11760516e464SCatalin Marinas	  workaround disables the write-allocate mode for the L2 cache via the
11770516e464SCatalin Marinas	  ACTLR register. Note that setting specific bits in the ACTLR register
11780516e464SCatalin Marinas	  may not be available in non-secure mode.
11790516e464SCatalin Marinas
11809f05027cSWill Deaconconfig ARM_ERRATA_742230
11819f05027cSWill Deacon	bool "ARM errata: DMB operation may be faulty"
11829f05027cSWill Deacon	depends on CPU_V7 && SMP
118362e4d357SRob Herring	depends on !ARCH_MULTIPLATFORM
11849f05027cSWill Deacon	help
11859f05027cSWill Deacon	  This option enables the workaround for the 742230 Cortex-A9
11869f05027cSWill Deacon	  (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
11879f05027cSWill Deacon	  between two write operations may not ensure the correct visibility
11889f05027cSWill Deacon	  ordering of the two writes. This workaround sets a specific bit in
11899f05027cSWill Deacon	  the diagnostic register of the Cortex-A9 which causes the DMB
11909f05027cSWill Deacon	  instruction to behave as a DSB, ensuring the correct behaviour of
11919f05027cSWill Deacon	  the two writes.
11929f05027cSWill Deacon
1193a672e99bSWill Deaconconfig ARM_ERRATA_742231
1194a672e99bSWill Deacon	bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1195a672e99bSWill Deacon	depends on CPU_V7 && SMP
119662e4d357SRob Herring	depends on !ARCH_MULTIPLATFORM
1197a672e99bSWill Deacon	help
1198a672e99bSWill Deacon	  This option enables the workaround for the 742231 Cortex-A9
1199a672e99bSWill Deacon	  (r2p0..r2p2) erratum. Under certain conditions, specific to the
1200a672e99bSWill Deacon	  Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1201a672e99bSWill Deacon	  accessing some data located in the same cache line, may get corrupted
1202a672e99bSWill Deacon	  data due to bad handling of the address hazard when the line gets
1203a672e99bSWill Deacon	  replaced from one of the CPUs at the same time as another CPU is
1204a672e99bSWill Deacon	  accessing it. This workaround sets specific bits in the diagnostic
1205a672e99bSWill Deacon	  register of the Cortex-A9 which reduces the linefill issuing
1206a672e99bSWill Deacon	  capabilities of the processor.
1207a672e99bSWill Deacon
120869155794SJon Medhurstconfig ARM_ERRATA_643719
120969155794SJon Medhurst	bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
121069155794SJon Medhurst	depends on CPU_V7 && SMP
121169155794SJon Medhurst	help
121269155794SJon Medhurst	  This option enables the workaround for the 643719 Cortex-A9 (prior to
121369155794SJon Medhurst	  r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
121469155794SJon Medhurst	  register returns zero when it should return one. The workaround
121569155794SJon Medhurst	  corrects this value, ensuring cache maintenance operations which use
121669155794SJon Medhurst	  it behave as intended and avoiding data corruption.
121769155794SJon Medhurst
1218cdf357f1SWill Deaconconfig ARM_ERRATA_720789
1219cdf357f1SWill Deacon	bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1220e66dc745SDave Martin	depends on CPU_V7
1221cdf357f1SWill Deacon	help
1222cdf357f1SWill Deacon	  This option enables the workaround for the 720789 Cortex-A9 (prior to
1223cdf357f1SWill Deacon	  r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1224cdf357f1SWill Deacon	  broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1225cdf357f1SWill Deacon	  As a consequence of this erratum, some TLB entries which should be
1226cdf357f1SWill Deacon	  invalidated are not, resulting in an incoherency in the system page
1227cdf357f1SWill Deacon	  tables. The workaround changes the TLB flushing routines to invalidate
1228cdf357f1SWill Deacon	  entries regardless of the ASID.
1229475d92fcSWill Deacon
1230475d92fcSWill Deaconconfig ARM_ERRATA_743622
1231475d92fcSWill Deacon	bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1232475d92fcSWill Deacon	depends on CPU_V7
123362e4d357SRob Herring	depends on !ARCH_MULTIPLATFORM
1234475d92fcSWill Deacon	help
1235475d92fcSWill Deacon	  This option enables the workaround for the 743622 Cortex-A9
1236efbc74acSWill Deacon	  (r2p*) erratum. Under very rare conditions, a faulty
1237475d92fcSWill Deacon	  optimisation in the Cortex-A9 Store Buffer may lead to data
1238475d92fcSWill Deacon	  corruption. This workaround sets a specific bit in the diagnostic
1239475d92fcSWill Deacon	  register of the Cortex-A9 which disables the Store Buffer
1240475d92fcSWill Deacon	  optimisation, preventing the defect from occurring. This has no
1241475d92fcSWill Deacon	  visible impact on the overall performance or power consumption of the
1242475d92fcSWill Deacon	  processor.
1243475d92fcSWill Deacon
12449a27c27cSWill Deaconconfig ARM_ERRATA_751472
12459a27c27cSWill Deacon	bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1246ba90c516SDave Martin	depends on CPU_V7
124762e4d357SRob Herring	depends on !ARCH_MULTIPLATFORM
12489a27c27cSWill Deacon	help
12499a27c27cSWill Deacon	  This option enables the workaround for the 751472 Cortex-A9 (prior
12509a27c27cSWill Deacon	  to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
12519a27c27cSWill Deacon	  completion of a following broadcasted operation if the second
12529a27c27cSWill Deacon	  operation is received by a CPU before the ICIALLUIS has completed,
12539a27c27cSWill Deacon	  potentially leading to corrupted entries in the cache or TLB.
12549a27c27cSWill Deacon
1255fcbdc5feSWill Deaconconfig ARM_ERRATA_754322
1256fcbdc5feSWill Deacon	bool "ARM errata: possible faulty MMU translations following an ASID switch"
1257fcbdc5feSWill Deacon	depends on CPU_V7
1258fcbdc5feSWill Deacon	help
1259fcbdc5feSWill Deacon	  This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1260fcbdc5feSWill Deacon	  r3p*) erratum. A speculative memory access may cause a page table walk
1261fcbdc5feSWill Deacon	  which starts prior to an ASID switch but completes afterwards. This
1262fcbdc5feSWill Deacon	  can populate the micro-TLB with a stale entry which may be hit with
1263fcbdc5feSWill Deacon	  the new ASID. This workaround places two dsb instructions in the mm
1264fcbdc5feSWill Deacon	  switching code so that no page table walks can cross the ASID switch.
1265fcbdc5feSWill Deacon
12665dab26afSWill Deaconconfig ARM_ERRATA_754327
12675dab26afSWill Deacon	bool "ARM errata: no automatic Store Buffer drain"
12685dab26afSWill Deacon	depends on CPU_V7 && SMP
12695dab26afSWill Deacon	help
12705dab26afSWill Deacon	  This option enables the workaround for the 754327 Cortex-A9 (prior to
12715dab26afSWill Deacon	  r2p0) erratum. The Store Buffer does not have any automatic draining
12725dab26afSWill Deacon	  mechanism and therefore a livelock may occur if an external agent
12735dab26afSWill Deacon	  continuously polls a memory location waiting to observe an update.
12745dab26afSWill Deacon	  This workaround defines cpu_relax() as smp_mb(), preventing correctly
12755dab26afSWill Deacon	  written polling loops from denying visibility of updates to memory.
12765dab26afSWill Deacon
1277145e10e1SCatalin Marinasconfig ARM_ERRATA_364296
1278145e10e1SCatalin Marinas	bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1279fd832478SFabio Estevam	depends on CPU_V6
1280145e10e1SCatalin Marinas	help
1281145e10e1SCatalin Marinas	  This options enables the workaround for the 364296 ARM1136
1282145e10e1SCatalin Marinas	  r0p2 erratum (possible cache data corruption with
1283145e10e1SCatalin Marinas	  hit-under-miss enabled). It sets the undocumented bit 31 in
1284145e10e1SCatalin Marinas	  the auxiliary control register and the FI bit in the control
1285145e10e1SCatalin Marinas	  register, thus disabling hit-under-miss without putting the
1286145e10e1SCatalin Marinas	  processor into full low interrupt latency mode. ARM11MPCore
1287145e10e1SCatalin Marinas	  is not affected.
1288145e10e1SCatalin Marinas
1289f630c1bdSWill Deaconconfig ARM_ERRATA_764369
1290f630c1bdSWill Deacon	bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1291f630c1bdSWill Deacon	depends on CPU_V7 && SMP
1292f630c1bdSWill Deacon	help
1293f630c1bdSWill Deacon	  This option enables the workaround for erratum 764369
1294f630c1bdSWill Deacon	  affecting Cortex-A9 MPCore with two or more processors (all
1295f630c1bdSWill Deacon	  current revisions). Under certain timing circumstances, a data
1296f630c1bdSWill Deacon	  cache line maintenance operation by MVA targeting an Inner
1297f630c1bdSWill Deacon	  Shareable memory region may fail to proceed up to either the
1298f630c1bdSWill Deacon	  Point of Coherency or to the Point of Unification of the
1299f630c1bdSWill Deacon	  system. This workaround adds a DSB instruction before the
1300f630c1bdSWill Deacon	  relevant cache maintenance functions and sets a specific bit
1301f630c1bdSWill Deacon	  in the diagnostic control register of the SCU.
1302f630c1bdSWill Deacon
13037253b85cSSimon Hormanconfig ARM_ERRATA_775420
13047253b85cSSimon Horman       bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
13057253b85cSSimon Horman       depends on CPU_V7
13067253b85cSSimon Horman       help
13077253b85cSSimon Horman	 This option enables the workaround for the 775420 Cortex-A9 (r2p2,
13087253b85cSSimon Horman	 r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
13097253b85cSSimon Horman	 operation aborts with MMU exception, it might cause the processor
13107253b85cSSimon Horman	 to deadlock. This workaround puts DSB before executing ISB if
13117253b85cSSimon Horman	 an abort may occur on cache maintenance.
13127253b85cSSimon Horman
131393dc6887SCatalin Marinasconfig ARM_ERRATA_798181
131493dc6887SCatalin Marinas	bool "ARM errata: TLBI/DSB failure on Cortex-A15"
131593dc6887SCatalin Marinas	depends on CPU_V7 && SMP
131693dc6887SCatalin Marinas	help
131793dc6887SCatalin Marinas	  On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
131893dc6887SCatalin Marinas	  adequately shooting down all use of the old entries. This
131993dc6887SCatalin Marinas	  option enables the Linux kernel workaround for this erratum
132093dc6887SCatalin Marinas	  which sends an IPI to the CPUs that are running the same ASID
132193dc6887SCatalin Marinas	  as the one being invalidated.
132293dc6887SCatalin Marinas
132384b6504fSWill Deaconconfig ARM_ERRATA_773022
132484b6504fSWill Deacon	bool "ARM errata: incorrect instructions may be executed from loop buffer"
132584b6504fSWill Deacon	depends on CPU_V7
132684b6504fSWill Deacon	help
132784b6504fSWill Deacon	  This option enables the workaround for the 773022 Cortex-A15
132884b6504fSWill Deacon	  (up to r0p4) erratum. In certain rare sequences of code, the
132984b6504fSWill Deacon	  loop buffer may deliver incorrect instructions. This
133084b6504fSWill Deacon	  workaround disables the loop buffer to avoid the erratum.
133184b6504fSWill Deacon
13321da177e4SLinus Torvaldsendmenu
13331da177e4SLinus Torvalds
13341da177e4SLinus Torvaldssource "arch/arm/common/Kconfig"
13351da177e4SLinus Torvalds
13361da177e4SLinus Torvaldsmenu "Bus support"
13371da177e4SLinus Torvalds
13381da177e4SLinus Torvaldsconfig ARM_AMBA
13391da177e4SLinus Torvalds	bool
13401da177e4SLinus Torvalds
13411da177e4SLinus Torvaldsconfig ISA
13421da177e4SLinus Torvalds	bool
13431da177e4SLinus Torvalds	help
13441da177e4SLinus Torvalds	  Find out whether you have ISA slots on your motherboard.  ISA is the
13451da177e4SLinus Torvalds	  name of a bus system, i.e. the way the CPU talks to the other stuff
13461da177e4SLinus Torvalds	  inside your box.  Other bus systems are PCI, EISA, MicroChannel
13471da177e4SLinus Torvalds	  (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
13481da177e4SLinus Torvalds	  newer boards don't support it.  If you have ISA, say Y, otherwise N.
13491da177e4SLinus Torvalds
1350065909b9SRussell King# Select ISA DMA controller support
13511da177e4SLinus Torvaldsconfig ISA_DMA
13521da177e4SLinus Torvalds	bool
1353065909b9SRussell King	select ISA_DMA_API
13541da177e4SLinus Torvalds
1355065909b9SRussell King# Select ISA DMA interface
13565cae841bSAl Viroconfig ISA_DMA_API
13575cae841bSAl Viro	bool
13585cae841bSAl Viro
13591da177e4SLinus Torvaldsconfig PCI
13600b05da72SHans Ulli Kroll	bool "PCI support" if MIGHT_HAVE_PCI
13611da177e4SLinus Torvalds	help
13621da177e4SLinus Torvalds	  Find out whether you have a PCI motherboard. PCI is the name of a
13631da177e4SLinus Torvalds	  bus system, i.e. the way the CPU talks to the other stuff inside
13641da177e4SLinus Torvalds	  your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
13651da177e4SLinus Torvalds	  VESA. If you have PCI, say Y, otherwise N.
13661da177e4SLinus Torvalds
136752882173SAnton Vorontsovconfig PCI_DOMAINS
136852882173SAnton Vorontsov	bool
136952882173SAnton Vorontsov	depends on PCI
137052882173SAnton Vorontsov
1371b080ac8aSMarcelo Roberto Jimenezconfig PCI_NANOENGINE
1372b080ac8aSMarcelo Roberto Jimenez	bool "BSE nanoEngine PCI support"
1373b080ac8aSMarcelo Roberto Jimenez	depends on SA1100_NANOENGINE
1374b080ac8aSMarcelo Roberto Jimenez	help
1375b080ac8aSMarcelo Roberto Jimenez	  Enable PCI on the BSE nanoEngine board.
1376b080ac8aSMarcelo Roberto Jimenez
137736e23590SMatthew Wilcoxconfig PCI_SYSCALL
137836e23590SMatthew Wilcox	def_bool PCI
137936e23590SMatthew Wilcox
1380a0113a99SMike Rapoportconfig PCI_HOST_ITE8152
1381a0113a99SMike Rapoport	bool
1382a0113a99SMike Rapoport	depends on PCI && MACH_ARMCORE
1383a0113a99SMike Rapoport	default y
1384a0113a99SMike Rapoport	select DMABOUNCE
1385a0113a99SMike Rapoport
13861da177e4SLinus Torvaldssource "drivers/pci/Kconfig"
13873f06d157SJingoo Hansource "drivers/pci/pcie/Kconfig"
13881da177e4SLinus Torvalds
13891da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig"
13901da177e4SLinus Torvalds
13911da177e4SLinus Torvaldsendmenu
13921da177e4SLinus Torvalds
13931da177e4SLinus Torvaldsmenu "Kernel Features"
13941da177e4SLinus Torvalds
13953b55658aSDave Martinconfig HAVE_SMP
13963b55658aSDave Martin	bool
13973b55658aSDave Martin	help
13983b55658aSDave Martin	  This option should be selected by machines which have an SMP-
13993b55658aSDave Martin	  capable CPU.
14003b55658aSDave Martin
14013b55658aSDave Martin	  The only effect of this option is to make the SMP-related
14023b55658aSDave Martin	  options available to the user for configuration.
14033b55658aSDave Martin
14041da177e4SLinus Torvaldsconfig SMP
1405bb2d8130SRussell King	bool "Symmetric Multi-Processing"
1406fbb4ddacSRussell King	depends on CPU_V6K || CPU_V7
1407bc28248eSRussell King	depends on GENERIC_CLOCKEVENTS
14083b55658aSDave Martin	depends on HAVE_SMP
1409801bb21cSJonathan Austin	depends on MMU || ARM_MPU
14101da177e4SLinus Torvalds	help
14111da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
14124a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
14134a474157SRobert Graffham	  than one CPU, say Y.
14141da177e4SLinus Torvalds
14154a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
14161da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
14174a474157SRobert Graffham	  you say Y here, the kernel will run on many, but not all,
14184a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
14194a474157SRobert Graffham	  will run faster if you say N here.
14201da177e4SLinus Torvalds
1421395cf969SPaul Bolle	  See also <file:Documentation/x86/i386/IO-APIC.txt>,
14221da177e4SLinus Torvalds	  <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
142350a23e6eSJustin P. Mattock	  <http://tldp.org/HOWTO/SMP-HOWTO.html>.
14241da177e4SLinus Torvalds
14251da177e4SLinus Torvalds	  If you don't know what to do here, say N.
14261da177e4SLinus Torvalds
1427f00ec48fSRussell Kingconfig SMP_ON_UP
1428f00ec48fSRussell King	bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1429801bb21cSJonathan Austin	depends on SMP && !XIP_KERNEL && MMU
1430f00ec48fSRussell King	default y
1431f00ec48fSRussell King	help
1432f00ec48fSRussell King	  SMP kernels contain instructions which fail on non-SMP processors.
1433f00ec48fSRussell King	  Enabling this option allows the kernel to modify itself to make
1434f00ec48fSRussell King	  these instructions safe.  Disabling it allows about 1K of space
1435f00ec48fSRussell King	  savings.
1436f00ec48fSRussell King
1437f00ec48fSRussell King	  If you don't know what to do here, say Y.
1438f00ec48fSRussell King
1439c9018aabSVincent Guittotconfig ARM_CPU_TOPOLOGY
1440c9018aabSVincent Guittot	bool "Support cpu topology definition"
1441c9018aabSVincent Guittot	depends on SMP && CPU_V7
1442c9018aabSVincent Guittot	default y
1443c9018aabSVincent Guittot	help
1444c9018aabSVincent Guittot	  Support ARM cpu topology definition. The MPIDR register defines
1445c9018aabSVincent Guittot	  affinity between processors which is then used to describe the cpu
1446c9018aabSVincent Guittot	  topology of an ARM System.
1447c9018aabSVincent Guittot
1448c9018aabSVincent Guittotconfig SCHED_MC
1449c9018aabSVincent Guittot	bool "Multi-core scheduler support"
1450c9018aabSVincent Guittot	depends on ARM_CPU_TOPOLOGY
1451c9018aabSVincent Guittot	help
1452c9018aabSVincent Guittot	  Multi-core scheduler support improves the CPU scheduler's decision
1453c9018aabSVincent Guittot	  making when dealing with multi-core CPU chips at a cost of slightly
1454c9018aabSVincent Guittot	  increased overhead in some places. If unsure say N here.
1455c9018aabSVincent Guittot
1456c9018aabSVincent Guittotconfig SCHED_SMT
1457c9018aabSVincent Guittot	bool "SMT scheduler support"
1458c9018aabSVincent Guittot	depends on ARM_CPU_TOPOLOGY
1459c9018aabSVincent Guittot	help
1460c9018aabSVincent Guittot	  Improves the CPU scheduler's decision making when dealing with
1461c9018aabSVincent Guittot	  MultiThreading at a cost of slightly increased overhead in some
1462c9018aabSVincent Guittot	  places. If unsure say N here.
1463c9018aabSVincent Guittot
1464a8cbcd92SRussell Kingconfig HAVE_ARM_SCU
1465a8cbcd92SRussell King	bool
1466a8cbcd92SRussell King	help
1467a8cbcd92SRussell King	  This option enables support for the ARM system coherency unit
1468a8cbcd92SRussell King
14698a4da6e3SMark Rutlandconfig HAVE_ARM_ARCH_TIMER
1470022c03a2SMarc Zyngier	bool "Architected timer support"
1471022c03a2SMarc Zyngier	depends on CPU_V7
14728a4da6e3SMark Rutland	select ARM_ARCH_TIMER
14730c403462SWill Deacon	select GENERIC_CLOCKEVENTS
1474022c03a2SMarc Zyngier	help
1475022c03a2SMarc Zyngier	  This option enables support for the ARM architected timer
1476022c03a2SMarc Zyngier
1477f32f4ce2SRussell Kingconfig HAVE_ARM_TWD
1478f32f4ce2SRussell King	bool
1479f32f4ce2SRussell King	depends on SMP
1480da4a686aSRob Herring	select CLKSRC_OF if OF
1481f32f4ce2SRussell King	help
1482f32f4ce2SRussell King	  This options enables support for the ARM timer and watchdog unit
1483f32f4ce2SRussell King
1484e8db288eSNicolas Pitreconfig MCPM
1485e8db288eSNicolas Pitre	bool "Multi-Cluster Power Management"
1486e8db288eSNicolas Pitre	depends on CPU_V7 && SMP
1487e8db288eSNicolas Pitre	help
1488e8db288eSNicolas Pitre	  This option provides the common power management infrastructure
1489e8db288eSNicolas Pitre	  for (multi-)cluster based systems, such as big.LITTLE based
1490e8db288eSNicolas Pitre	  systems.
1491e8db288eSNicolas Pitre
14921c33be57SNicolas Pitreconfig BIG_LITTLE
14931c33be57SNicolas Pitre	bool "big.LITTLE support (Experimental)"
14941c33be57SNicolas Pitre	depends on CPU_V7 && SMP
14951c33be57SNicolas Pitre	select MCPM
14961c33be57SNicolas Pitre	help
14971c33be57SNicolas Pitre	  This option enables support selections for the big.LITTLE
14981c33be57SNicolas Pitre	  system architecture.
14991c33be57SNicolas Pitre
15001c33be57SNicolas Pitreconfig BL_SWITCHER
15011c33be57SNicolas Pitre	bool "big.LITTLE switcher support"
15021c33be57SNicolas Pitre	depends on BIG_LITTLE && MCPM && HOTPLUG_CPU
15031c33be57SNicolas Pitre	select ARM_CPU_SUSPEND
150451aaf81fSRussell King	select CPU_PM
15051c33be57SNicolas Pitre	help
15061c33be57SNicolas Pitre	  The big.LITTLE "switcher" provides the core functionality to
15071c33be57SNicolas Pitre	  transparently handle transition between a cluster of A15's
15081c33be57SNicolas Pitre	  and a cluster of A7's in a big.LITTLE system.
15091c33be57SNicolas Pitre
1510b22537c6SNicolas Pitreconfig BL_SWITCHER_DUMMY_IF
1511b22537c6SNicolas Pitre	tristate "Simple big.LITTLE switcher user interface"
1512b22537c6SNicolas Pitre	depends on BL_SWITCHER && DEBUG_KERNEL
1513b22537c6SNicolas Pitre	help
1514b22537c6SNicolas Pitre	  This is a simple and dummy char dev interface to control
1515b22537c6SNicolas Pitre	  the big.LITTLE switcher core code.  It is meant for
1516b22537c6SNicolas Pitre	  debugging purposes only.
1517b22537c6SNicolas Pitre
15188d5796d2SLennert Buytenhekchoice
15198d5796d2SLennert Buytenhek	prompt "Memory split"
1520006fa259SRussell King	depends on MMU
15218d5796d2SLennert Buytenhek	default VMSPLIT_3G
15228d5796d2SLennert Buytenhek	help
15238d5796d2SLennert Buytenhek	  Select the desired split between kernel and user memory.
15248d5796d2SLennert Buytenhek
15258d5796d2SLennert Buytenhek	  If you are not absolutely sure what you are doing, leave this
15268d5796d2SLennert Buytenhek	  option alone!
15278d5796d2SLennert Buytenhek
15288d5796d2SLennert Buytenhek	config VMSPLIT_3G
15298d5796d2SLennert Buytenhek		bool "3G/1G user/kernel split"
15308d5796d2SLennert Buytenhek	config VMSPLIT_2G
15318d5796d2SLennert Buytenhek		bool "2G/2G user/kernel split"
15328d5796d2SLennert Buytenhek	config VMSPLIT_1G
15338d5796d2SLennert Buytenhek		bool "1G/3G user/kernel split"
15348d5796d2SLennert Buytenhekendchoice
15358d5796d2SLennert Buytenhek
15368d5796d2SLennert Buytenhekconfig PAGE_OFFSET
15378d5796d2SLennert Buytenhek	hex
1538006fa259SRussell King	default PHYS_OFFSET if !MMU
15398d5796d2SLennert Buytenhek	default 0x40000000 if VMSPLIT_1G
15408d5796d2SLennert Buytenhek	default 0x80000000 if VMSPLIT_2G
15418d5796d2SLennert Buytenhek	default 0xC0000000
15428d5796d2SLennert Buytenhek
15431da177e4SLinus Torvaldsconfig NR_CPUS
15441da177e4SLinus Torvalds	int "Maximum number of CPUs (2-32)"
15451da177e4SLinus Torvalds	range 2 32
15461da177e4SLinus Torvalds	depends on SMP
15471da177e4SLinus Torvalds	default "4"
15481da177e4SLinus Torvalds
1549a054a811SRussell Kingconfig HOTPLUG_CPU
155000b7dedeSRussell King	bool "Support for hot-pluggable CPUs"
155140b31360SStephen Rothwell	depends on SMP
1552a054a811SRussell King	help
1553a054a811SRussell King	  Say Y here to experiment with turning CPUs off and on.  CPUs
1554a054a811SRussell King	  can be controlled through /sys/devices/system/cpu.
1555a054a811SRussell King
15562bdd424fSWill Deaconconfig ARM_PSCI
15572bdd424fSWill Deacon	bool "Support for the ARM Power State Coordination Interface (PSCI)"
15582bdd424fSWill Deacon	depends on CPU_V7
15592bdd424fSWill Deacon	help
15602bdd424fSWill Deacon	  Say Y here if you want Linux to communicate with system firmware
15612bdd424fSWill Deacon	  implementing the PSCI specification for CPU-centric power
15622bdd424fSWill Deacon	  management operations described in ARM document number ARM DEN
15632bdd424fSWill Deacon	  0022A ("Power State Coordination Interface System Software on
15642bdd424fSWill Deacon	  ARM processors").
15652bdd424fSWill Deacon
15662a6ad871SMaxime Ripard# The GPIO number here must be sorted by descending number. In case of
15672a6ad871SMaxime Ripard# a multiplatform kernel, we just want the highest value required by the
15682a6ad871SMaxime Ripard# selected platforms.
156944986ab0SPeter De Schrijver (NVIDIA)config ARCH_NR_GPIO
157044986ab0SPeter De Schrijver (NVIDIA)	int
15713dea19e8SPeter De Schrijver (NVIDIA)	default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
157241c3548eSLinus Walleij	default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX
1573eb171a99SBoris BREZILLON	default 416 if ARCH_SUNXI
157406b851e5SOlof Johansson	default 392 if ARCH_U8500
157501bb914cSTony Prisk	default 352 if ARCH_VT8500
15762a6ad871SMaxime Ripard	default 264 if MACH_H4700
157744986ab0SPeter De Schrijver (NVIDIA)	default 0
157844986ab0SPeter De Schrijver (NVIDIA)	help
157944986ab0SPeter De Schrijver (NVIDIA)	  Maximum number of GPIOs in the system.
158044986ab0SPeter De Schrijver (NVIDIA)
158144986ab0SPeter De Schrijver (NVIDIA)	  If unsure, leave the default value.
158244986ab0SPeter De Schrijver (NVIDIA)
1583d45a398fSUwe Kleine-Königsource kernel/Kconfig.preempt
15841da177e4SLinus Torvalds
1585c9218b16SRussell Kingconfig HZ_FIXED
1586f8065813SRussell King	int
1587b130d5c2SKukjin Kim	default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1588a73ddc61SKukjin Kim		ARCH_S5PV210 || ARCH_EXYNOS4
15895248c657SDavid Brownell	default AT91_TIMER_HZ if ARCH_AT91
1590bf98c1eaSLaurent Pinchart	default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
159147d84682SRussell King	default 0
1592c9218b16SRussell King
1593c9218b16SRussell Kingchoice
159447d84682SRussell King	depends on HZ_FIXED = 0
1595c9218b16SRussell King	prompt "Timer frequency"
1596c9218b16SRussell King
1597c9218b16SRussell Kingconfig HZ_100
1598c9218b16SRussell King	bool "100 Hz"
1599c9218b16SRussell King
1600c9218b16SRussell Kingconfig HZ_200
1601c9218b16SRussell King	bool "200 Hz"
1602c9218b16SRussell King
1603c9218b16SRussell Kingconfig HZ_250
1604c9218b16SRussell King	bool "250 Hz"
1605c9218b16SRussell King
1606c9218b16SRussell Kingconfig HZ_300
1607c9218b16SRussell King	bool "300 Hz"
1608c9218b16SRussell King
1609c9218b16SRussell Kingconfig HZ_500
1610c9218b16SRussell King	bool "500 Hz"
1611c9218b16SRussell King
1612c9218b16SRussell Kingconfig HZ_1000
1613c9218b16SRussell King	bool "1000 Hz"
1614c9218b16SRussell King
1615c9218b16SRussell Kingendchoice
1616c9218b16SRussell King
1617c9218b16SRussell Kingconfig HZ
1618c9218b16SRussell King	int
161947d84682SRussell King	default HZ_FIXED if HZ_FIXED != 0
1620c9218b16SRussell King	default 100 if HZ_100
1621c9218b16SRussell King	default 200 if HZ_200
1622c9218b16SRussell King	default 250 if HZ_250
1623c9218b16SRussell King	default 300 if HZ_300
1624c9218b16SRussell King	default 500 if HZ_500
1625c9218b16SRussell King	default 1000
1626c9218b16SRussell King
1627c9218b16SRussell Kingconfig SCHED_HRTICK
1628c9218b16SRussell King	def_bool HIGH_RES_TIMERS
1629f8065813SRussell King
163016c79651SCatalin Marinasconfig THUMB2_KERNEL
1631bc7dea00SUwe Kleine-König	bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
16324477ca45SUwe Kleine-König	depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
1633bc7dea00SUwe Kleine-König	default y if CPU_THUMBONLY
163416c79651SCatalin Marinas	select AEABI
163516c79651SCatalin Marinas	select ARM_ASM_UNIFIED
163689bace65SArnd Bergmann	select ARM_UNWIND
163716c79651SCatalin Marinas	help
163816c79651SCatalin Marinas	  By enabling this option, the kernel will be compiled in
163916c79651SCatalin Marinas	  Thumb-2 mode. A compiler/assembler that understand the unified
164016c79651SCatalin Marinas	  ARM-Thumb syntax is needed.
164116c79651SCatalin Marinas
164216c79651SCatalin Marinas	  If unsure, say N.
164316c79651SCatalin Marinas
16446f685c5cSDave Martinconfig THUMB2_AVOID_R_ARM_THM_JUMP11
16456f685c5cSDave Martin	bool "Work around buggy Thumb-2 short branch relocations in gas"
16466f685c5cSDave Martin	depends on THUMB2_KERNEL && MODULES
16476f685c5cSDave Martin	default y
16486f685c5cSDave Martin	help
16496f685c5cSDave Martin	  Various binutils versions can resolve Thumb-2 branches to
16506f685c5cSDave Martin	  locally-defined, preemptible global symbols as short-range "b.n"
16516f685c5cSDave Martin	  branch instructions.
16526f685c5cSDave Martin
16536f685c5cSDave Martin	  This is a problem, because there's no guarantee the final
16546f685c5cSDave Martin	  destination of the symbol, or any candidate locations for a
16556f685c5cSDave Martin	  trampoline, are within range of the branch.  For this reason, the
16566f685c5cSDave Martin	  kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
16576f685c5cSDave Martin	  relocation in modules at all, and it makes little sense to add
16586f685c5cSDave Martin	  support.
16596f685c5cSDave Martin
16606f685c5cSDave Martin	  The symptom is that the kernel fails with an "unsupported
16616f685c5cSDave Martin	  relocation" error when loading some modules.
16626f685c5cSDave Martin
16636f685c5cSDave Martin	  Until fixed tools are available, passing
16646f685c5cSDave Martin	  -fno-optimize-sibling-calls to gcc should prevent gcc generating
16656f685c5cSDave Martin	  code which hits this problem, at the cost of a bit of extra runtime
16666f685c5cSDave Martin	  stack usage in some cases.
16676f685c5cSDave Martin
16686f685c5cSDave Martin	  The problem is described in more detail at:
16696f685c5cSDave Martin	      https://bugs.launchpad.net/binutils-linaro/+bug/725126
16706f685c5cSDave Martin
16716f685c5cSDave Martin	  Only Thumb-2 kernels are affected.
16726f685c5cSDave Martin
16736f685c5cSDave Martin	  Unless you are sure your tools don't have this problem, say Y.
16746f685c5cSDave Martin
16750becb088SCatalin Marinasconfig ARM_ASM_UNIFIED
16760becb088SCatalin Marinas	bool
16770becb088SCatalin Marinas
1678704bdda0SNicolas Pitreconfig AEABI
1679704bdda0SNicolas Pitre	bool "Use the ARM EABI to compile the kernel"
1680704bdda0SNicolas Pitre	help
1681704bdda0SNicolas Pitre	  This option allows for the kernel to be compiled using the latest
1682704bdda0SNicolas Pitre	  ARM ABI (aka EABI).  This is only useful if you are using a user
1683704bdda0SNicolas Pitre	  space environment that is also compiled with EABI.
1684704bdda0SNicolas Pitre
1685704bdda0SNicolas Pitre	  Since there are major incompatibilities between the legacy ABI and
1686704bdda0SNicolas Pitre	  EABI, especially with regard to structure member alignment, this
1687704bdda0SNicolas Pitre	  option also changes the kernel syscall calling convention to
1688704bdda0SNicolas Pitre	  disambiguate both ABIs and allow for backward compatibility support
1689704bdda0SNicolas Pitre	  (selected with CONFIG_OABI_COMPAT).
1690704bdda0SNicolas Pitre
1691704bdda0SNicolas Pitre	  To use this you need GCC version 4.0.0 or later.
1692704bdda0SNicolas Pitre
16936c90c872SNicolas Pitreconfig OABI_COMPAT
1694a73a3ff1SRussell King	bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1695d6f94fa0SKees Cook	depends on AEABI && !THUMB2_KERNEL
16966c90c872SNicolas Pitre	help
16976c90c872SNicolas Pitre	  This option preserves the old syscall interface along with the
16986c90c872SNicolas Pitre	  new (ARM EABI) one. It also provides a compatibility layer to
16996c90c872SNicolas Pitre	  intercept syscalls that have structure arguments which layout
17006c90c872SNicolas Pitre	  in memory differs between the legacy ABI and the new ARM EABI
17016c90c872SNicolas Pitre	  (only for non "thumb" binaries). This option adds a tiny
17026c90c872SNicolas Pitre	  overhead to all syscalls and produces a slightly larger kernel.
170391702175SKees Cook
170491702175SKees Cook	  The seccomp filter system will not be available when this is
170591702175SKees Cook	  selected, since there is no way yet to sensibly distinguish
170691702175SKees Cook	  between calling conventions during filtering.
170791702175SKees Cook
17086c90c872SNicolas Pitre	  If you know you'll be using only pure EABI user space then you
17096c90c872SNicolas Pitre	  can say N here. If this option is not selected and you attempt
17106c90c872SNicolas Pitre	  to execute a legacy ABI binary then the result will be
17116c90c872SNicolas Pitre	  UNPREDICTABLE (in fact it can be predicted that it won't work
1712b02f8467SKees Cook	  at all). If in doubt say N.
17136c90c872SNicolas Pitre
1714eb33575cSMel Gormanconfig ARCH_HAS_HOLES_MEMORYMODEL
1715e80d6a24SMel Gorman	bool
1716e80d6a24SMel Gorman
171705944d74SRussell Kingconfig ARCH_SPARSEMEM_ENABLE
171805944d74SRussell King	bool
171905944d74SRussell King
172007a2f737SRussell Kingconfig ARCH_SPARSEMEM_DEFAULT
172107a2f737SRussell King	def_bool ARCH_SPARSEMEM_ENABLE
172207a2f737SRussell King
172305944d74SRussell Kingconfig ARCH_SELECT_MEMORY_MODEL
1724be370302SRussell King	def_bool ARCH_SPARSEMEM_ENABLE
1725c80d79d7SYasunori Goto
17267b7bf499SWill Deaconconfig HAVE_ARCH_PFN_VALID
17277b7bf499SWill Deacon	def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
17287b7bf499SWill Deacon
1729053a96caSNicolas Pitreconfig HIGHMEM
1730e8db89a2SRussell King	bool "High Memory Support"
1731e8db89a2SRussell King	depends on MMU
1732053a96caSNicolas Pitre	help
1733053a96caSNicolas Pitre	  The address space of ARM processors is only 4 Gigabytes large
1734053a96caSNicolas Pitre	  and it has to accommodate user address space, kernel address
1735053a96caSNicolas Pitre	  space as well as some memory mapped IO. That means that, if you
1736053a96caSNicolas Pitre	  have a large amount of physical memory and/or IO, not all of the
1737053a96caSNicolas Pitre	  memory can be "permanently mapped" by the kernel. The physical
1738053a96caSNicolas Pitre	  memory that is not permanently mapped is called "high memory".
1739053a96caSNicolas Pitre
1740053a96caSNicolas Pitre	  Depending on the selected kernel/user memory split, minimum
1741053a96caSNicolas Pitre	  vmalloc space and actual amount of RAM, you may not need this
1742053a96caSNicolas Pitre	  option which should result in a slightly faster kernel.
1743053a96caSNicolas Pitre
1744053a96caSNicolas Pitre	  If unsure, say n.
1745053a96caSNicolas Pitre
174665cec8e3SRussell Kingconfig HIGHPTE
174765cec8e3SRussell King	bool "Allocate 2nd-level pagetables from highmem"
174865cec8e3SRussell King	depends on HIGHMEM
174965cec8e3SRussell King
17501b8873a0SJamie Ilesconfig HW_PERF_EVENTS
17511b8873a0SJamie Iles	bool "Enable hardware performance counter support for perf events"
1752f0d1bc47SWill Deacon	depends on PERF_EVENTS
17531b8873a0SJamie Iles	default y
17541b8873a0SJamie Iles	help
17551b8873a0SJamie Iles	  Enable hardware performance counter support for perf events. If
17561b8873a0SJamie Iles	  disabled, perf events will use software events only.
17571b8873a0SJamie Iles
17581355e2a6SCatalin Marinasconfig SYS_SUPPORTS_HUGETLBFS
17591355e2a6SCatalin Marinas       def_bool y
17601355e2a6SCatalin Marinas       depends on ARM_LPAE
17611355e2a6SCatalin Marinas
17628d962507SCatalin Marinasconfig HAVE_ARCH_TRANSPARENT_HUGEPAGE
17638d962507SCatalin Marinas       def_bool y
17648d962507SCatalin Marinas       depends on ARM_LPAE
17658d962507SCatalin Marinas
17664bfab203SSteven Capperconfig ARCH_WANT_GENERAL_HUGETLB
17674bfab203SSteven Capper	def_bool y
17684bfab203SSteven Capper
17693f22ab27SDave Hansensource "mm/Kconfig"
17703f22ab27SDave Hansen
1771c1b2d970SMagnus Dammconfig FORCE_MAX_ZONEORDER
1772bf98c1eaSLaurent Pinchart	int "Maximum zone order" if ARCH_SHMOBILE_LEGACY
1773bf98c1eaSLaurent Pinchart	range 11 64 if ARCH_SHMOBILE_LEGACY
1774898f08e1SYegor Yefremov	default "12" if SOC_AM33XX
17756d85e2b0SUwe Kleine-König	default "9" if SA1111 || ARCH_EFM32
1776c1b2d970SMagnus Damm	default "11"
1777c1b2d970SMagnus Damm	help
1778c1b2d970SMagnus Damm	  The kernel memory allocator divides physically contiguous memory
1779c1b2d970SMagnus Damm	  blocks into "zones", where each zone is a power of two number of
1780c1b2d970SMagnus Damm	  pages.  This option selects the largest power of two that the kernel
1781c1b2d970SMagnus Damm	  keeps in the memory allocator.  If you need to allocate very large
1782c1b2d970SMagnus Damm	  blocks of physically contiguous memory, then you may need to
1783c1b2d970SMagnus Damm	  increase this value.
1784c1b2d970SMagnus Damm
1785c1b2d970SMagnus Damm	  This config option is actually maximum order plus one. For example,
1786c1b2d970SMagnus Damm	  a value of 11 means that the largest free memory block is 2^10 pages.
1787c1b2d970SMagnus Damm
17881da177e4SLinus Torvaldsconfig ALIGNMENT_TRAP
17891da177e4SLinus Torvalds	bool
1790f12d0d7cSHyok S. Choi	depends on CPU_CP15_MMU
17911da177e4SLinus Torvalds	default y if !ARCH_EBSA110
1792e119bfffSRussell King	select HAVE_PROC_CPU if PROC_FS
17931da177e4SLinus Torvalds	help
17941da177e4SLinus Torvalds	  ARM processors cannot fetch/store information which is not
17951da177e4SLinus Torvalds	  naturally aligned on the bus, i.e., a 4 byte fetch must start at an
17961da177e4SLinus Torvalds	  address divisible by 4. On 32-bit ARM processors, these non-aligned
17971da177e4SLinus Torvalds	  fetch/store instructions will be emulated in software if you say
17981da177e4SLinus Torvalds	  here, which has a severe performance impact. This is necessary for
17991da177e4SLinus Torvalds	  correct operation of some network protocols. With an IP-only
18001da177e4SLinus Torvalds	  configuration it is safe to say N, otherwise say Y.
18011da177e4SLinus Torvalds
180239ec58f3SLennert Buytenhekconfig UACCESS_WITH_MEMCPY
180338ef2ad5SLinus Walleij	bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
180438ef2ad5SLinus Walleij	depends on MMU
180539ec58f3SLennert Buytenhek	default y if CPU_FEROCEON
180639ec58f3SLennert Buytenhek	help
180739ec58f3SLennert Buytenhek	  Implement faster copy_to_user and clear_user methods for CPU
180839ec58f3SLennert Buytenhek	  cores where a 8-word STM instruction give significantly higher
180939ec58f3SLennert Buytenhek	  memory write throughput than a sequence of individual 32bit stores.
181039ec58f3SLennert Buytenhek
181139ec58f3SLennert Buytenhek	  A possible side effect is a slight increase in scheduling latency
181239ec58f3SLennert Buytenhek	  between threads sharing the same address space if they invoke
181339ec58f3SLennert Buytenhek	  such copy operations with large buffers.
181439ec58f3SLennert Buytenhek
181539ec58f3SLennert Buytenhek	  However, if the CPU data cache is using a write-allocate mode,
181639ec58f3SLennert Buytenhek	  this option is unlikely to provide any performance gain.
181739ec58f3SLennert Buytenhek
181870c70d97SNicolas Pitreconfig SECCOMP
181970c70d97SNicolas Pitre	bool
182070c70d97SNicolas Pitre	prompt "Enable seccomp to safely compute untrusted bytecode"
182170c70d97SNicolas Pitre	---help---
182270c70d97SNicolas Pitre	  This kernel feature is useful for number crunching applications
182370c70d97SNicolas Pitre	  that may need to compute untrusted bytecode during their
182470c70d97SNicolas Pitre	  execution. By using pipes or other transports made available to
182570c70d97SNicolas Pitre	  the process as file descriptors supporting the read/write
182670c70d97SNicolas Pitre	  syscalls, it's possible to isolate those applications in
182770c70d97SNicolas Pitre	  their own address space using seccomp. Once seccomp is
182870c70d97SNicolas Pitre	  enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
182970c70d97SNicolas Pitre	  and the task is only allowed to execute a few safe syscalls
183070c70d97SNicolas Pitre	  defined by each seccomp mode.
183170c70d97SNicolas Pitre
183206e6295bSStefano Stabelliniconfig SWIOTLB
183306e6295bSStefano Stabellini	def_bool y
183406e6295bSStefano Stabellini
183506e6295bSStefano Stabelliniconfig IOMMU_HELPER
183606e6295bSStefano Stabellini	def_bool SWIOTLB
183706e6295bSStefano Stabellini
1838eff8d644SStefano Stabelliniconfig XEN_DOM0
1839eff8d644SStefano Stabellini	def_bool y
1840eff8d644SStefano Stabellini	depends on XEN
1841eff8d644SStefano Stabellini
1842eff8d644SStefano Stabelliniconfig XEN
1843eff8d644SStefano Stabellini	bool "Xen guest support on ARM (EXPERIMENTAL)"
184485323a99SIan Campbell	depends on ARM && AEABI && OF
1845f880b67dSArnd Bergmann	depends on CPU_V7 && !CPU_V6
184685323a99SIan Campbell	depends on !GENERIC_ATOMIC64
18477693deccSUwe Kleine-König	depends on MMU
184851aaf81fSRussell King	select ARCH_DMA_ADDR_T_64BIT
184917b7ab80SStefano Stabellini	select ARM_PSCI
185083862ccfSStefano Stabellini	select SWIOTLB_XEN
1851eff8d644SStefano Stabellini	help
1852eff8d644SStefano Stabellini	  Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1853eff8d644SStefano Stabellini
18541da177e4SLinus Torvaldsendmenu
18551da177e4SLinus Torvalds
18561da177e4SLinus Torvaldsmenu "Boot options"
18571da177e4SLinus Torvalds
18589eb8f674SGrant Likelyconfig USE_OF
18599eb8f674SGrant Likely	bool "Flattened Device Tree support"
1860b1b3f49cSRussell King	select IRQ_DOMAIN
18619eb8f674SGrant Likely	select OF
18629eb8f674SGrant Likely	select OF_EARLY_FLATTREE
1863bcedb5f9SMarek Szyprowski	select OF_RESERVED_MEM
18649eb8f674SGrant Likely	help
18659eb8f674SGrant Likely	  Include support for flattened device tree machine descriptions.
18669eb8f674SGrant Likely
1867bd51e2f5SNicolas Pitreconfig ATAGS
1868bd51e2f5SNicolas Pitre	bool "Support for the traditional ATAGS boot data passing" if USE_OF
1869bd51e2f5SNicolas Pitre	default y
1870bd51e2f5SNicolas Pitre	help
1871bd51e2f5SNicolas Pitre	  This is the traditional way of passing data to the kernel at boot
1872bd51e2f5SNicolas Pitre	  time. If you are solely relying on the flattened device tree (or
1873bd51e2f5SNicolas Pitre	  the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1874bd51e2f5SNicolas Pitre	  to remove ATAGS support from your kernel binary.  If unsure,
1875bd51e2f5SNicolas Pitre	  leave this to y.
1876bd51e2f5SNicolas Pitre
1877bd51e2f5SNicolas Pitreconfig DEPRECATED_PARAM_STRUCT
1878bd51e2f5SNicolas Pitre	bool "Provide old way to pass kernel parameters"
1879bd51e2f5SNicolas Pitre	depends on ATAGS
1880bd51e2f5SNicolas Pitre	help
1881bd51e2f5SNicolas Pitre	  This was deprecated in 2001 and announced to live on for 5 years.
1882bd51e2f5SNicolas Pitre	  Some old boot loaders still use this way.
1883bd51e2f5SNicolas Pitre
18841da177e4SLinus Torvalds# Compressed boot loader in ROM.  Yes, we really want to ask about
18851da177e4SLinus Torvalds# TEXT and BSS so we preserve their values in the config files.
18861da177e4SLinus Torvaldsconfig ZBOOT_ROM_TEXT
18871da177e4SLinus Torvalds	hex "Compressed ROM boot loader base address"
18881da177e4SLinus Torvalds	default "0"
18891da177e4SLinus Torvalds	help
18901da177e4SLinus Torvalds	  The physical address at which the ROM-able zImage is to be
18911da177e4SLinus Torvalds	  placed in the target.  Platforms which normally make use of
18921da177e4SLinus Torvalds	  ROM-able zImage formats normally set this to a suitable
18931da177e4SLinus Torvalds	  value in their defconfig file.
18941da177e4SLinus Torvalds
18951da177e4SLinus Torvalds	  If ZBOOT_ROM is not enabled, this has no effect.
18961da177e4SLinus Torvalds
18971da177e4SLinus Torvaldsconfig ZBOOT_ROM_BSS
18981da177e4SLinus Torvalds	hex "Compressed ROM boot loader BSS address"
18991da177e4SLinus Torvalds	default "0"
19001da177e4SLinus Torvalds	help
1901f8c440b2SDan Fandrich	  The base address of an area of read/write memory in the target
1902f8c440b2SDan Fandrich	  for the ROM-able zImage which must be available while the
1903f8c440b2SDan Fandrich	  decompressor is running. It must be large enough to hold the
1904f8c440b2SDan Fandrich	  entire decompressed kernel plus an additional 128 KiB.
1905f8c440b2SDan Fandrich	  Platforms which normally make use of ROM-able zImage formats
1906f8c440b2SDan Fandrich	  normally set this to a suitable value in their defconfig file.
19071da177e4SLinus Torvalds
19081da177e4SLinus Torvalds	  If ZBOOT_ROM is not enabled, this has no effect.
19091da177e4SLinus Torvalds
19101da177e4SLinus Torvaldsconfig ZBOOT_ROM
19111da177e4SLinus Torvalds	bool "Compressed boot loader in ROM/flash"
19121da177e4SLinus Torvalds	depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
191310968131SRussell King	depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR
19141da177e4SLinus Torvalds	help
19151da177e4SLinus Torvalds	  Say Y here if you intend to execute your compressed kernel image
19161da177e4SLinus Torvalds	  (zImage) directly from ROM or flash.  If unsure, say N.
19171da177e4SLinus Torvalds
1918090ab3ffSSimon Hormanchoice
1919090ab3ffSSimon Horman	prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1920d6f94fa0SKees Cook	depends on ZBOOT_ROM && ARCH_SH7372
1921090ab3ffSSimon Horman	default ZBOOT_ROM_NONE
1922090ab3ffSSimon Horman	help
1923090ab3ffSSimon Horman	  Include experimental SD/MMC loading code in the ROM-able zImage.
192459bf8964SMasanari Iida	  With this enabled it is possible to write the ROM-able zImage
1925090ab3ffSSimon Horman	  kernel image to an MMC or SD card and boot the kernel straight
1926090ab3ffSSimon Horman	  from the reset vector. At reset the processor Mask ROM will load
192759bf8964SMasanari Iida	  the first part of the ROM-able zImage which in turn loads the
1928090ab3ffSSimon Horman	  rest the kernel image to RAM.
1929090ab3ffSSimon Horman
1930090ab3ffSSimon Hormanconfig ZBOOT_ROM_NONE
1931090ab3ffSSimon Horman	bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1932090ab3ffSSimon Horman	help
1933090ab3ffSSimon Horman	  Do not load image from SD or MMC
1934090ab3ffSSimon Horman
1935f45b1149SSimon Hormanconfig ZBOOT_ROM_MMCIF
1936f45b1149SSimon Horman	bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1937f45b1149SSimon Horman	help
1938090ab3ffSSimon Horman	  Load image from MMCIF hardware block.
1939090ab3ffSSimon Horman
1940090ab3ffSSimon Hormanconfig ZBOOT_ROM_SH_MOBILE_SDHI
1941090ab3ffSSimon Horman	bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1942090ab3ffSSimon Horman	help
1943090ab3ffSSimon Horman	  Load image from SDHI hardware block
1944090ab3ffSSimon Horman
1945090ab3ffSSimon Hormanendchoice
1946f45b1149SSimon Horman
1947e2a6a3aaSJohn Bonesioconfig ARM_APPENDED_DTB
1948e2a6a3aaSJohn Bonesio	bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
194910968131SRussell King	depends on OF
1950e2a6a3aaSJohn Bonesio	help
1951e2a6a3aaSJohn Bonesio	  With this option, the boot code will look for a device tree binary
1952e2a6a3aaSJohn Bonesio	  (DTB) appended to zImage
1953e2a6a3aaSJohn Bonesio	  (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1954e2a6a3aaSJohn Bonesio
1955e2a6a3aaSJohn Bonesio	  This is meant as a backward compatibility convenience for those
1956e2a6a3aaSJohn Bonesio	  systems with a bootloader that can't be upgraded to accommodate
1957e2a6a3aaSJohn Bonesio	  the documented boot protocol using a device tree.
1958e2a6a3aaSJohn Bonesio
1959e2a6a3aaSJohn Bonesio	  Beware that there is very little in terms of protection against
1960e2a6a3aaSJohn Bonesio	  this option being confused by leftover garbage in memory that might
1961e2a6a3aaSJohn Bonesio	  look like a DTB header after a reboot if no actual DTB is appended
1962e2a6a3aaSJohn Bonesio	  to zImage.  Do not leave this option active in a production kernel
1963e2a6a3aaSJohn Bonesio	  if you don't intend to always append a DTB.  Proper passing of the
1964e2a6a3aaSJohn Bonesio	  location into r2 of a bootloader provided DTB is always preferable
1965e2a6a3aaSJohn Bonesio	  to this option.
1966e2a6a3aaSJohn Bonesio
1967b90b9a38SNicolas Pitreconfig ARM_ATAG_DTB_COMPAT
1968b90b9a38SNicolas Pitre	bool "Supplement the appended DTB with traditional ATAG information"
1969b90b9a38SNicolas Pitre	depends on ARM_APPENDED_DTB
1970b90b9a38SNicolas Pitre	help
1971b90b9a38SNicolas Pitre	  Some old bootloaders can't be updated to a DTB capable one, yet
1972b90b9a38SNicolas Pitre	  they provide ATAGs with memory configuration, the ramdisk address,
1973b90b9a38SNicolas Pitre	  the kernel cmdline string, etc.  Such information is dynamically
1974b90b9a38SNicolas Pitre	  provided by the bootloader and can't always be stored in a static
1975b90b9a38SNicolas Pitre	  DTB.  To allow a device tree enabled kernel to be used with such
1976b90b9a38SNicolas Pitre	  bootloaders, this option allows zImage to extract the information
1977b90b9a38SNicolas Pitre	  from the ATAG list and store it at run time into the appended DTB.
1978b90b9a38SNicolas Pitre
1979d0f34a11SGenoud Richardchoice
1980d0f34a11SGenoud Richard	prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1981d0f34a11SGenoud Richard	default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1982d0f34a11SGenoud Richard
1983d0f34a11SGenoud Richardconfig ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1984d0f34a11SGenoud Richard	bool "Use bootloader kernel arguments if available"
1985d0f34a11SGenoud Richard	help
1986d0f34a11SGenoud Richard	  Uses the command-line options passed by the boot loader instead of
1987d0f34a11SGenoud Richard	  the device tree bootargs property. If the boot loader doesn't provide
1988d0f34a11SGenoud Richard	  any, the device tree bootargs property will be used.
1989d0f34a11SGenoud Richard
1990d0f34a11SGenoud Richardconfig ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1991d0f34a11SGenoud Richard	bool "Extend with bootloader kernel arguments"
1992d0f34a11SGenoud Richard	help
1993d0f34a11SGenoud Richard	  The command-line arguments provided by the boot loader will be
1994d0f34a11SGenoud Richard	  appended to the the device tree bootargs property.
1995d0f34a11SGenoud Richard
1996d0f34a11SGenoud Richardendchoice
1997d0f34a11SGenoud Richard
19981da177e4SLinus Torvaldsconfig CMDLINE
19991da177e4SLinus Torvalds	string "Default kernel command string"
20001da177e4SLinus Torvalds	default ""
20011da177e4SLinus Torvalds	help
20021da177e4SLinus Torvalds	  On some architectures (EBSA110 and CATS), there is currently no way
20031da177e4SLinus Torvalds	  for the boot loader to pass arguments to the kernel. For these
20041da177e4SLinus Torvalds	  architectures, you should supply some command-line options at build
20051da177e4SLinus Torvalds	  time by entering them here. As a minimum, you should specify the
20061da177e4SLinus Torvalds	  memory size and the root device (e.g., mem=64M root=/dev/nfs).
20071da177e4SLinus Torvalds
20084394c124SVictor Boiviechoice
20094394c124SVictor Boivie	prompt "Kernel command line type" if CMDLINE != ""
20104394c124SVictor Boivie	default CMDLINE_FROM_BOOTLOADER
2011bd51e2f5SNicolas Pitre	depends on ATAGS
20124394c124SVictor Boivie
20134394c124SVictor Boivieconfig CMDLINE_FROM_BOOTLOADER
20144394c124SVictor Boivie	bool "Use bootloader kernel arguments if available"
20154394c124SVictor Boivie	help
20164394c124SVictor Boivie	  Uses the command-line options passed by the boot loader. If
20174394c124SVictor Boivie	  the boot loader doesn't provide any, the default kernel command
20184394c124SVictor Boivie	  string provided in CMDLINE will be used.
20194394c124SVictor Boivie
20204394c124SVictor Boivieconfig CMDLINE_EXTEND
20214394c124SVictor Boivie	bool "Extend bootloader kernel arguments"
20224394c124SVictor Boivie	help
20234394c124SVictor Boivie	  The command-line arguments provided by the boot loader will be
20244394c124SVictor Boivie	  appended to the default kernel command string.
20254394c124SVictor Boivie
202692d2040dSAlexander Hollerconfig CMDLINE_FORCE
202792d2040dSAlexander Holler	bool "Always use the default kernel command string"
202892d2040dSAlexander Holler	help
202992d2040dSAlexander Holler	  Always use the default kernel command string, even if the boot
203092d2040dSAlexander Holler	  loader passes other arguments to the kernel.
203192d2040dSAlexander Holler	  This is useful if you cannot or don't want to change the
203292d2040dSAlexander Holler	  command-line options your boot loader passes to the kernel.
20334394c124SVictor Boivieendchoice
203492d2040dSAlexander Holler
20351da177e4SLinus Torvaldsconfig XIP_KERNEL
20361da177e4SLinus Torvalds	bool "Kernel Execute-In-Place from ROM"
203710968131SRussell King	depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
20381da177e4SLinus Torvalds	help
20391da177e4SLinus Torvalds	  Execute-In-Place allows the kernel to run from non-volatile storage
20401da177e4SLinus Torvalds	  directly addressable by the CPU, such as NOR flash. This saves RAM
20411da177e4SLinus Torvalds	  space since the text section of the kernel is not loaded from flash
20421da177e4SLinus Torvalds	  to RAM.  Read-write sections, such as the data section and stack,
20431da177e4SLinus Torvalds	  are still copied to RAM.  The XIP kernel is not compressed since
20441da177e4SLinus Torvalds	  it has to run directly from flash, so it will take more space to
20451da177e4SLinus Torvalds	  store it.  The flash address used to link the kernel object files,
20461da177e4SLinus Torvalds	  and for storing it, is configuration dependent. Therefore, if you
20471da177e4SLinus Torvalds	  say Y here, you must know the proper physical address where to
20481da177e4SLinus Torvalds	  store the kernel image depending on your own flash memory usage.
20491da177e4SLinus Torvalds
20501da177e4SLinus Torvalds	  Also note that the make target becomes "make xipImage" rather than
20511da177e4SLinus Torvalds	  "make zImage" or "make Image".  The final kernel binary to put in
20521da177e4SLinus Torvalds	  ROM memory will be arch/arm/boot/xipImage.
20531da177e4SLinus Torvalds
20541da177e4SLinus Torvalds	  If unsure, say N.
20551da177e4SLinus Torvalds
20561da177e4SLinus Torvaldsconfig XIP_PHYS_ADDR
20571da177e4SLinus Torvalds	hex "XIP Kernel Physical Location"
20581da177e4SLinus Torvalds	depends on XIP_KERNEL
20591da177e4SLinus Torvalds	default "0x00080000"
20601da177e4SLinus Torvalds	help
20611da177e4SLinus Torvalds	  This is the physical address in your flash memory the kernel will
20621da177e4SLinus Torvalds	  be linked for and stored to.  This address is dependent on your
20631da177e4SLinus Torvalds	  own flash usage.
20641da177e4SLinus Torvalds
2065c587e4a6SRichard Purdieconfig KEXEC
2066c587e4a6SRichard Purdie	bool "Kexec system call (EXPERIMENTAL)"
206719ab428fSStephen Warren	depends on (!SMP || PM_SLEEP_SMP)
2068*12db5562SVivek Goyal	select CRYPTO
2069*12db5562SVivek Goyal	select CRYPTO_SHA256
2070c587e4a6SRichard Purdie	help
2071c587e4a6SRichard Purdie	  kexec is a system call that implements the ability to shutdown your
2072c587e4a6SRichard Purdie	  current kernel, and to start another kernel.  It is like a reboot
207301dd2fbfSMatt LaPlante	  but it is independent of the system firmware.   And like a reboot
2074c587e4a6SRichard Purdie	  you can start any kernel with it, not just Linux.
2075c587e4a6SRichard Purdie
2076c587e4a6SRichard Purdie	  It is an ongoing process to be certain the hardware in a machine
2077c587e4a6SRichard Purdie	  is properly shutdown, so do not be surprised if this code does not
2078bf220695SGeert Uytterhoeven	  initially work for you.
2079c587e4a6SRichard Purdie
20804cd9d6f7SRichard Purdieconfig ATAGS_PROC
20814cd9d6f7SRichard Purdie	bool "Export atags in procfs"
2082bd51e2f5SNicolas Pitre	depends on ATAGS && KEXEC
2083b98d7291SUli Luckas	default y
20844cd9d6f7SRichard Purdie	help
20854cd9d6f7SRichard Purdie	  Should the atags used to boot the kernel be exported in an "atags"
20864cd9d6f7SRichard Purdie	  file in procfs. Useful with kexec.
20874cd9d6f7SRichard Purdie
2088cb5d39b3SMika Westerbergconfig CRASH_DUMP
2089cb5d39b3SMika Westerberg	bool "Build kdump crash kernel (EXPERIMENTAL)"
2090cb5d39b3SMika Westerberg	help
2091cb5d39b3SMika Westerberg	  Generate crash dump after being started by kexec. This should
2092cb5d39b3SMika Westerberg	  be normally only set in special crash dump kernels which are
2093cb5d39b3SMika Westerberg	  loaded in the main kernel with kexec-tools into a specially
2094cb5d39b3SMika Westerberg	  reserved region and then later executed after a crash by
2095cb5d39b3SMika Westerberg	  kdump/kexec. The crash dump kernel must be compiled to a
2096cb5d39b3SMika Westerberg	  memory address not used by the main kernel
2097cb5d39b3SMika Westerberg
2098cb5d39b3SMika Westerberg	  For more details see Documentation/kdump/kdump.txt
2099cb5d39b3SMika Westerberg
2100e69edc79SEric Miaoconfig AUTO_ZRELADDR
2101e69edc79SEric Miao	bool "Auto calculation of the decompressed kernel image address"
2102e69edc79SEric Miao	help
2103e69edc79SEric Miao	  ZRELADDR is the physical address where the decompressed kernel
2104e69edc79SEric Miao	  image will be placed. If AUTO_ZRELADDR is selected, the address
2105e69edc79SEric Miao	  will be determined at run-time by masking the current IP with
2106e69edc79SEric Miao	  0xf8000000. This assumes the zImage being placed in the first 128MB
2107e69edc79SEric Miao	  from start of memory.
2108e69edc79SEric Miao
21091da177e4SLinus Torvaldsendmenu
21101da177e4SLinus Torvalds
2111ac9d7efcSRussell Kingmenu "CPU Power Management"
21121da177e4SLinus Torvalds
21131da177e4SLinus Torvaldssource "drivers/cpufreq/Kconfig"
21141da177e4SLinus Torvalds
2115ac9d7efcSRussell Kingsource "drivers/cpuidle/Kconfig"
2116ac9d7efcSRussell King
2117ac9d7efcSRussell Kingendmenu
2118ac9d7efcSRussell King
21191da177e4SLinus Torvaldsmenu "Floating point emulation"
21201da177e4SLinus Torvalds
21211da177e4SLinus Torvaldscomment "At least one emulation must be selected"
21221da177e4SLinus Torvalds
21231da177e4SLinus Torvaldsconfig FPE_NWFPE
21241da177e4SLinus Torvalds	bool "NWFPE math emulation"
2125593c252aSDave Martin	depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
21261da177e4SLinus Torvalds	---help---
21271da177e4SLinus Torvalds	  Say Y to include the NWFPE floating point emulator in the kernel.
21281da177e4SLinus Torvalds	  This is necessary to run most binaries. Linux does not currently
21291da177e4SLinus Torvalds	  support floating point hardware so you need to say Y here even if
21301da177e4SLinus Torvalds	  your machine has an FPA or floating point co-processor podule.
21311da177e4SLinus Torvalds
21321da177e4SLinus Torvalds	  You may say N here if you are going to load the Acorn FPEmulator
21331da177e4SLinus Torvalds	  early in the bootup.
21341da177e4SLinus Torvalds
21351da177e4SLinus Torvaldsconfig FPE_NWFPE_XP
21361da177e4SLinus Torvalds	bool "Support extended precision"
2137bedf142bSLennert Buytenhek	depends on FPE_NWFPE
21381da177e4SLinus Torvalds	help
21391da177e4SLinus Torvalds	  Say Y to include 80-bit support in the kernel floating-point
21401da177e4SLinus Torvalds	  emulator.  Otherwise, only 32 and 64-bit support is compiled in.
21411da177e4SLinus Torvalds	  Note that gcc does not generate 80-bit operations by default,
21421da177e4SLinus Torvalds	  so in most cases this option only enlarges the size of the
21431da177e4SLinus Torvalds	  floating point emulator without any good reason.
21441da177e4SLinus Torvalds
21451da177e4SLinus Torvalds	  You almost surely want to say N here.
21461da177e4SLinus Torvalds
21471da177e4SLinus Torvaldsconfig FPE_FASTFPE
21481da177e4SLinus Torvalds	bool "FastFPE math emulation (EXPERIMENTAL)"
2149d6f94fa0SKees Cook	depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
21501da177e4SLinus Torvalds	---help---
21511da177e4SLinus Torvalds	  Say Y here to include the FAST floating point emulator in the kernel.
21521da177e4SLinus Torvalds	  This is an experimental much faster emulator which now also has full
21531da177e4SLinus Torvalds	  precision for the mantissa.  It does not support any exceptions.
21541da177e4SLinus Torvalds	  It is very simple, and approximately 3-6 times faster than NWFPE.
21551da177e4SLinus Torvalds
21561da177e4SLinus Torvalds	  It should be sufficient for most programs.  It may be not suitable
21571da177e4SLinus Torvalds	  for scientific calculations, but you have to check this for yourself.
21581da177e4SLinus Torvalds	  If you do not feel you need a faster FP emulation you should better
21591da177e4SLinus Torvalds	  choose NWFPE.
21601da177e4SLinus Torvalds
21611da177e4SLinus Torvaldsconfig VFP
21621da177e4SLinus Torvalds	bool "VFP-format floating point maths"
2163e399b1a4SRussell King	depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
21641da177e4SLinus Torvalds	help
21651da177e4SLinus Torvalds	  Say Y to include VFP support code in the kernel. This is needed
21661da177e4SLinus Torvalds	  if your hardware includes a VFP unit.
21671da177e4SLinus Torvalds
21681da177e4SLinus Torvalds	  Please see <file:Documentation/arm/VFP/release-notes.txt> for
21691da177e4SLinus Torvalds	  release notes and additional status information.
21701da177e4SLinus Torvalds
21711da177e4SLinus Torvalds	  Say N if your target does not have VFP hardware.
21721da177e4SLinus Torvalds
217325ebee02SCatalin Marinasconfig VFPv3
217425ebee02SCatalin Marinas	bool
217525ebee02SCatalin Marinas	depends on VFP
217625ebee02SCatalin Marinas	default y if CPU_V7
217725ebee02SCatalin Marinas
2178b5872db4SCatalin Marinasconfig NEON
2179b5872db4SCatalin Marinas	bool "Advanced SIMD (NEON) Extension support"
2180b5872db4SCatalin Marinas	depends on VFPv3 && CPU_V7
2181b5872db4SCatalin Marinas	help
2182b5872db4SCatalin Marinas	  Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2183b5872db4SCatalin Marinas	  Extension.
2184b5872db4SCatalin Marinas
218573c132c1SArd Biesheuvelconfig KERNEL_MODE_NEON
218673c132c1SArd Biesheuvel	bool "Support for NEON in kernel mode"
2187c4a30c3bSRussell King	depends on NEON && AEABI
218873c132c1SArd Biesheuvel	help
218973c132c1SArd Biesheuvel	  Say Y to include support for NEON in kernel mode.
219073c132c1SArd Biesheuvel
21911da177e4SLinus Torvaldsendmenu
21921da177e4SLinus Torvalds
21931da177e4SLinus Torvaldsmenu "Userspace binary formats"
21941da177e4SLinus Torvalds
21951da177e4SLinus Torvaldssource "fs/Kconfig.binfmt"
21961da177e4SLinus Torvalds
21971da177e4SLinus Torvaldsconfig ARTHUR
21981da177e4SLinus Torvalds	tristate "RISC OS personality"
2199704bdda0SNicolas Pitre	depends on !AEABI
22001da177e4SLinus Torvalds	help
22011da177e4SLinus Torvalds	  Say Y here to include the kernel code necessary if you want to run
22021da177e4SLinus Torvalds	  Acorn RISC OS/Arthur binaries under Linux. This code is still very
22031da177e4SLinus Torvalds	  experimental; if this sounds frightening, say N and sleep in peace.
22041da177e4SLinus Torvalds	  You can also say M here to compile this support as a module (which
22051da177e4SLinus Torvalds	  will be called arthur).
22061da177e4SLinus Torvalds
22071da177e4SLinus Torvaldsendmenu
22081da177e4SLinus Torvalds
22091da177e4SLinus Torvaldsmenu "Power management options"
22101da177e4SLinus Torvalds
2211eceab4acSRussell Kingsource "kernel/power/Kconfig"
22121da177e4SLinus Torvalds
2213f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
22144b1082caSStephen Warren	depends on !ARCH_S5PC100
221519a0519dSEzequiel Garcia	depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
2216f0d75153SUwe Kleine-König		CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2217f4cb5700SJohannes Berg	def_bool y
2218f4cb5700SJohannes Berg
221915e0d9e3SArnd Bergmannconfig ARM_CPU_SUSPEND
222015e0d9e3SArnd Bergmann	def_bool PM_SLEEP
222115e0d9e3SArnd Bergmann
2222603fb42aSSebastian Capellaconfig ARCH_HIBERNATION_POSSIBLE
2223603fb42aSSebastian Capella	bool
2224603fb42aSSebastian Capella	depends on MMU
2225603fb42aSSebastian Capella	default y if ARCH_SUSPEND_POSSIBLE
2226603fb42aSSebastian Capella
22271da177e4SLinus Torvaldsendmenu
22281da177e4SLinus Torvalds
2229d5950b43SSam Ravnborgsource "net/Kconfig"
2230d5950b43SSam Ravnborg
2231ac25150fSUwe Kleine-Königsource "drivers/Kconfig"
22321da177e4SLinus Torvalds
22331da177e4SLinus Torvaldssource "fs/Kconfig"
22341da177e4SLinus Torvalds
22351da177e4SLinus Torvaldssource "arch/arm/Kconfig.debug"
22361da177e4SLinus Torvalds
22371da177e4SLinus Torvaldssource "security/Kconfig"
22381da177e4SLinus Torvalds
22391da177e4SLinus Torvaldssource "crypto/Kconfig"
22401da177e4SLinus Torvalds
22411da177e4SLinus Torvaldssource "lib/Kconfig"
2242749cf76cSChristoffer Dall
2243749cf76cSChristoffer Dallsource "arch/arm/kvm/Kconfig"
2244