1# SPDX-License-Identifier: GPL-2.0-only 2 3menu "Platform selection" 4 depends on MMU 5 6comment "CPU Core family selection" 7 8config ARCH_MULTI_V4 9 bool "ARMv4 based platforms (FA526, StrongARM)" 10 depends on !ARCH_MULTI_V6_V7 11 # https://github.com/llvm/llvm-project/issues/50764 12 depends on !LD_IS_LLD || LLD_VERSION >= 160000 13 select ARCH_MULTI_V4_V5 14 select CPU_FA526 if !(CPU_SA110 || CPU_SA1100) 15 16config ARCH_MULTI_V4T 17 bool "ARMv4T based platforms (ARM720T, ARM920T, ...)" 18 depends on !ARCH_MULTI_V6_V7 19 # https://github.com/llvm/llvm-project/issues/50764 20 depends on !LD_IS_LLD || LLD_VERSION >= 160000 21 select ARCH_MULTI_V4_V5 22 select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \ 23 CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \ 24 CPU_ARM925T || CPU_ARM940T) 25 26config ARCH_MULTI_V5 27 bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)" 28 depends on !ARCH_MULTI_V6_V7 29 select ARCH_MULTI_V4_V5 30 select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \ 31 CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \ 32 CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON) 33 34config ARCH_MULTI_V4_V5 35 bool 36 37config ARCH_MULTI_V6 38 bool "ARMv6 based platforms (ARM11)" 39 select ARCH_MULTI_V6_V7 40 select CPU_V6K 41 42config ARCH_MULTI_V7 43 bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)" 44 default y 45 select ARCH_MULTI_V6_V7 46 select CPU_V7 47 select HAVE_SMP 48 49config ARCH_MULTI_V6_V7 50 bool 51 select MIGHT_HAVE_CACHE_L2X0 52 53config ARCH_MULTI_CPU_AUTO 54 def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7) 55 select ARCH_MULTI_V5 56 57endmenu 58 59config ARCH_VIRT 60 bool "Dummy Virtual Machine" 61 depends on ARCH_MULTI_V7 62 select ARM_AMBA 63 select ARM_GIC 64 select ARM_GIC_V2M if PCI 65 select ARM_GIC_V3 66 select ARM_GIC_V3_ITS if PCI 67 select ARM_PSCI 68 select HAVE_ARM_ARCH_TIMER 69 70config ARCH_AIROHA 71 bool "Airoha SoC Support" 72 depends on ARCH_MULTI_V7 73 select ARM_AMBA 74 select ARM_GIC 75 select ARM_GIC_V3 76 select ARM_PSCI 77 select HAVE_ARM_ARCH_TIMER 78 help 79 Support for Airoha EN7523 SoCs 80 81config MACH_ASM9260 82 bool "Alphascale ASM9260" 83 depends on ARCH_MULTI_V5 84 depends on CPU_LITTLE_ENDIAN 85 select CPU_ARM926T 86 select ASM9260_TIMER 87 help 88 Support for Alphascale ASM9260 based platform. 89 90menuconfig ARCH_MOXART 91 bool "MOXA ART SoC" 92 depends on ARCH_MULTI_V4 93 depends on CPU_LITTLE_ENDIAN 94 select CPU_FA526 95 select ARM_DMA_MEM_BUFFERABLE 96 select FARADAY_FTINTC010 97 select FTTMR010_TIMER 98 select GPIOLIB 99 select PHYLIB if NETDEVICES 100 help 101 Say Y here if you want to run your kernel on hardware with a 102 MOXA ART SoC. 103 The MOXA ART SoC is based on a Faraday FA526 ARMv4 32-bit 104 192 MHz CPU with MMU and 16KB/8KB D/I-cache (UC-7112-LX). 105 Used on models UC-7101, UC-7112/UC-7110, IA240/IA241, IA3341. 106 107if ARCH_MOXART 108 109config MACH_UC7112LX 110 bool "MOXA UC-7112-LX" 111 depends on ARCH_MOXART 112 help 113 Say Y here if you intend to run this kernel on a MOXA 114 UC-7112-LX embedded computer. 115 116endif 117 118config ARCH_RDA 119 bool "RDA Micro SoCs" 120 depends on ARCH_MULTI_V7 121 select RDA_INTC 122 select RDA_TIMER 123 help 124 This enables support for the RDA Micro 8810PL SoC family. 125 126menuconfig ARCH_SUNPLUS 127 bool "Sunplus SoCs" 128 depends on ARCH_MULTI_V7 129 help 130 Support for Sunplus SoC family: SP7021 and succeeding SoC-based systems, 131 such as the Banana Pi BPI-F2S development board (and derivatives). 132 (<http://www.sinovoip.com.cn/ecp_view.asp?id=586>) 133 (<https://tibbo.com/store/plus1.html>) 134 135if ARCH_SUNPLUS 136 137config SOC_SP7021 138 bool "Sunplus SP7021 SoC support" 139 default ARCH_SUNPLUS 140 select HAVE_ARM_ARCH_TIMER 141 select ARM_GIC 142 select ARM_PSCI 143 select PINCTRL 144 select PINCTRL_SPPCTL 145 select SERIAL_SUNPLUS if TTY 146 select SERIAL_SUNPLUS_CONSOLE if TTY 147 help 148 Support for Sunplus SP7021 SoC. It is based on ARM 4-core 149 Cortex-A7 with various peripherals (e.g.: I2C, SPI, SDIO, 150 Ethernet, etc.), FPGA interface, chip-to-chip bus. 151 It is designed for industrial control. 152 153endif 154 155config ARCH_UNIPHIER 156 bool "Socionext UniPhier SoCs" 157 depends on ARCH_MULTI_V7 158 select ARCH_HAS_RESET_CONTROLLER 159 select ARM_AMBA 160 select ARM_GLOBAL_TIMER 161 select ARM_GIC 162 select HAVE_ARM_SCU 163 select HAVE_ARM_TWD if SMP 164 select PINCTRL 165 select RESET_CONTROLLER 166 help 167 Support for UniPhier SoC family developed by Socionext Inc. 168 (formerly, System LSI Business Division of Panasonic Corporation) 169