xref: /linux/arch/arm/Kconfig.platforms (revision ec2e0fb07d789976c601bec19ecced7a501c3705)
1# SPDX-License-Identifier: GPL-2.0-only
2
3menu "Platform selection"
4	depends on MMU
5
6comment "CPU Core family selection"
7
8config ARCH_MULTI_V4
9	bool "ARMv4 based platforms (FA526, StrongARM)"
10	depends on !ARCH_MULTI_V6_V7
11	# https://github.com/llvm/llvm-project/issues/50764
12	depends on !LD_IS_LLD || LLD_VERSION >= 160000
13	select ARCH_MULTI_V4_V5
14	select CPU_FA526 if !(CPU_SA110 || CPU_SA1100)
15
16config ARCH_MULTI_V4T
17	bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
18	depends on !ARCH_MULTI_V6_V7
19	# https://github.com/llvm/llvm-project/issues/50764
20	depends on !LD_IS_LLD || LLD_VERSION >= 160000
21	select ARCH_MULTI_V4_V5
22	select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
23		CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \
24		CPU_ARM925T || CPU_ARM940T)
25
26config ARCH_MULTI_V5
27	bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
28	depends on !ARCH_MULTI_V6_V7
29	select ARCH_MULTI_V4_V5
30	select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
31		CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
32		CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
33
34config ARCH_MULTI_V4_V5
35	bool
36
37config ARCH_MULTI_V6
38	bool "ARMv6 based platforms (ARM11)"
39	select ARCH_MULTI_V6_V7
40	select CPU_V6K
41
42config ARCH_MULTI_V7
43	bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
44	default y
45	select ARCH_MULTI_V6_V7
46	select CPU_V7
47	select HAVE_SMP
48
49config ARCH_MULTI_V6_V7
50	bool
51	select MIGHT_HAVE_CACHE_L2X0
52
53config ARCH_MULTI_CPU_AUTO
54	def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
55	select ARCH_MULTI_V5
56
57endmenu
58
59config ARCH_VIRT
60	bool "Dummy Virtual Machine"
61	depends on ARCH_MULTI_V7
62	select ARM_AMBA
63	select ARM_GIC
64	select ARM_GIC_V2M if PCI
65	select ARM_GIC_V3
66	select ARM_GIC_V3_ITS if PCI
67	select ARM_PSCI
68	select HAVE_ARM_ARCH_TIMER
69
70config ARCH_AIROHA
71	bool "Airoha SoC Support"
72	depends on ARCH_MULTI_V7
73	select ARM_AMBA
74	select ARM_GIC
75	select ARM_GIC_V3
76	select ARM_PSCI
77	select HAVE_ARM_ARCH_TIMER
78	help
79	  Support for Airoha EN7523 SoCs
80
81config MACH_ASM9260
82	bool "Alphascale ASM9260"
83	depends on ARCH_MULTI_V5
84	depends on CPU_LITTLE_ENDIAN
85	select CPU_ARM926T
86	select ASM9260_TIMER
87	help
88	  Support for Alphascale ASM9260 based platform.
89
90menuconfig ARCH_HPE
91	bool "HPE SoC support"
92	depends on ARCH_MULTI_V7
93	help
94	  This enables support for HPE ARM based BMC chips.
95
96if ARCH_HPE
97
98config ARCH_HPE_GXP
99	bool "HPE GXP SoC"
100	depends on ARCH_MULTI_V7
101	select ARM_VIC
102	select GENERIC_IRQ_CHIP
103	select CLKSRC_MMIO
104	help
105	  HPE GXP is the name of the HPE Soc. This SoC is used to implement many
106	  BMC features at HPE. It supports ARMv7 architecture based on the Cortex
107	  A9 core. It is capable of using an AXI bus to which a memory controller
108	  is attached. It has multiple SPI interfaces to connect boot flash and
109	  BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It
110	  has multiple i2c engines to drive connectivity with a host
111	  infrastructure.
112
113endif
114
115menuconfig ARCH_MOXART
116	bool "MOXA ART SoC"
117	depends on ARCH_MULTI_V4
118	depends on CPU_LITTLE_ENDIAN
119	select CPU_FA526
120	select ARM_DMA_MEM_BUFFERABLE
121	select FARADAY_FTINTC010
122	select FTTMR010_TIMER
123	select GPIOLIB
124	select PHYLIB if NETDEVICES
125	help
126	  Say Y here if you want to run your kernel on hardware with a
127	  MOXA ART SoC.
128	  The MOXA ART SoC is based on a Faraday FA526 ARMv4 32-bit
129	  192 MHz CPU with MMU and 16KB/8KB D/I-cache (UC-7112-LX).
130	  Used on models UC-7101, UC-7112/UC-7110, IA240/IA241, IA3341.
131
132if ARCH_MOXART
133
134config MACH_UC7112LX
135	bool "MOXA UC-7112-LX"
136	depends on ARCH_MOXART
137	help
138	  Say Y here if you intend to run this kernel on a MOXA
139	  UC-7112-LX embedded computer.
140
141endif
142
143config ARCH_NSPIRE
144	bool "TI-NSPIRE based"
145	depends on ARCH_MULTI_V4T
146	depends on CPU_LITTLE_ENDIAN
147	select CPU_ARM926T
148	select GENERIC_IRQ_CHIP
149	select ARM_AMBA
150	select ARM_VIC
151	select ARM_TIMER_SP804
152	select NSPIRE_TIMER
153	select POWER_RESET
154	select POWER_RESET_SYSCON
155	help
156	  This enables support for systems using the TI-NSPIRE CPU
157
158config ARCH_RDA
159	bool "RDA Micro SoCs"
160	depends on ARCH_MULTI_V7
161	select RDA_INTC
162	select RDA_TIMER
163	help
164	  This enables support for the RDA Micro 8810PL SoC family.
165
166menuconfig ARCH_SUNPLUS
167	bool "Sunplus SoCs"
168	depends on ARCH_MULTI_V7
169	help
170	  Support for Sunplus SoC family: SP7021 and succeeding SoC-based systems,
171	  such as the Banana Pi BPI-F2S development board (and derivatives).
172	  (<http://www.sinovoip.com.cn/ecp_view.asp?id=586>)
173	  (<https://tibbo.com/store/plus1.html>)
174
175if ARCH_SUNPLUS
176
177config SOC_SP7021
178	bool "Sunplus SP7021 SoC support"
179	default ARCH_SUNPLUS
180	select HAVE_ARM_ARCH_TIMER
181	select ARM_GIC
182	select ARM_PSCI
183	select PINCTRL
184	select PINCTRL_SPPCTL
185	select SERIAL_SUNPLUS if TTY
186	select SERIAL_SUNPLUS_CONSOLE if TTY
187	help
188	  Support for Sunplus SP7021 SoC. It is based on ARM 4-core
189	  Cortex-A7 with various peripherals (e.g.: I2C, SPI, SDIO,
190	  Ethernet, etc.), FPGA interface,  chip-to-chip bus.
191	  It is designed for industrial control.
192
193endif
194
195config ARCH_UNIPHIER
196	bool "Socionext UniPhier SoCs"
197	depends on ARCH_MULTI_V7
198	select ARCH_HAS_RESET_CONTROLLER
199	select ARM_AMBA
200	select ARM_GLOBAL_TIMER
201	select ARM_GIC
202	select HAVE_ARM_SCU
203	select HAVE_ARM_TWD if SMP
204	select PINCTRL
205	select RESET_CONTROLLER
206	help
207	  Support for UniPhier SoC family developed by Socionext Inc.
208	  (formerly, System LSI Business Division of Panasonic Corporation)
209