120e3ab9eSAndrew Davis# SPDX-License-Identifier: GPL-2.0-only 220e3ab9eSAndrew Davis 320e3ab9eSAndrew Davismenu "Platform selection" 420e3ab9eSAndrew Davis depends on MMU 520e3ab9eSAndrew Davis 620e3ab9eSAndrew Daviscomment "CPU Core family selection" 720e3ab9eSAndrew Davis 820e3ab9eSAndrew Davisconfig ARCH_MULTI_V4 920e3ab9eSAndrew Davis bool "ARMv4 based platforms (FA526, StrongARM)" 1020e3ab9eSAndrew Davis depends on !ARCH_MULTI_V6_V7 1120e3ab9eSAndrew Davis # https://github.com/llvm/llvm-project/issues/50764 1220e3ab9eSAndrew Davis depends on !LD_IS_LLD || LLD_VERSION >= 160000 1320e3ab9eSAndrew Davis select ARCH_MULTI_V4_V5 1420e3ab9eSAndrew Davis select CPU_FA526 if !(CPU_SA110 || CPU_SA1100) 1520e3ab9eSAndrew Davis 1620e3ab9eSAndrew Davisconfig ARCH_MULTI_V4T 1720e3ab9eSAndrew Davis bool "ARMv4T based platforms (ARM720T, ARM920T, ...)" 1820e3ab9eSAndrew Davis depends on !ARCH_MULTI_V6_V7 1920e3ab9eSAndrew Davis # https://github.com/llvm/llvm-project/issues/50764 2020e3ab9eSAndrew Davis depends on !LD_IS_LLD || LLD_VERSION >= 160000 2120e3ab9eSAndrew Davis select ARCH_MULTI_V4_V5 2220e3ab9eSAndrew Davis select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \ 2320e3ab9eSAndrew Davis CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \ 2420e3ab9eSAndrew Davis CPU_ARM925T || CPU_ARM940T) 2520e3ab9eSAndrew Davis 2620e3ab9eSAndrew Davisconfig ARCH_MULTI_V5 2720e3ab9eSAndrew Davis bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)" 2820e3ab9eSAndrew Davis depends on !ARCH_MULTI_V6_V7 2920e3ab9eSAndrew Davis select ARCH_MULTI_V4_V5 3020e3ab9eSAndrew Davis select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \ 3120e3ab9eSAndrew Davis CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \ 3220e3ab9eSAndrew Davis CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON) 3320e3ab9eSAndrew Davis 3420e3ab9eSAndrew Davisconfig ARCH_MULTI_V4_V5 3520e3ab9eSAndrew Davis bool 3620e3ab9eSAndrew Davis 3720e3ab9eSAndrew Davisconfig ARCH_MULTI_V6 3820e3ab9eSAndrew Davis bool "ARMv6 based platforms (ARM11)" 3920e3ab9eSAndrew Davis select ARCH_MULTI_V6_V7 4020e3ab9eSAndrew Davis select CPU_V6K 4120e3ab9eSAndrew Davis 4220e3ab9eSAndrew Davisconfig ARCH_MULTI_V7 4320e3ab9eSAndrew Davis bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)" 4420e3ab9eSAndrew Davis default y 4520e3ab9eSAndrew Davis select ARCH_MULTI_V6_V7 4620e3ab9eSAndrew Davis select CPU_V7 4720e3ab9eSAndrew Davis select HAVE_SMP 4820e3ab9eSAndrew Davis 4920e3ab9eSAndrew Davisconfig ARCH_MULTI_V6_V7 5020e3ab9eSAndrew Davis bool 5120e3ab9eSAndrew Davis select MIGHT_HAVE_CACHE_L2X0 5220e3ab9eSAndrew Davis 5320e3ab9eSAndrew Davisconfig ARCH_MULTI_CPU_AUTO 5420e3ab9eSAndrew Davis def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7) 5520e3ab9eSAndrew Davis select ARCH_MULTI_V5 5620e3ab9eSAndrew Davis 5720e3ab9eSAndrew Davisendmenu 5820e3ab9eSAndrew Davis 5920e3ab9eSAndrew Davisconfig ARCH_VIRT 6020e3ab9eSAndrew Davis bool "Dummy Virtual Machine" 6120e3ab9eSAndrew Davis depends on ARCH_MULTI_V7 6220e3ab9eSAndrew Davis select ARM_AMBA 6320e3ab9eSAndrew Davis select ARM_GIC 6420e3ab9eSAndrew Davis select ARM_GIC_V2M if PCI 6520e3ab9eSAndrew Davis select ARM_GIC_V3 6620e3ab9eSAndrew Davis select ARM_GIC_V3_ITS if PCI 6720e3ab9eSAndrew Davis select ARM_PSCI 6820e3ab9eSAndrew Davis select HAVE_ARM_ARCH_TIMER 69b6ed4800SAndrew Davis 7000e58c36SAndrew Davisconfig ARCH_AIROHA 7100e58c36SAndrew Davis bool "Airoha SoC Support" 7200e58c36SAndrew Davis depends on ARCH_MULTI_V7 7300e58c36SAndrew Davis select ARM_AMBA 7400e58c36SAndrew Davis select ARM_GIC 7500e58c36SAndrew Davis select ARM_GIC_V3 7600e58c36SAndrew Davis select ARM_PSCI 7700e58c36SAndrew Davis select HAVE_ARM_ARCH_TIMER 7800e58c36SAndrew Davis help 7900e58c36SAndrew Davis Support for Airoha EN7523 SoCs 8000e58c36SAndrew Davis 81b6ed4800SAndrew Davisconfig MACH_ASM9260 82b6ed4800SAndrew Davis bool "Alphascale ASM9260" 83b6ed4800SAndrew Davis depends on ARCH_MULTI_V5 84b6ed4800SAndrew Davis depends on CPU_LITTLE_ENDIAN 85b6ed4800SAndrew Davis select CPU_ARM926T 86b6ed4800SAndrew Davis select ASM9260_TIMER 87b6ed4800SAndrew Davis help 88b6ed4800SAndrew Davis Support for Alphascale ASM9260 based platform. 898b7776feSAndrew Davis 90*9685b297SAndrew Davismenuconfig ARCH_HPE 91*9685b297SAndrew Davis bool "HPE SoC support" 92*9685b297SAndrew Davis depends on ARCH_MULTI_V7 93*9685b297SAndrew Davis help 94*9685b297SAndrew Davis This enables support for HPE ARM based BMC chips. 95*9685b297SAndrew Davis 96*9685b297SAndrew Davisif ARCH_HPE 97*9685b297SAndrew Davis 98*9685b297SAndrew Davisconfig ARCH_HPE_GXP 99*9685b297SAndrew Davis bool "HPE GXP SoC" 100*9685b297SAndrew Davis depends on ARCH_MULTI_V7 101*9685b297SAndrew Davis select ARM_VIC 102*9685b297SAndrew Davis select GENERIC_IRQ_CHIP 103*9685b297SAndrew Davis select CLKSRC_MMIO 104*9685b297SAndrew Davis help 105*9685b297SAndrew Davis HPE GXP is the name of the HPE Soc. This SoC is used to implement many 106*9685b297SAndrew Davis BMC features at HPE. It supports ARMv7 architecture based on the Cortex 107*9685b297SAndrew Davis A9 core. It is capable of using an AXI bus to which a memory controller 108*9685b297SAndrew Davis is attached. It has multiple SPI interfaces to connect boot flash and 109*9685b297SAndrew Davis BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It 110*9685b297SAndrew Davis has multiple i2c engines to drive connectivity with a host 111*9685b297SAndrew Davis infrastructure. 112*9685b297SAndrew Davis 113*9685b297SAndrew Davisendif 114*9685b297SAndrew Davis 115dcfbe025SAndrew Davismenuconfig ARCH_MOXART 116dcfbe025SAndrew Davis bool "MOXA ART SoC" 117dcfbe025SAndrew Davis depends on ARCH_MULTI_V4 118dcfbe025SAndrew Davis depends on CPU_LITTLE_ENDIAN 119dcfbe025SAndrew Davis select CPU_FA526 120dcfbe025SAndrew Davis select ARM_DMA_MEM_BUFFERABLE 121dcfbe025SAndrew Davis select FARADAY_FTINTC010 122dcfbe025SAndrew Davis select FTTMR010_TIMER 123dcfbe025SAndrew Davis select GPIOLIB 124dcfbe025SAndrew Davis select PHYLIB if NETDEVICES 125dcfbe025SAndrew Davis help 126dcfbe025SAndrew Davis Say Y here if you want to run your kernel on hardware with a 127dcfbe025SAndrew Davis MOXA ART SoC. 128dcfbe025SAndrew Davis The MOXA ART SoC is based on a Faraday FA526 ARMv4 32-bit 129dcfbe025SAndrew Davis 192 MHz CPU with MMU and 16KB/8KB D/I-cache (UC-7112-LX). 130dcfbe025SAndrew Davis Used on models UC-7101, UC-7112/UC-7110, IA240/IA241, IA3341. 131dcfbe025SAndrew Davis 132dcfbe025SAndrew Davisif ARCH_MOXART 133dcfbe025SAndrew Davis 134dcfbe025SAndrew Davisconfig MACH_UC7112LX 135dcfbe025SAndrew Davis bool "MOXA UC-7112-LX" 136dcfbe025SAndrew Davis depends on ARCH_MOXART 137dcfbe025SAndrew Davis help 138dcfbe025SAndrew Davis Say Y here if you intend to run this kernel on a MOXA 139dcfbe025SAndrew Davis UC-7112-LX embedded computer. 140dcfbe025SAndrew Davis 141dcfbe025SAndrew Davisendif 142dcfbe025SAndrew Davis 143671c08ecSAndrew Davisconfig ARCH_NSPIRE 144671c08ecSAndrew Davis bool "TI-NSPIRE based" 145671c08ecSAndrew Davis depends on ARCH_MULTI_V4T 146671c08ecSAndrew Davis depends on CPU_LITTLE_ENDIAN 147671c08ecSAndrew Davis select CPU_ARM926T 148671c08ecSAndrew Davis select GENERIC_IRQ_CHIP 149671c08ecSAndrew Davis select ARM_AMBA 150671c08ecSAndrew Davis select ARM_VIC 151671c08ecSAndrew Davis select ARM_TIMER_SP804 152671c08ecSAndrew Davis select NSPIRE_TIMER 153671c08ecSAndrew Davis select POWER_RESET 154671c08ecSAndrew Davis select POWER_RESET_SYSCON 155671c08ecSAndrew Davis help 156671c08ecSAndrew Davis This enables support for systems using the TI-NSPIRE CPU 157671c08ecSAndrew Davis 1588b7776feSAndrew Davisconfig ARCH_RDA 1598b7776feSAndrew Davis bool "RDA Micro SoCs" 1608b7776feSAndrew Davis depends on ARCH_MULTI_V7 1618b7776feSAndrew Davis select RDA_INTC 1628b7776feSAndrew Davis select RDA_TIMER 1638b7776feSAndrew Davis help 1648b7776feSAndrew Davis This enables support for the RDA Micro 8810PL SoC family. 16593911741SAndrew Davis 166ae73dadbSAndrew Davismenuconfig ARCH_SUNPLUS 167ae73dadbSAndrew Davis bool "Sunplus SoCs" 168ae73dadbSAndrew Davis depends on ARCH_MULTI_V7 169ae73dadbSAndrew Davis help 170ae73dadbSAndrew Davis Support for Sunplus SoC family: SP7021 and succeeding SoC-based systems, 171ae73dadbSAndrew Davis such as the Banana Pi BPI-F2S development board (and derivatives). 172ae73dadbSAndrew Davis (<http://www.sinovoip.com.cn/ecp_view.asp?id=586>) 173ae73dadbSAndrew Davis (<https://tibbo.com/store/plus1.html>) 174ae73dadbSAndrew Davis 175ae73dadbSAndrew Davisif ARCH_SUNPLUS 176ae73dadbSAndrew Davis 177ae73dadbSAndrew Davisconfig SOC_SP7021 178ae73dadbSAndrew Davis bool "Sunplus SP7021 SoC support" 179ae73dadbSAndrew Davis default ARCH_SUNPLUS 180ae73dadbSAndrew Davis select HAVE_ARM_ARCH_TIMER 181ae73dadbSAndrew Davis select ARM_GIC 182ae73dadbSAndrew Davis select ARM_PSCI 183ae73dadbSAndrew Davis select PINCTRL 184ae73dadbSAndrew Davis select PINCTRL_SPPCTL 185ae73dadbSAndrew Davis select SERIAL_SUNPLUS if TTY 186ae73dadbSAndrew Davis select SERIAL_SUNPLUS_CONSOLE if TTY 187ae73dadbSAndrew Davis help 188ae73dadbSAndrew Davis Support for Sunplus SP7021 SoC. It is based on ARM 4-core 189ae73dadbSAndrew Davis Cortex-A7 with various peripherals (e.g.: I2C, SPI, SDIO, 190ae73dadbSAndrew Davis Ethernet, etc.), FPGA interface, chip-to-chip bus. 191ae73dadbSAndrew Davis It is designed for industrial control. 192ae73dadbSAndrew Davis 193ae73dadbSAndrew Davisendif 194ae73dadbSAndrew Davis 19593911741SAndrew Davisconfig ARCH_UNIPHIER 19693911741SAndrew Davis bool "Socionext UniPhier SoCs" 19793911741SAndrew Davis depends on ARCH_MULTI_V7 19893911741SAndrew Davis select ARCH_HAS_RESET_CONTROLLER 19993911741SAndrew Davis select ARM_AMBA 20093911741SAndrew Davis select ARM_GLOBAL_TIMER 20193911741SAndrew Davis select ARM_GIC 20293911741SAndrew Davis select HAVE_ARM_SCU 20393911741SAndrew Davis select HAVE_ARM_TWD if SMP 20493911741SAndrew Davis select PINCTRL 20593911741SAndrew Davis select RESET_CONTROLLER 20693911741SAndrew Davis help 20793911741SAndrew Davis Support for UniPhier SoC family developed by Socionext Inc. 20893911741SAndrew Davis (formerly, System LSI Business Division of Panasonic Corporation) 209