xref: /linux/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.yaml (revision c17ee635fd3a482b2ad2bf5e269755c2eae5f25e) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/watchdog/mpc8xxx-wdt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale MPC8xxx watchdog timer (For 83xx, 86xx and 8xx)
8
9maintainers:
10  - J. Neuschäfer <j.ne@posteo.net>
11
12properties:
13  compatible:
14    enum:
15      - mpc83xx_wdt       # for an mpc83xx
16      - fsl,mpc8610-wdt   # for an mpc86xx
17      - fsl,mpc823-wdt    # for an mpc8xx
18
19  device_type:
20    const: watchdog
21
22  reg:
23    minItems: 1
24    items:
25      - description: |
26          Base physical address and length of the area hosting the watchdog
27          registers.
28
29          On the 83xx, "Watchdog Timer Registers" area:     <0x200 0x100>
30          On the 86xx, "Watchdog Timer Registers" area:     <0xe4000 0x100>
31          On the 8xx, "General System Interface Unit" area: <0x0 0x10>
32
33      - description: |
34          Additional optional physical address and length (4) of location of
35          the Reset Status Register (called RSTRSCR on the mpc86xx)
36
37          On the 83xx, it is located at offset 0x910
38          On the 86xx, it is located at offset 0xe0094
39          On the 8xx, it is located at offset 0x288
40
41required:
42  - compatible
43  - reg
44
45allOf:
46  - $ref: watchdog.yaml#
47
48additionalProperties: false
49
50examples:
51  - |
52    watchdog@0 {
53        compatible = "fsl,mpc823-wdt";
54        reg = <0x0 0x10 0x288 0x4>;
55    };
56
57  - |
58    watchdog@200 {
59        compatible = "mpc83xx_wdt";
60        reg = <0x200 0x100>;
61        device_type = "watchdog";
62    };
63
64...
65