1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/usb/socionext,uniphier-dwc3.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Socionext Uniphier SuperSpeed DWC3 USB SoC controller 8 9maintainers: 10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com> 11 - Masami Hiramatsu <mhiramat@kernel.org> 12 13select: 14 properties: 15 compatible: 16 contains: 17 const: socionext,uniphier-dwc3 18 required: 19 - compatible 20 21properties: 22 compatible: 23 items: 24 - const: socionext,uniphier-dwc3 25 - const: snps,dwc3 26 27 reg: 28 maxItems: 1 29 30 interrupts: 31 minItems: 1 32 items: 33 - description: Host or single combined interrupt 34 - description: Peripheral interrupt 35 36 interrupt-names: 37 minItems: 1 38 items: 39 - enum: 40 - dwc_usb3 41 - host 42 - const: peripheral 43 44 clocks: 45 maxItems: 3 46 47 clock-names: 48 items: 49 - const: ref 50 - const: bus_early 51 - const: suspend 52 53 phys: 54 description: 1 to 4 HighSpeed PHYs followed by 1 or 2 SuperSpeed PHYs 55 minItems: 1 56 maxItems: 6 57 58 resets: 59 maxItems: 1 60 61required: 62 - compatible 63 - reg 64 - interrupts 65 - clocks 66 - clock-names 67 - phys 68 69unevaluatedProperties: false 70 71allOf: 72 - $ref: snps,dwc3.yaml# 73 74examples: 75 - | 76 #include <dt-bindings/interrupt-controller/arm-gic.h> 77 78 usb@65a00000 { 79 compatible = "socionext,uniphier-dwc3", "snps,dwc3"; 80 reg = <0x65a00000 0xcd00>; 81 interrupt-names = "dwc_usb3"; 82 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; 83 clock-names = "ref", "bus_early", "suspend"; 84 clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>; 85 resets = <&usb0_rst 15>; 86 phys = <&usb0_hsphy0>, <&usb0_hsphy1>, 87 <&usb0_ssphy0>, <&usb0_ssphy1>; 88 dr_mode = "host"; 89 }; 90